[PATCH] add support for vhdl libraries in generated quartus .qsf file
Signed-off-by: jozsef imrek jozsef.imrek@cern.ch --- hdlmake/tools/quartus/quartus.py | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/hdlmake/tools/quartus/quartus.py b/hdlmake/tools/quartus/quartus.py
index 91ead15..9c073be 100644
--- a/hdlmake/tools/quartus/quartus.py
+++ b/hdlmake/tools/quartus/quartus.py
@@ -184,10 +184,11 @@ mrproper:
def __emit_files(self):
from srcfile import VHDLFile, VerilogFile, SignalTapFile, SDCFile, QIPFile, DPFFile
tmp = "set_global_assignment -name {0} {1}"
+ tmplib = tmp + " -library {2}"
ret = []
for f in self.files:
if isinstance(f, VHDLFile):
- line = tmp.format("VHDL_FILE", f.rel_path())
+ line = tmplib.format("VHDL_FILE", f.rel_path(), f.library)
elif isinstance(f, VerilogFile):
line = tmp.format("VERILOG_FILE", f.rel_path())
elif isinstance(f, SignalTapFile):
--
1.8.3.1