Gateware v4.1
added by Denia Bouhired-Ferrag on 2018-01-23 11:18:29.381560
Release 4.1 is now released
Gateware v3.0 release
added by Theodor-Adrian Stana on 2014-09-26 20:09:32.155552
The CONV-TTL-BLO gateware now uses the converter board common gateware as a sub-module and implements external logic to adapt for levels needed by this module.
These are the differences from the previous version:
-
CHANGES IN MEMORY MAP
- the Multiboot module is now at address 0x100
- the one-wire master module is now at address 0x200
- addition of per-channel latest timestamp registers
- addition of line status register
- implementation of PMISSE bits for each channel in the SR
See more information here.
Gateware v2.2 release
added by Theodor-Adrian Stana on 2014-05-05 18:15:31.609395
Gateware v2.2 is now released.
It fixes a bug whereby a pulse was generated on startup when the board is in TTL-BAR repetition mode and with the glitch filter on. The bug was due to an issue in the first pulse inhibit logic inside the pulse generator block. This logic was de-activating one clock cycle early as compared to the trigger logic when the glitch filter is on, thus resulting in a pulse still being generated on startup.
Golden gateware v0.1 released
added by Theodor-Adrian Stana on 2014-05-05 18:14:01.561315
Due to the porting of code from the release development branches to the golden gateware branch, the v0.0 golden gateware did not contain a glitch filter.
This issue has been fixed and is now obtainable from the golden gateware page.