Device Utilization Summary | [-] |
Slice Logic Utilization | Used | Available | Utilization | Note(s) |
Number of Slice Registers |
796 |
184,304 |
1% |
|
Number used as Flip Flops |
796 |
|
|
|
Number used as Latches |
0 |
|
|
|
Number used as Latch-thrus |
0 |
|
|
|
Number used as AND/OR logics |
0 |
|
|
|
Number of Slice LUTs |
934 |
92,152 |
1% |
|
Number used as logic |
891 |
92,152 |
1% |
|
Number using O6 output only |
571 |
|
|
|
Number using O5 output only |
154 |
|
|
|
Number using O5 and O6 |
166 |
|
|
|
Number used as ROM |
0 |
|
|
|
Number used as Memory |
11 |
21,680 |
1% |
|
Number used as Dual Port RAM |
8 |
|
|
|
Number using O6 output only |
4 |
|
|
|
Number using O5 output only |
0 |
|
|
|
Number using O5 and O6 |
4 |
|
|
|
Number used as Single Port RAM |
0 |
|
|
|
Number used as Shift Register |
3 |
|
|
|
Number using O6 output only |
3 |
|
|
|
Number using O5 output only |
0 |
|
|
|
Number using O5 and O6 |
0 |
|
|
|
Number used exclusively as route-thrus |
32 |
|
|
|
Number with same-slice register load |
23 |
|
|
|
Number with same-slice carry load |
9 |
|
|
|
Number with other load |
0 |
|
|
|
Number of occupied Slices |
374 |
23,038 |
1% |
|
Number of LUT Flip Flop pairs used |
1,101 |
|
|
|
Number with an unused Flip Flop |
386 |
1,101 |
35% |
|
Number with an unused LUT |
167 |
1,101 |
15% |
|
Number of fully used LUT-FF pairs |
548 |
1,101 |
49% |
|
Number of unique control sets |
32 |
|
|
|
Number of slice register sites lost to control set restrictions |
85 |
184,304 |
1% |
|
Number of bonded IOBs |
330 |
396 |
83% |
|
Number of LOCed IOBs |
328 |
330 |
99% |
|
IOB Master Pads |
2 |
|
|
|
IOB Slave Pads |
2 |
|
|
|
Number of RAMB16BWERs |
0 |
268 |
0% |
|
Number of RAMB8BWERs |
0 |
536 |
0% |
|
Number of BUFIO2/BUFIO2_2CLKs |
0 |
32 |
0% |
|
Number of BUFIO2FB/BUFIO2FB_2CLKs |
0 |
32 |
0% |
|
Number of BUFG/BUFGMUXs |
4 |
16 |
25% |
|
Number used as BUFGs |
4 |
|
|
|
Number used as BUFGMUX |
0 |
|
|
|
Number of DCM/DCM_CLKGENs |
0 |
12 |
0% |
|
Number of ILOGIC2/ISERDES2s |
0 |
586 |
0% |
|
Number of IODELAY2/IODRP2/IODRP2_MCBs |
0 |
586 |
0% |
|
Number of OLOGIC2/OSERDES2s |
0 |
586 |
0% |
|
Number of BSCANs |
0 |
4 |
0% |
|
Number of BUFHs |
0 |
384 |
0% |
|
Number of BUFPLLs |
0 |
8 |
0% |
|
Number of BUFPLL_MCBs |
0 |
4 |
0% |
|
Number of DSP48A1s |
0 |
180 |
0% |
|
Number of GTPA1_DUALs |
0 |
4 |
0% |
|
Number of ICAPs |
0 |
1 |
0% |
|
Number of MCBs |
0 |
4 |
0% |
|
Number of PCIE_A1s |
0 |
1 |
0% |
|
Number of PCILOGICSEs |
0 |
2 |
0% |
|
Number of PLL_ADVs |
0 |
6 |
0% |
|
Number of PMVs |
0 |
1 |
0% |
|
Number of STARTUPs |
0 |
1 |
0% |
|
Number of SUSPEND_SYNCs |
0 |
1 |
0% |
|
Average Fanout of Non-Clock Nets |
3.02 |
|
|
|