/*
  Register definitions for slave core: SiTime 5359 interface

  * File           : sit5359_regs.h
  * Author         : auto-generated by wbgen2 from sit5359_if_wb.wb
  * Created        : 01/11/22 17:31:58
  * Standard       : ANSI C

    THIS FILE WAS GENERATED BY wbgen2 FROM SOURCE FILE sit5359_if_wb.wb
    DO NOT HAND-EDIT UNLESS IT'S ABSOLUTELY NECESSARY!

*/

#ifndef __WBGEN2_REGDEFS_SIT5359_IF_WB_WB
#define __WBGEN2_REGDEFS_SIT5359_IF_WB_WB

#include <inttypes.h>

#if defined( __GNUC__)
#define PACKED __attribute__ ((packed))
#else
#error "Unsupported compiler?"
#endif

#ifndef __WBGEN2_MACROS_DEFINED__
#define __WBGEN2_MACROS_DEFINED__
#define WBGEN2_GEN_MASK(offset, size) (((1<<(size))-1) << (offset))
#define WBGEN2_GEN_WRITE(value, offset, size) (((value) & ((1<<(size))-1)) << (offset))
#define WBGEN2_GEN_READ(reg, offset, size) (((reg) >> (offset)) & ((1<<(size))-1))
#define WBGEN2_SIGN_EXTEND(value, bits) (((value) & (1<<bits) ? ~((1<<(bits))-1): 0 ) | (value))
#endif


/* definitions for register: Control Register */

/* definitions for field: Sit5359 I2C Address in reg: Control Register */
#define SIT5359_CR_I2C_ADDR_MASK              WBGEN2_GEN_MASK(0, 8)
#define SIT5359_CR_I2C_ADDR_SHIFT             0
#define SIT5359_CR_I2C_ADDR_W(value)          WBGEN2_GEN_WRITE(value, 0, 8)
#define SIT5359_CR_I2C_ADDR_R(reg)            WBGEN2_GEN_READ(reg, 0, 8)

/* definitions for field: I2C Clock Divider (1 I2C bit = 4*(CLK_DIV+1)*clk_sys-period) in reg: Control Register */
#define SIT5359_CR_CLK_DIV_MASK               WBGEN2_GEN_MASK(8, 8)
#define SIT5359_CR_CLK_DIV_SHIFT              8
#define SIT5359_CR_CLK_DIV_W(value)           WBGEN2_GEN_WRITE(value, 8, 8)
#define SIT5359_CR_CLK_DIV_R(reg)             WBGEN2_GEN_READ(reg, 8, 8)

/* definitions for field: Sit5359 SPLL input enable in reg: Control Register */
#define SIT5359_CR_SPLL_EN                    WBGEN2_GEN_MASK(16, 1)

/* definitions for field: Sit5359 Oscillator Output Enable in reg: Control Register */
#define SIT5359_CR_OSC_OE                     WBGEN2_GEN_MASK(17, 1)

/* definitions for register: GPIO Set/Readback Register */

/* definitions for field: Sit5359 I2C bitbanged SCL in reg: GPIO Set/Readback Register */
#define SIT5359_GPSR_SCL                      WBGEN2_GEN_MASK(0, 1)

/* definitions for field: Sit5359 I2C bitbanged SDA in reg: GPIO Set/Readback Register */
#define SIT5359_GPSR_SDA                      WBGEN2_GEN_MASK(1, 1)

/* definitions for register: GPIO Clear Register */

/* definitions for field: Sit5359 I2C bitbanged SCL in reg: GPIO Clear Register */
#define SIT5359_GPCR_SCL                      WBGEN2_GEN_MASK(0, 1)

/* definitions for field: Sit5359 I2C bitbanged SDA in reg: GPIO Clear Register */
#define SIT5359_GPCR_SDA                      WBGEN2_GEN_MASK(1, 1)
/* [0x0]: REG Control Register */
#define SIT5359_REG_CR 0x00000000
/* [0x4]: REG GPIO Set/Readback Register */
#define SIT5359_REG_GPSR 0x00000004
/* [0x8]: REG GPIO Clear Register */
#define SIT5359_REG_GPCR 0x00000008
#endif
