CERN KiCad development roadmap

This page hosts a proposal for work packages, which are supposed to bring KiCad in par with the features of proprietary software that are required for designing boards of similar complexity to our SPEC and SVEC projects. We are actively working on these packages. If you would like to help us move faster through the list, please consider donating so we can use additional external help.

1. Unified geometry library

Type: framework/library
Goal: Clean up existing geometry routines. Add functionality necessary for more advanced DRC and P&S.
Depends on: none
First client: P&S router
Status: In progress
Specific release: along with the P&S router

A one-library-to-rule-them-all for spatial indexing and geometry operations on 2D shapes.
Specification

2. Push and Shove router

Type: tool
Goal: Modern routing tool.
Depends on: geometry library, view, tool
Status: Alpha version available
Specific release: pcbnew with P&S route tool

The initial aim was to develop a simple push & shove router and integrate it with existing pcbnew codebase, without any dependencies on the new view, etc. The requirements are:
  • routing single tracks with clearances as specified in the design rules.
  • walk-around and shove modes (for tracks).
  • initial version will have no via/component shoving support.
  • routing engine performs intermediate calculations on its internal model and updates the main (BOARD) model whenever a 'stable' routing is achieved.
  • routing engine might run in a separate thread, to make it more responsive.

The router is now available in kicad-pns-tom branch on Launchpad. It already uses the new frameworks (view, tool, GAL).

Launchpad link: https://code.launchpad.net/~cern-kicad/kicad/kicad-pns-tom
Demo 1: http://www.youtube.com/watch?v=kzro0Jc70xI
Demo 2: http://www.youtube.com/watch?v=zxHDAHpR5Ls

3. View component

Type: framework/library
Depends on: editable version depends on the tool framework
Goal: robust display layer for all KiCad applications, based on the GAL. Refactoring towards clean MVC model.
First client: tool framework
Status: non-editable pcbnew demo available
Specific release: pcbnew (and later on, all apps) with the new display engine.

Graphical item view for all KiCad applications, based on the Graphics Abstraction Layer.

Done:
  • Improve the GAL, so that it is capable of rendering a complex board on entry-level hardware. Initially, support two GAL backends:
    - OpenGL for 'normal' work. Must be extremely fast, things like anti-aliasing are second priority here.
    - Cairo for high quality rendering, bitmap export and maybe printing.
  • Integrate the VIEW in pcbnew. First stage of integration will result in non-editable view, that can be switched with the legacy one during run time.
To be done:
  • Second stage will come up with a fully functional VIEW, but will require significant refactoring in the tool code. The reason is that tools use a lot of XOR rendering to erase items off the screen, which is not compatible with any reasonably modern rendering environment.
  • Allow users to select own layer color scheme, layer transparency, drawing order, contrast and wireframe/solid rendering mode.
  • Given the experience gained with pcbnew, redo gerbview and schematics in the same manner.
  • After a review & testing period, remove legacy rendering from KiCad completely.
  • Refactor printing to use the GAL (via either wxDC or cairo). Cairo provides native printing (via GDI+) on Windows and a PS filter for Linux/OSX. Use native GTK printing dialog under Linux (default in wx 2.9)
  • (extra) evaluate the View class interface extensions that would enable native 3D editing.

Specification: http://www.ohwr.org/documents/231
Demo: https://code.launchpad.net/~cern-kicad/kicad/kicad-gal
Read more details..

4. Extend number of layers

Type: improvement
Depends on: none
Goal: More mechanical layers. Way for future extensions (split planes).
Status: planning
Specific release: pcbnew with extra mechanical/dimensioning layers.

Plan:
  • develop a type safe flag set template (or adapt something already available).
  • refactor pcbnew code to use it, removing 32 layer limitation.
  • add more mechanical layers.

5. Tool framework

Type: framework/library
Depends on: View component
Goal: Conflict-less way of developing tools. Script-driven tools. Refactoring towards clean MVC model.
First client: P&S router and new Selection tool.
Status: demo available
Specific release: pcbnew with fully functional P&S.

Specification: http://www.ohwr.org/documents/285
Demo: https://code.launchpad.net/~cern-kicad/kicad/testing

6. Page templates & script-driven text evaluation

Type: feature
Depends on: Python scripting.
Goal: Removing KICAD_GOST build option.
Status: page layout editor is available in the master branch (Pl_Editor)
Specific release: KiCad (all apps) with user-definable page templates.

Rationale:
Currently, the page frame is hardcoded. There is no possibility of changing its contents other than conditional compilation (i.e. KICAD_GOST flag).

Plan:
  • add option of saving graphical objects (no wiring/traces) into a template schematic/PCB file and attaching such file
    to a schematic/PCB.
  • mark items that belong to the template as non-editable (they can't be selected or otherwise altered).
  • add spreadsheet-style expressions for texts (i.e. placing a text '=GetBoard().GetCreationDate()' will be rendered as the date itself).
  • remove hardcoded page templates. Say goodbye to GOST flag.

7. Further modularization & decoupling

Type: improvement
Depends on: page templates, scripting, View/Tool frameworks.
Goal: Cleaner code. KiCad applications as DLLs/DSOs.
Status: planning
Specific release: KiCad with lightweight core and optional functionality done in plugins. Applications hosted as tabs in a common 'shell' window.

Plan:

  • remove unnecessary build flags. The main reason is to limit the number of possible build configurations, which is often abused by Linux users/package maintainers to produce incompatible software packages. Features that are truly optional, should never be handled by #ifdefs, but turned into DLL/DSO plugins or Python scripts. Such flags are:
    - KICAD_KEEPCASE: we should be either case-sensitive or not.
    - KICAD_SCRIPTING: basic feature that must not be disabled once fully integrated and tested: DRC classes will become scriptable, filter tool will require Python expressions.
    - KICAD_SCRIPTING_WXPYTHON: with the tool framework in place, wxPython console could become another DLL/DSO tool.
    - USE_WX_GRAPHICS_CONTEXT: will be replaced by the GAL/VIEW.
    - USE_WX_OVERLAY: same as above
    - USE_PCBNEW_NANOMETERS: P&S relies on the new BIU format. There is no reason to keep the old one.
    - USE_FP_LIB_TABLE: once done, it should become a standard feature.
    - wxUSE_UNICODE: does it make any sense to allow user to select this?
  • factorize all plugins into DLL/DSO libraries.
  • factorize plotting code away from the model code, move plotting code into plugins.
  • factorize 3D viewer code away from the model code (PAINTER-like equivalent for 3D or a 3D VIEW component).
  • move 3D model loading into plugins. Develop a global 3D model cache.
  • clean up program-specific #ifdefs (#ifdef EESCHEMA, #ifdef PCBNEW, etc.) in common code.
  • modify the UI code to host pcbnew/eeschema/gerbv as tabs inside the common shell.
  • compile eeschema, gerbview & pcbnew into DLLs/DSOs. If globals/statics cleanup is done correctly, several instances of these apps should run in parallel inside a common shell.

8. Integrated library browser

Type: feature
Depends on: apps as DLL/DSOs (point 6), View, FP_LIB_TABLE.
Goal: Selection of footprints / 3D models directly on schematic.
Status: planning
Specific release: eeschema with footprint assignment on schematic.

Plan:

  • develop a library browser: dockable window that allows selecting a component and assigning its footprint/3D model
    directly on the schematic (see attached drawing)
  • add a possibility to define the list of default footprints for each component in an SCH library.
  • modify eeschema to use the new browser & library editor to pre-assign footprints.
  • ditch cvpcb.

9. Improve UI

Type: improvement
Depends on: wxWidgets 3.0 (for AUI), tool framework
Goal: Clean up UI and improve its usability.
Status: planning
Specific release: All KiCad apps with new UI.

Plan:
  • Study ergonomics of various commercial/proprietary PCB applications (when in doubt about any particular UI solution, check how it has been done in a certain proprietary app that is very popular among OSHW folks and do exactly opposite).
  • Clean up menu structure. Menus must allow access to all features of the program in a clear and logical way. Currently some functions of pcbnew are accessible only through toolbars.
  • Use new wxWidgets and wxAUI for toolbars, enable detaching and disabling. This will probably need standardizing all builds (Windows, Linux, OSX) to use the same version of wxWidgets. At this point, wx 3.0 will be (hopefully) available.
  • Redesign dialogs, make sure they are following same style rules.
  • Check quality of translations. Either fix or remove bad quality translations.
  • Develop global shortcut manager that lets the user assign arbitrary shortcuts for any tool/action.

10. Improved DRC

Type: feature
Depends on: geometry library
Goal: Additional DRC checks.
Status: planning
Specific release: pcbnew with production quality DRC engine, ported to the new Geometry library

Plan:
  • replace all existing geometry code with the new geometry library.
  • ensure there is no floating point in any clearance-related calculations (rounding!).
  • add DRC checks: component/silkscreen/mask clearance.
  • fix polygon stitching issue
  • remove DRC-related limitations such as no arcs/text on copper layers.
  • on-line DRC (for less CPU-consuming checks).
  • add option for saving/loading DRC rules settings

11. Netlist comparator & ECO generation + pin/part swapping

Type: feature
Depends on: DLL/DSO KiCad apps
Goal: Pin/part swapping. Netlist diff tool.
Status: planning
Specific release: pcbnew with pin/part swapper.

Reason:

Currently KiCad does not track atomic changes between subsequent updates between SCH & PCB. We need a concept of an ECO (engineering change of order) that describes a list of atomic changes between two netlists. This will allow robust forward/backannotation between pcbnew and eeschema and enable features like pin/part/bus/differential pair swapping.

For instance, if the user modifies the value, footprint and swaps the pins of an electrolytic capacitor, the ECO shall
contain 6 following atomic entries:
  • ModifyValue (path: Top/unique_id_of_component, old: 100uF, new: 10uF)
  • ModifyFootprint (path: Top/unique_id_of_component, old: RADIAL5mm, new: CTE3216)
  • DisconnectPin (path: Top/unique_id_of_component, pin: 1)
  • DisconnectPin (path: Top/unique_id_of_component, pin: 2)
  • ConnectPin (path: Top/unique_id_of_component, pin: 1, net: net-a)
  • ConnectPin (path: Top/unique_id_of_component, pin: 2, net: net-b)

When updating the PCB/SCH, the list of changes is presented to the user and he is given a choice which ones get committed,
just like in a revision control system. The same mechanism can be used to diff netlists between different versions of schematics/PCB designs.

Plan:

  • develop netlist comparison engine (a class that takes two textual netlists and produces the ECO)
  • integrate into eeschema/PCBnew. Add "Update PCB/SCH" option that will launch comparison/annotation process.
  • develop pin swapping configuration dialog: for each of the components on the schematic, pins/subparts can be assigned to a swap group. Group information gets propagated to pcbnew via extra fields in the netlist.
  • develop pin/part swapper pcbnew tool, that highlights and numbers all swappable pins/parts (indicating swap groups using colors or labels), and upon clicking on a pair of pins that belong to same group, swaps their nets. Swapped net info is passed back to eeschema via the ECO mechanism.
  • support net label backannotation in the eeschema: for nets that have changed pins, net labels on wire stubs connected to pins are swapped.
  • (optional) graphical visualization of netlist changes.

12. Intelligent selection tool

Type: feature
Depends on: tool framework, geometry library
Goal: ability to select (just select) any objects on a schematic/PCB.
Status: testing version available in the lp:~cern-kicad/kicad/selection_tool
Specific release: pcbnew and eeschema with object selection and drag&drop editing.

Plan:

The first stage involves development of a neighbourhood-aware select tool. When the user clicks on a bunch of items that overlap, the tool should try to guess what item he meant. Few use cases are:
  • If the user clicks on a track that goes under a component, the track should be selected by default (without a clarification menu) if the component could be selected unambiguously just by clicking few pixels away.
  • If there are two overlapping tracks on different layers, disambiguation menu should be triggered only if the tracks are that is mutually covered is larger than certain threshold.
  • Component text could be selectable when the host component is selected.
  • Disambiguation menu could be extended to draw a miniature of each selection possibility.

Status:

  • It is possible to select single items by clicking them or select multiple items at the same time by drawing a selection box.
  • In case of disambiguation while selecting a single item, there is a context menu shown, that allows to decide which of items should be selected.
  • Items presented in the disambiguation menu are marked in a specific way as user highlights a menu entry.
  • Additive selection is possible by holding Shift key while selecting items (then the selection is being extended rather than discarding previous items and replacing them with the current choice).
  • Selected items can be modified by the move tool. The tool can be invoked using hot keys ('M' to start moving selected items, 'F' for flipping and 'R' for rotation while they are in the move), context menu (right mouse button click on selection to display one) or by simply dragging selected items with mouse.
  • There is a simple undo operation available, that rollbacks the current modifications before they are applied. To reverse the last operation, simply press ESC while dragging items.
  • The selection tool takes into account current display settings. That means that it does not select invisible items or those which are grayed out in the high contrast mode. It also does not allow to select lines that belong to modules and are displayed on silkscreen layer, in order not to break module drawings.
  • In cases when there can be a whole module or a single pad/track selected, the tool chooses the smaller object. Whole module can be selected by clicking on a space that does not contain any other objects or by using a selection box.
  • Zones can be selected either by clicking on any of their edges or by a selection box that contains the whole zone.

To do:

  • Combine the move tool and the push & shove router in order to make it possible to drag tracks without breaking them.
  • Fix 'moving cursor' bug that occurs when rotation or flip is invoked from the context menu.
  • Fix bug that causes to cancel the tool by pressing ESC while the context menu is active (it should rather close the menu and let the selection tool be still active).

13. Introspection & properties, inspector tool

Type: feature
Depends on: none.
Goal: inspector tool.
Status: planning
Specific release: pcbnew & eeschema with inspector tool. Cleaner codebase.

Develop or adapt an introspection/property system for KiCad classes. This will allow for:

  • much easier development of dialogs (less C++ coding). For advanced/rarely used settings,
    a generic name-type-value table is enough.
  • automatic serialization of settings classes to config/project files.
  • inspector tool - a name-type-value table containing all common properties of currently selected objects. Changing one
    property modifies it in all selected objects.

14. Virtual components & net attributes in eeschema

Type: feature
Depends on: none.
Status: planning
Specific release: eeschema with user-defined net attributes.

Plan:
  • add a graphical net property (attribute) object in eeschema. Such objects hold additional attributes, such as SI parameters (diff/single ended, impedance) or clearance information that is compiled into the PCB netlist.
  • add an option to declare certain components 'virtual'. Such components are not exported to PCB netlist, but can be used for simulations (i.e. U/I probes, votage sources, etc.)

15. Integrated simulator support

Type: feature
Depends on: virtual components, tool framework.
Goal: circuit simulation as easy as in LTSpice.
Status: planning
Specific release: eeschema with integrated simulator backend.

Plan:
  • do a survey of available simulators (candidates: spice, gnucap, Qucs)
  • find a nice plotting library that plays well with wxWidgets
  • add support for exporting netlists in the format supported by the simulator
  • handle simulator output in a consistent way through our plotting library (in LTSpice, it is done remarkably well!)
  • develop a 'fine tune' tool that allows modification of component values on-the-fly. Each value gets a scrollbar/knob. Adjusting the knob re-runs the simulation and updates the plots. May require hacking the simulator code.
  • put all of above in a plugin. There can be multiple plugins, supporting different simulators.
  • define a library of simulation-only components (sources, ideal RCL, voltage/current probes, etc).

16. Differential pair/bus routing support

Type: feature
Depends on: virtual components, tool framework, P&S, net properties, improved DRC, geometry library.
Goal: full differential pair support.
Status: planning
Specific release: eeschema & pcbnew with diff pair routing

Plan:
  • Modify P&S to support multi-track routing
  • Extend layers settings dialog in pcbnew to input basic SI parameters: permittivity, losse factor, thickness and reference planes for each copper/core/prepreg layer.
  • Integrate PCB calculator code into PCBnew/eeschema allowing for direct control of track impedance. Impedance for the lines could be defined as a net property/attribute.
  • Add necessary rules and DRC checks: differential pair impedance match, max uncoupled distance, min/max gap (per-layer), intra-pair skew, corner angles.
  • Add differential pair markers in eeschema (can be done as a virtual component that is connected to a net).

17. Split plane support

(to be continued)

18. Improve dimensioning in pcbnew

(to be continued)

19. Improved 3D model support

STEP/IGES support for KiCad
Specification