Project description¶
FmcAdc200k16b11cha is an 11 channel 200kSPS 16 bit ADC card in FMC (FPGA Mezzanine Card) standard. The input voltage range is settable to +/-10V or +/-5V. The input impedance is 1MOhm. It is based on the AD7606 ADC from Analog Devices.
| Parameter | Value |
|---|---|
| max. sample rate | 200 kS/s max. |
| analog bandwidth | 22 kHz ( +/-10 V), 14 kHz ( +/-5 V) |
| bits/sample | 16 bit |
| input voltage range | +/-10 V, +/-5 V software selectable |
| channels | 13 - custom made cable, 11 - standard camera link cable |
| connectors | Connector Mini D Ribbon (MDR), CAMERA LINK compatible |
| antialiasing filter | 2-pole, included |
| input impedance | 1 MOhm |
| FMC to carrier interface | FMC low pin count connector |
| ADC interface | standard (/RD, /WR, parallel data bus) |
| Clock source: | internal VCO - for synchronization ability |
| Trigger | External and internal with threshold and slope |
| Timebase | 200 kS/s to 100 S/s in 1, 2, 5 steps |
| Delay | From - Timebase to 2^32 samples |
| Time stamps | for trigger, resettable by software |
| Coupling | DC only |
Block diagram¶
Project documents¶
FmcAdc100k16b8cha schematics - PDF file:
http://www.ohwr.org/attachments/download/289/FmcAdc16b100k8cha.pdf
FmcAdc100k16b8cha PCB - PDF file:
http://www.ohwr.org/attachments/download/299/PCB.pdf
Short description of the schematic:
http://www.ohwr.org/attachments/download/315/FmcAdc100k16b13cha_description.pdf
Comparison of four ADCs that could be potentially used in the project - PDF file:
http://www.ohwr.org/attachments/download/103/FmcAdc_8_channel_-_ADC_comparison.pdf
Analog Devices AD7606 ADC selected.
Connector choice (also used in the digital I/O FMC project)
http://www.ohwr.org/projects/fmc-projects/wiki/FMC_Multi-pin
Status¶
| Date | Event |
|---|---|
| 29-03-2010 | ADC choice made. First draft of the design idea. |
| 30-03-2010 | Price estimation and widened feature list added. Waiting for the Altium Designer ADC symbol. |
| 12-07-2010 | Restart of design work. |
| 20-09-2010 | The PCB is now ready. Waiting for VHDL to be developped. |
| 01-10-2010 | Designer left. Design has to be reviewed and sent through design office to continue. |
| 01-07-2011 | Technical student Ross Millar picks up the design. |
| 19-07-2011 | Several Issues found. Existing prototypes still usable for debugging. |
| 28-07-2011 | First sine-wave read from the ADC board plugged on a SPEC board adc-fmc-100ks.png |
| 21-10-2011 | Schematics design review will be held. |
| 25-10-2011 | Schematic review : DesignReview21102011. |
| 15-12-2011 | Schematics improved, PCB redesigned and proto built. Working. |
| 13-01-2012 | Project on hold as Technical student left. Need still to create production files, pre-production proto and finalisation of firmware and documentation. |
Ross Millar, Maciej Fimiarz, Erik van der Bij - 13 January 2012
