FMC ADC 1G 10b 2cha

Project description

The FmcAdc1G12b2cha is a 2 channel 1GSPS 10 bit ADC card in FMC (FPGA Mezzanine Card) format using an LPC connector. The gain can be set by software in three steps: +/-50mV, +/-0.5V, +/-5V. An offset circuit is used in the front-end design of the ADC board and allows a voltage shift in the same range as the chosen gain.

Main Features

Parameter Value
max. sample rate 1 GSPS
bits/sample 10 bit
ENOB > 8 bit
channels 2
connectors 2 x LEMO 00 for signals, 1 x LEMO 00 for trigger
analog bandwidth 250 MHz. DC-coupled
input impedance 50 Ohm
gain steps +/-50 mV, +/-0.5 V, +/-5 V for full scale
offset correction range same as the set gain
max. gain error
FMC to carrier interface FMC low pin count connector (LPC)
ADC interface serial LVDS
clock source internal: from programmable on-board oscillator (synchronisable with White Rabbit)

Optional parameters

Parameter Value
differential inputs option to have differential inputs instead of single-ended
max. sample rate implement a 500 KSPS version (125 MHz bandwidth) if the price difference is significant
precision precision is not the most important parameter for the foreseen applications at CERN
gain steps +/-50 mV, +/-0.5 V, +/-5 V for full scale. Other ranges in x1, x2 and x5 would be nice to have

Other system specifications

Parameter Value
sample memory 128 ksamples
synchronisation possibility to link several cards to share and synchronise sampling clock, likely implemented by cross-linking carrier cards
readout functionality scaling multiplication in hardware
peak (min/max) detection in hardware for blocks of n samples, storing only these peak values

Project information


General question about project


Date Event
03-08-2011 Start of project.
14-09-2011 Preliminary study of an ADC mezzanine, 1 GSps, 10bits, 2 channels published
30-09-2011 Project on hold. Not resourced.
20-11-2013 A company is interested in designing this card, but development cost may be a problem.
Are you interested? Contact Erik!
08-2015 Summer student made a design study.

Erik van der Bij - 9 November 2015