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FMC Projects » FMC PCIe Carrier (PFC)

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Wiki

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Index by title

  • Configuration Options
  • DebugTools
  • Description
  • DesignFlow
  • FMCCaseStudies
  • FMC I2C Bus can be controlled either by FPGA GN4124 I2C bus or GN4124 GPIOs
  • FMCPCIeCompList
  • FPGA configured through SPI Flash or through the GN4124 SPRI interface
  • FPGA HSWAP tied to VADJ P3V3 to GND or SPRI XI SWAP
  • FunctionalSpec
  • GN4124 booting from serial eeprom or not
  • GN4124 local bus clocked by PCIe clock or local oscillator
  • JTAGChainAndConfiguration
  • Negative Power suplies MountedNot mounted
  • Oscillators can be chosen between Rakon VT3205CR or Mercury VM53S3
  • P5V switching regulator generating 5V or 3V7
  • PciInterface
  • Planning
  • PowerSupplies
  • Power supplies switching frequency spread spectrum modulated or fixed
  • Reduced PFC
  • Requirements
  • Review03082010
  • Review13092010
  • SCANSTA112 bypassed
  • SCANSTA112 full transparent mode disabled or enabled
  • SchReview
  • Standard Negative PFC
  • Standard PFC
  • TechSpec
  • Two parallel VTT Drivers for QDR and GN4124 or only one
  • VADJ enabled from power up or switched on by FPGA
  • VADJ fixed to 2V5 or variable

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