Overview
A simple 4-lane PCIe carrier for FPGA Mezzanine Cards (VITA 57). It has memory and clocking resources and supports the White Rabbit timing and control network.
- Subprojects: Software support for the SPEC board
- Status: Release
Members
Manager: Erik van der Bij, Javier Serrano, Matthieu Cattin, Tomasz Wlostowski
Developer: Alessandro Rubini, Carlos Gil Soriano, Grzegorz Kasprowicz, Martin Brückner, Ralf Wischnewski, Samuel Iglesias Gonsálvez