Roadmap

EDA-02189-V4-0

Start date 19/08/2011 Due date

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0 closed (0%)   1 open (100%)

EDA-02189-V5-0

Start date 15/09/2011 Due date

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0 closed (0%)   12 open (100%)

Related issues
Feature #346: V4 - PCB Via annular ring size too small for IPC Class 3
Feature #347: V4 - Typo in schematic
Feature #349: V4 - Still OHL 1.0 in a production doc
Feature #350: V4 - Drill size tolerance too tight for 3,5mm.
Feature #351: V4 - PCB size not the same on panel and single design
Feature #390: Annular ring PTH for capacitors may be made larger?
Feature #398: V4 - Move capacitor to cooler area to improve reliability
Feature #507: V4 - Decoupling done different than Xilinx AN
Feature #508: V4 - Line impedances should be verified