Explore projects
-
DI/OT Kintex Ultrascale-based Peripheral Board with HPC FMC and SODIMM DDR4 slot. More info at the Wiki page
Updated -
This project guides new users to start in the White Rabbit “World” with simple experiments. The starting kit uses two SPEC + FMC-DIO cards. Each node allows basic operations such as input timestamping or programmable output pulse generation. Additionally, specific software and gateware layers allow to use it as a standard network interface card implementing the White Rabbit technology functionalities.
Updated -
A High Pin Count FMC carrier in VXS format with two Virtex 5 FPGAs plus a DSP on board.
Updated -
A simple VME64x carrier for two low pin count FPGA Mezzanine Cards (VITA 57). It has memory and clocking resources and supports the White Rabbit timing and control network. Commercially available. More info at the Wiki page
Updated -
Software support for the SVEC board, including kernel and user-space Linux code.
Updated -
A simple VME64x carrier for two high pin count FPGA Mezzanine Cards (VITA 57). It has memory and clocking resources and supports the White Rabbit timing and control network. Follow-up of SVEC.
Updated -
A simple 4-lane PXIe carrier for a low pin count FPGA Mezzanine Card (VITA 57). It supports the White Rabbit timing and control network. Commercially available. Labview driver available for Fine Delay and TDC mezzanines. More info at the Wiki page
Updated -
A simple 4-lane PCIe carrier for a low pin count FPGA Mezzanine Card (VITA 57). It supports the White Rabbit timing and control network. Commercially available. Linux and Labview drivers available for some mezzanine cards. More info at the Wiki page
Updated -
Projects / Simple PCIe FMC carrier SPEC - Software
GNU General Public License v2.0 or laterSoftware support for the SPEC board, including kernel and user-space Linux code. The package also include the fmc-bus driver, which is expected to be used by other carriers as well.
Updated -
The spec-box-3n allows to use up to three SPEC FMC carriers in stand-alone mode, not plugged inside a PC. An internal 230V supply module powers the SPEC boards. The box contains fans to cool the cards. More info at the Wiki page
Updated -
The spec-box-1n allows to use a SPEC FMC carrier in stand-alone mode, not plugged inside a PC. An external 12 volt supply should be used to power the box. There is no forced ventilation in the box. More info at the Wiki page
Updated -
Stand Alone Carrier with 18 FMC LPC slots based on Spartan FPGAs, mini-ITX board and ATX supply. More info at the Wiki page
Updated -
RHINO (Reconfigurable Hardware Interface for computiNg and radiO) is a compute platform consisting of a FPGA element with dedicated memory, high speed communication, and FMC-LPC (Vita 57.1) IO expansion slots, all controlled via an ARM Cortex A8 processor running the BORPH operating system.
For progress updates, follow us on twitter @rhinoplatform
Updated -
FMC carrier equipped with a Power PC embedded processor. In addition to the SPEC it has 2 gigabit Ethernet ports, one mini PCIe connector and USB 2.0 HS. It is supplied from a single 12V and runs Linux. The FPGA is configured from the processor and also interfaced using PCI Express x1 and a local bus. The system boots from on-board NAND or NOR flash memory.
Updated -
Linux device driver and associated utilities for PCIe FMC carriers. Aka GnuRabbit.
Updated -
An FMC for clock & data recovery from optical sources.
Updated -
FMC WorldFIP is an interface card for the WorldFIP network in an LPC FMC form-factor. The hardware is described in the FMC WorldFIP project.
Updated -
An LPC FMC board which seeks to distribute digital I/O. It is designed to operate at least at 10 MHz, however a better design could allow this board to operate at much higher frequencies. This board is compatible with "PMOD" Connectors.
Updated -
Projects / LHC Instability Trigger Distribution LIST
GNU General Public License v3.0 onlyLIST is a trigger distribution system based on White Rabbit. It can receive a trigger from a “cloud” of devices and distribute it to all relevant devices to for example freeze their acquisition buffers. The latency between reception and transmission of a trigger is done with a low and notably fixed latency, with an accuracy of better than 1 ns. The hardware of the LIST nodes is based on the SVEC FMC carrier equipped with a FMC TDC mezzanine and a Fine Delay mezzanine. More info at the Wiki page
Updated