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Projects / VME64x core
A VHDL core for a VME64x slave. The other side behaves like a Wishbone master.
More info at the Wiki page2updated -
Projects / WRS with low jitter logic integrated
White Rabbit Switch WRS-3/18 (hardware version 3.4) with the low-jitter daughterboard integrated. More info at the Wiki page
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Projects / OHR Meta Project
A meta project used to discuss and present information about Open Hardware and related subjects. More info at the Wiki page More info about the CERN Open Hardware licence More info about the OHR.org site support
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Projects / EtherBone Core
Etherbone is an FPGA-core that connects Ethernet to internal on-chip wishbone buses permitting any core to talk to any other across Ethernet.
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Projects / wr2rf-vme
A VME card that is used to recover RF, bunch and revolution clocks over a white rabbit network.
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Projects / White Rabbit Trigger Distribution
White Rabbit Trigger Distribution project. More info at the Wiki page
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Projects / Power Supply Interface Module PSIM
Interface box easing the integration of commercially available (high-voltage) power supplies into a Profibus or Profinet control system. The control system will always see the same API. Implements vendor-specific adaptation (logic, voltage levels).
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Projects / Conv TTL RS485 - Hardware
Hardware design of Conv TTL RS485
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Projects / White Rabbit Switch - Hardware
This project covers the hardware development of the White Rabbit switch.
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Projects / CERN Open Hardware Licence
A project devoted to developing and discussing the CERN Open Hardware Licence. More info at the Wiki page
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Mathieu Saccani / VME64x core - msaccani
A VHDL core for a VME64x slave. The other side behaves like a Wishbone master.
More info at the Wiki page0updated -
Projects / WRS Low Jitter Daughterboard
The aim of the board is to improve the performance of the WR Switch using an external PLL and a new VCTCXO. More info at the Wiki page
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Projects / PandABox-hw
Hardware design of the PandABox. Includes schematics, PCB layout and manufacturing files.
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Projects / ZIO
A software framework for Linux device drivers aimed at supporting controls and data acquisition hardware. ZIO supports sub-nanosecond timestamps, block-oriented input and output and transport of meta-data with the data samples. Users can change the buffer type and trigger type associated with a device at run time, and all of devices, triggers and buffers are easily implemented as add-on modules.
The PF_ZIO implementation, currently in beta status, implements a network interface to the ZIO transport, which allows each I/O channel to generate or receive network frames. Applications see the network of devices and can talk with several of them from the same socket. We support SOCK_STREAM, SOCK_DGRAM and SOCK_RAW.
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Projects / CernFIP
WorldFIP is a deterministic rad-tol fieldbus used at CERN's LHC for a variety of control systems. Cryogenics, Power Converters, Beam Instrumentation and other critical systems are using WorldFIP for the exchange of data between their sensors and actuators and the control and supervision level. With Alstom phasing out WorldFIP support in 2009, it was decided to insource this technology at CERN.
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Projects / CERN BE-CO-HT contribution to KiCad
This project hosts documentation and code to be contributed by CERN's BE-CO-HT section to the KiCad PCB design tool. More info at the Wiki page
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Projects / AMC FMC Carrier AFC
AMC FMC Carrier is designed to support FMC boards. Equipped with Xilinx Artix-7 FPGA. It allows to connect clock source to any clock input. More info at the Wiki page
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Projects / PXIe controller COM Express based testing support
Production and functional tests for PXIe controller COM Express based. More info at the Wiki page
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Projects / Hydra - a radiation-tolerant SoC
Hydra is a RISC-V based radiation-tolerant SoC designed to operate up to 500 Gy TID. See the wiki for more details.
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Projects / FMC TDC 1ns 5cha - Testing
Production and functional tests for FMC TDC 1ns 5cha.
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