Commit 60942363 authored by Lucas Russo's avatar Lucas Russo

Merge branch 'devel'

parents cccb1086 088329d9
...@@ -8,8 +8,9 @@ compiler: ...@@ -8,8 +8,9 @@ compiler:
sudo: false sudo: false
env: env:
- BOARD=ml605 EXAMPLES=with_examples LIBS_LINK=without_libs_link - BOARD=ml605 EXAMPLES=yes SYSTEM_INTEGRATION=no APP=ebpm
- BOARD=afcv3 EXAMPLES=with_examples LIBS_LINK=without_libs_link - BOARD=afcv3 EXAMPLES=yes SYSTEM_INTEGRATION=no APP=ebpm
- BOARD=afcv3_1 EXAMPLES=yes SYSTEM_INTEGRATION=no APP=ebpm
addons: addons:
apt: apt:
......
...@@ -10,9 +10,12 @@ OBJDUMP ?= $(CROSS_COMPILE)objdump ...@@ -10,9 +10,12 @@ OBJDUMP ?= $(CROSS_COMPILE)objdump
OBJCOPY ?= $(CROSS_COMPILE)objcopy OBJCOPY ?= $(CROSS_COMPILE)objcopy
SIZE ?= $(CROSS_COMPILE)size SIZE ?= $(CROSS_COMPILE)size
MAKE ?= make MAKE ?= make
DEPMOD ?= depmod
# Select board in which we will work. Options are: ml605 or afcv3 # Select board in which we will work. Options are: ml605 or afcv3
BOARD ?= ml605 BOARD ?= ml605
# Select which application we want to generate. Options are: ebpm
APPS ?= ebpm
# Select if we want to have the AFCv3 DDR memory shrink to 2^28 or the full size 2^32. Options are: (y)es ot (n)o. # Select if we want to have the AFCv3 DDR memory shrink to 2^28 or the full size 2^32. Options are: (y)es ot (n)o.
# This is a TEMPORARY fix until the AFCv3 FPGA firmware is fixed. If unsure, select (y)es. # This is a TEMPORARY fix until the AFCv3 FPGA firmware is fixed. If unsure, select (y)es.
SHRINK_AFCV3_DDR_SIZE ?= y SHRINK_AFCV3_DDR_SIZE ?= y
...@@ -29,10 +32,13 @@ FMC130M_4CH_EEPROM_PROGRAM ?= ...@@ -29,10 +32,13 @@ FMC130M_4CH_EEPROM_PROGRAM ?=
WITH_DEV_MNGR ?= y WITH_DEV_MNGR ?= y
# Selects the AFE RFFE version. Options are: 2 # Selects the AFE RFFE version. Options are: 2
AFE_RFFE_TYPE ?= 2 AFE_RFFE_TYPE ?= 2
# Selects if we want to compile DEVIO Config. Options are: y(es) or n(o). # Selects if we want to compile specfic APP Config. Options are: y(es) or n(o).
# If selected, the FPGA firmware must have the AFC diagnostics module # If selected, the FPGA firmware must have the AFC diagnostics module
# synthesized. # synthesized.
WITH_DEVIO_CFG ?= y WITH_APP_CFG ?= y
# Installation prefix for the scripts. This is mainly used for testing the build
# system. Usually this is empty
SCRIPTS_PREFIX ?=
# Selects the install location of the config file # Selects the install location of the config file
PREFIX ?= /usr/local PREFIX ?= /usr/local
export PREFIX export PREFIX
...@@ -43,6 +49,12 @@ export CFG_DIR ...@@ -43,6 +49,12 @@ export CFG_DIR
CFG ?= crude_defconfig CFG ?= crude_defconfig
export CFG export CFG
# All of our supported boards
SUPPORTED_ML605_BOARDS = ml605
export SUPPORTED_ML605_BOARDS
SUPPORTED_AFCV3_BOARDS = afcv3 afcv3_1
export SUPPORTED_AFCV3_BOARDS
# Config filename # Config filename
CFG_FILENAME = bpm_sw.cfg CFG_FILENAME = bpm_sw.cfg
...@@ -80,18 +92,18 @@ CFLAGS_USR = -std=gnu99 -O2 ...@@ -80,18 +92,18 @@ CFLAGS_USR = -std=gnu99 -O2
override CPPFLAGS += override CPPFLAGS +=
override CXXFLAGS += override CXXFLAGS +=
ifeq ($(BOARD),afcv3) ifeq ($(BOARD),$(filter $(BOARD),$(SUPPORTED_AFCV3_BOARDS)))
ifeq ($(SHRINK_AFCV3_DDR_SIZE),y) ifeq ($(SHRINK_AFCV3_DDR_SIZE),y)
CFLAGS_USR += -D__SHRINK_AFCV3_DDR_SIZE__ CFLAGS_USR += -D__SHRINK_AFCV3_DDR_SIZE__
endif endif
endif endif
# Board selection # Board selection
ifeq ($(BOARD),ml605) ifeq ($(BOARD),$(filter $(BOARD),$(SUPPORTED_ML605_BOARDS)))
CFLAGS_USR += -D__BOARD_ML605__ -D__WR_SHIFT_FIX__=2 CFLAGS_USR += -D__BOARD_ML605__ -D__WR_SHIFT_FIX__=2
endif endif
ifeq ($(BOARD),afcv3) ifeq ($(BOARD),$(filter $(BOARD),$(SUPPORTED_AFCV3_BOARDS)))
CFLAGS_USR += -D__BOARD_AFCV3__ -D__WR_SHIFT_FIX__=0 CFLAGS_USR += -D__BOARD_AFCV3__ -D__WR_SHIFT_FIX__=0
endif endif
...@@ -104,6 +116,15 @@ ifeq ($(FMC130M_4CH_EEPROM_PROGRAM),passive) ...@@ -104,6 +116,15 @@ ifeq ($(FMC130M_4CH_EEPROM_PROGRAM),passive)
CFLAGS_USR += -D__FMC130M_4CH_EEPROM_PROGRAM__=2 CFLAGS_USR += -D__FMC130M_4CH_EEPROM_PROGRAM__=2
endif endif
# Program FMC250M_4CH EEPROM
ifeq ($(FMC250M_4CH_EEPROM_PROGRAM),active)
CFLAGS_USR += -D__FMC250M_4CH_EEPROM_PROGRAM__=1
endif
ifeq ($(FMC250M_4CH_EEPROM_PROGRAM),passive)
CFLAGS_USR += -D__FMC250M_4CH_EEPROM_PROGRAM__=2
endif
# Compile DEV MNGR or not # Compile DEV MNGR or not
ifeq ($(WITH_DEV_MNGR),y) ifeq ($(WITH_DEV_MNGR),y)
CFLAGS_USR += -D__WITH_DEV_MNGR__ CFLAGS_USR += -D__WITH_DEV_MNGR__
...@@ -117,9 +138,9 @@ ifeq ($(AFE_RFFE_TYPE),2) ...@@ -117,9 +138,9 @@ ifeq ($(AFE_RFFE_TYPE),2)
CFLAGS_USR += -D__AFE_RFFE_V2__ CFLAGS_USR += -D__AFE_RFFE_V2__
endif endif
# Compile DEVIO Config or not # Compile APP Config or not
ifeq ($(WITH_DEVIO_CFG),y) ifeq ($(WITH_APP_CFG),y)
CFLAGS_USR += -D__WITH_DEVIO_CFG__ CFLAGS_USR += -D__WITH_APP_CFG__
endif endif
ifneq ($(CFG_DIR),) ifneq ($(CFG_DIR),)
...@@ -130,6 +151,10 @@ ifneq ($(CFG_FILENAME),) ...@@ -130,6 +151,10 @@ ifneq ($(CFG_FILENAME),)
CFLAGS_USR += -D__CFG_FILENAME__=$(CFG_FILENAME) CFLAGS_USR += -D__CFG_FILENAME__=$(CFG_FILENAME)
endif endif
# Malamute 1.0.0 requires this to be defined
# as all of its API is in DRAFT state
CFLAGS_USR += -DMLM_BUILD_DRAFT_API
# Debug conditional flags # Debug conditional flags
CFLAGS_DEBUG = CFLAGS_DEBUG =
...@@ -182,6 +207,9 @@ OBJS_PLATFORM = ...@@ -182,6 +207,9 @@ OBJS_PLATFORM =
# Source directory # Source directory
SRC_DIR = src SRC_DIR = src
# Prepare "apps" include
APPS_MKS = $(foreach mk,$(APPS),$(SRC_DIR)/apps/$(mk)/$(mk).mk)
# Include other Makefiles as needed here # Include other Makefiles as needed here
include $(SRC_DIR)/sm_io/sm_io.mk include $(SRC_DIR)/sm_io/sm_io.mk
include $(SRC_DIR)/dev_mngr/dev_mngr.mk include $(SRC_DIR)/dev_mngr/dev_mngr.mk
...@@ -189,6 +217,8 @@ include $(SRC_DIR)/dev_io/dev_io.mk ...@@ -189,6 +217,8 @@ include $(SRC_DIR)/dev_io/dev_io.mk
include $(SRC_DIR)/msg/msg.mk include $(SRC_DIR)/msg/msg.mk
include $(SRC_DIR)/revision/revision.mk include $(SRC_DIR)/revision/revision.mk
include $(SRC_DIR)/boards/$(BOARD)/board.mk include $(SRC_DIR)/boards/$(BOARD)/board.mk
include $(SRC_DIR)/boards/common/common.mk
include $(APPS_MKS)
# Project boards # Project boards
boards_INCLUDE_DIRS = -Iinclude/boards/$(BOARD) boards_INCLUDE_DIRS = -Iinclude/boards/$(BOARD)
...@@ -205,31 +235,25 @@ override CFLAGS += $(CFLAGS_USR) $(CFLAGS_PLATFORM) $(CFLAGS_DEBUG) $(CPPFLAGS) ...@@ -205,31 +235,25 @@ override CFLAGS += $(CFLAGS_USR) $(CFLAGS_PLATFORM) $(CFLAGS_DEBUG) $(CPPFLAGS)
override LDFLAGS += $(LDFLAGS_PLATFORM) override LDFLAGS += $(LDFLAGS_PLATFORM)
# Output modules # Output modules
OUT = $(dev_mngr_OUT) $(dev_io_OUT) OUT = $(dev_mngr_OUT)
# Get each APP OUT module
OUT += $(foreach out,$(APPS),$($(out)_OUT))
# All possible output modules # All possible output modules
ALL_OUT = $(dev_mngr_all_OUT) $(dev_io_all_OUT) ALL_OUT = $(dev_mngr_all_OUT)
# Get each APP all possible output modules
ALL_OUT += $(foreach all_out,$(APPS),$($(all_out)_all_OUT))
# Out objects # Out objects
dev_mngr_OBJS += $(dev_mngr_core_OBJS) $(debug_OBJS) \ dev_mngr_OBJS += $(dev_mngr_core_OBJS) $(debug_OBJS) \
$(exp_ops_OBJS) $(thsafe_msg_zmq_OBJS) \ $(exp_ops_OBJS) $(thsafe_msg_zmq_OBJS) \
$(ll_io_utils_OBJS) $(dev_io_core_utils_OBJS) $(ll_io_utils_OBJS) $(dev_io_core_utils_OBJS)
dev_io_OBJS += $(dev_io_core_OBJS) $(ll_io_OBJS) \ common_app_OBJS = $(dev_io_core_OBJS) $(ll_io_OBJS) \
$(sm_io_OBJS) $(msg_OBJS) $(board_OBJS) $(sm_io_OBJS) $(msg_OBJS) $(board_OBJS) \
$(board_common_OBJS)
dev_io_cfg_OBJS += $(dev_io_core_OBJS) $(ll_io_OBJS) \ apps_OBJS = $(foreach app_obj,$(APPS),$($(app_obj)_all_OBJS))
$(sm_io_OBJS) $(msg_OBJS) $(board_OBJS)
# Specific libraries for OUT targets
dev_mngr_LIBS =
dev_mngr_STATIC_LIBS =
dev_io_LIBS = -lbsmp
dev_io_STATIC_LIBS =
dev_io_cfg_LIBS = -lbsmp
dev_io_cfg_STATIC_LIBS =
.SECONDEXPANSION: .SECONDEXPANSION:
...@@ -242,8 +266,9 @@ OBJS_all = $(ll_io_OBJS) \ ...@@ -242,8 +266,9 @@ OBJS_all = $(ll_io_OBJS) \
$(sm_io_OBJS) \ $(sm_io_OBJS) \
$(msg_OBJS) \ $(msg_OBJS) \
$(dev_mngr_OBJS) \ $(dev_mngr_OBJS) \
$(dev_io_OBJS) \ $(common_app_OBJS) \
$(dev_io_cfg_OBJS) \ $(apps_OBJS) \
$(board_common_OBJS) \
$(revision_OBJS) $(revision_OBJS)
# Sources # Sources
...@@ -273,7 +298,7 @@ revision_SRCS = $(patsubst %.o,%.c,$(revision_OBJS)) ...@@ -273,7 +298,7 @@ revision_SRCS = $(patsubst %.o,%.c,$(revision_OBJS))
all: cfg $(OUT) all: cfg $(OUT)
# Output Rule # Output Rule
$(OUT): $$($$@_OBJS) $(revision_OBJS) $(OUT): $$($$@_OBJS) $(common_app_OBJS) $(revision_OBJS)
$(CC) $(LDFLAGS) $(LFLAGS) $(CFLAGS) $(INCLUDE_DIRS) -o $@ $^ $($@_STATIC_LIBS) $(LIBS) $($@_LIBS) $(PROJECT_LIBS) $(CC) $(LDFLAGS) $(LFLAGS) $(CFLAGS) $(INCLUDE_DIRS) -o $@ $^ $($@_STATIC_LIBS) $(LIBS) $($@_LIBS) $(PROJECT_LIBS)
# Special rule for the revision object # Special rule for the revision object
...@@ -322,11 +347,13 @@ ifeq ($(wildcard $(DRIVER_OBJ)),) ...@@ -322,11 +347,13 @@ ifeq ($(wildcard $(DRIVER_OBJ)),)
@echo "PCI driver not found!"; @echo "PCI driver not found!";
endif endif
# Install just the driver and lib, not udev rules
pcie_driver_install: pcie_driver_install:
$(MAKE) -C $(PCIE_DRIVER_DIR) install $(MAKE) -C $(PCIE_DRIVER_DIR) core_driver_install lib_driver_install
$(DEPMOD) -a
pcie_driver_uninstall: pcie_driver_uninstall:
$(MAKE) -C $(PCIE_DRIVER_DIR) uninstall $(MAKE) -C $(PCIE_DRIVER_DIR) core_driver_uninstall lib_driver_uninstall
pcie_driver_clean: pcie_driver_clean:
$(MAKE) -C $(PCIE_DRIVER_DIR) clean $(MAKE) -C $(PCIE_DRIVER_DIR) clean
...@@ -483,8 +510,8 @@ libs_uninstall: liberrhand_uninstall libconvc_uninstall libhutils_uninstall \ ...@@ -483,8 +510,8 @@ libs_uninstall: liberrhand_uninstall libconvc_uninstall libhutils_uninstall \
libs_clean: liberrhand_clean libconvc_clean libhutils_clean \ libs_clean: liberrhand_clean libconvc_clean libhutils_clean \
libdisptable_clean libllio_clean libbpmclient_clean libsdbfs_clean libdisptable_clean libllio_clean libbpmclient_clean libsdbfs_clean
libs_mrproper: liberrhand_clean libconvc_clean libhutils_clean \ libs_mrproper: liberrhand_mrproper libconvc_mrproper libhutils_mrproper \
libdisptable_clean libllio_clean libbpmclient_clean libsdbfs_mrproper libdisptable_mrproper libllio_mrproper libbpmclient_mrproper libsdbfs_mrproper
# External project dependencies # External project dependencies
...@@ -500,11 +527,9 @@ deps_mrproper: libbsmp_mrproper lib_pcie_driver_mrproper ...@@ -500,11 +527,9 @@ deps_mrproper: libbsmp_mrproper lib_pcie_driver_mrproper
core_install: core_install:
$(foreach core_bin,$(OUT),install -m 755 $(core_bin) ${PREFIX}/bin $(CMDSEP)) $(foreach core_bin,$(OUT),install -m 755 $(core_bin) ${PREFIX}/bin $(CMDSEP))
$(foreach core_script,$(INIT_SCRIPTS),install -m 755 $(core_script) ${PREFIX}/etc $(CMDSEP))
core_uninstall: core_uninstall:
$(foreach core_bin,$(ALL_OUT),rm -f ${PREFIX}/bin/$(core_bin) $(CMDSEP)) $(foreach core_bin,$(ALL_OUT),rm -f ${PREFIX}/bin/$(core_bin) $(CMDSEP))
$(foreach core_script,$(INIT_SCRIPTS),rm -f ${PREFIX}/etc/$(core_script) $(CMDSEP))
core_clean: core_clean:
rm -f $(OBJS_all) $(OBJS_all:.o=.d) rm -f $(OBJS_all) $(OBJS_all:.o=.d)
...@@ -512,6 +537,18 @@ core_clean: ...@@ -512,6 +537,18 @@ core_clean:
core_mrproper: core_mrproper:
rm -f $(ALL_OUT) rm -f $(ALL_OUT)
scripts_install:
$(MAKE) -C scripts SCRIPTS_PREFIX=${SCRIPTS_PREFIX} install
scripts_uninstall:
$(MAKE) -C scripts SCRIPTS_PREFIX=${SCRIPTS_PREFIX} uninstall
scripts_clean:
$(MAKE) -C scripts clean
scripts_mrproper:
$(MAKE) -C scripts mrproper
tests: tests:
$(MAKE) -C tests all $(MAKE) -C tests all
...@@ -547,17 +584,17 @@ cfg_mrproper: ...@@ -547,17 +584,17 @@ cfg_mrproper:
install: core_install deps_install liberrhand_install libconvc_install \ install: core_install deps_install liberrhand_install libconvc_install \
libhutils_install libdisptable_install libllio_install libbpmclient_install \ libhutils_install libdisptable_install libllio_install libbpmclient_install \
cfg_install cfg_install scripts_install
uninstall: core_uninstall deps_uninstall liberrhand_uninstall libconvc_uninstall \ uninstall: core_uninstall deps_uninstall liberrhand_uninstall libconvc_uninstall \
libhutils_uninstall libdisptable_uninstall libllio_uninstall libbpmclient_uninstall \ libhutils_uninstall libdisptable_uninstall libllio_uninstall libbpmclient_uninstall \
cfg_uninstall cfg_uninstall scripts_uninstall
clean: core_clean deps_clean liberrhand_clean libconvc_clean libhutils_clean \ clean: core_clean deps_clean liberrhand_clean libconvc_clean libhutils_clean \
libdisptable_clean libllio_clean libbpmclient_clean examples_clean tests_clean \ libdisptable_clean libllio_clean libbpmclient_clean examples_clean tests_clean \
cfg_clean cfg_clean scripts_clean
mrproper: clean core_mrproper deps_mrproper liberrhand_mrproper libconvc_mrproper \ mrproper: clean core_mrproper deps_mrproper liberrhand_mrproper libconvc_mrproper \
libhutils_mrproper libdisptable_mrproper libllio_mrproper libbpmclient_mrproper \ libhutils_mrproper libdisptable_mrproper libllio_mrproper libbpmclient_mrproper \
examples_mrproper tests_mrproper cfg_mrproper examples_mrproper tests_mrproper cfg_mrproper scripts_mrproper
[![Build Status](https://travis-ci.org/lnls-dig/bpm-sw.svg)](https://travis-ci.org/lnls-dig/bpm-sw)
# Beam Position Monitor Software # Beam Position Monitor Software
[![Build Status](https://travis-ci.org/lnls-dig/bpm-sw.svg)](https://travis-ci.org/lnls-dig/bpm-sw)
![Latest tag](https://img.shields.io/github/tag/lnls-dig/bpm-sw.svg?style=flat)
[![Latest release](https://img.shields.io/github/release/lnls-dig/bpm-sw.svg?style=flat)](https://github.com/lnls-dig/bpm-sw/releases)
[![GPL License 3.0](https://img.shields.io/github/license/lnls-dig/bpm-sw.svg?style=flat)](COPYING)
Software for controlling the AFC BPM boards Software for controlling the AFC BPM boards
## Prerequisites: ## Prerequisites:
...@@ -9,9 +12,10 @@ Software for controlling the AFC BPM boards ...@@ -9,9 +12,10 @@ Software for controlling the AFC BPM boards
Make sure you have the following libraries installed, either by download Make sure you have the following libraries installed, either by download
the binaries or executing the instructions below: the binaries or executing the instructions below:
* libsodium-1.0.8 (https://github.com/jedisct1/libsodium/tree/1.0.8)
* zeromq-4.2.0 (https://github.com/lnls-dig/libzmq/tree/v4.2.0-pre) * zeromq-4.2.0 (https://github.com/lnls-dig/libzmq/tree/v4.2.0-pre)
* czmq-3.0.2 (https://github.com/zeromq/czmq/tree/v3.0.2) * czmq-3.0.2 (https://github.com/zeromq/czmq/tree/v3.0.2)
* mlm-0.1.2 (https://github.com/lnls-dig/malamute/tree/v0.1.2) * mlm-1.0 (https://github.com/lnls-dig/malamute/tree/v1.0)
## Optional libraries: ## Optional libraries:
...@@ -21,9 +25,10 @@ the binaries or executing the instructions below: ...@@ -21,9 +25,10 @@ the binaries or executing the instructions below:
### Prerequisites Installation Instructions ### Prerequisites Installation Instructions
git clone git://github.com/zeromq/libzmq.git && \ git clone --branch=1.0.8 https://github.com/jedisct1/libsodium.git && \
git clone git://github.com/zeromq/czmq.git && \ git clone --branch=v4.2.0-pre https://github.com/lnls-dig/libzmq.git && \
git clone git://github.com/zeromq/malamute.git && git clone --branch=v3.0.2 https://github.com/zeromq/czmq.git && \
git clone --branch=v1.0 https://github.com/lnls-dig/malamute.git &&
for project in libsodium libzmq czmq malamute; do for project in libsodium libzmq czmq malamute; do
cd $project cd $project
./autogen.sh ./autogen.sh
......
...@@ -16,133 +16,181 @@ dev_mngr ...@@ -16,133 +16,181 @@ dev_mngr
dev_io dev_io
board1 board1
bpm0 bpm0
spawn_epics_ioc = yes # Ask to spawn EPICS IOC (Options are: yes or no)
dbe dbe
spawn_epics_ioc = no # Ask to spawn DBE EPICS IOC (Options are: yes or no)
fmc_board = fmc250m_4ch
afe afe
spawn_epics_ioc = no # Ask to spawn AFE EPICS IOC (Options are: yes or no)
bind = bind =
bpm1 bpm1
spawn_epics_ioc = yes # Ask to spawn EPICS IOC (Options are: yes or no)
dbe dbe
spawn_epics_ioc = no # Ask to spawn DBE EPICS IOC (Options are: yes or no)
fmc_board = fmc250m_4ch
afe afe
spawn_epics_ioc = no # Ask to spawn AFE EPICS IOC (Options are: yes or no)
bind = bind =
board2 board2
bpm0 bpm0
spawn_epics_ioc = yes # Ask to spawn EPICS IOC (Options are: yes or no)
dbe dbe
spawn_epics_ioc = no # Ask to spawn DBE EPICS IOC (Options are: yes or no)
fmc_board = fmc250m_4ch
afe afe
spawn_epics_ioc = no # Ask to spawn AFE EPICS IOC (Options are: yes or no)
bind = bind =
bpm1 bpm1
spawn_epics_ioc = yes # Ask to spawn EPICS IOC (Options are: yes or no)
dbe dbe
spawn_epics_ioc = no # Ask to spawn DBE EPICS IOC (Options are: yes or no)
fmc_board = fmc250m_4ch
afe afe
spawn_epics_ioc = no # Ask to spawn AFE EPICS IOC (Options are: yes or no)
bind = bind =
board3 board3
bpm0 bpm0
spawn_epics_ioc = yes # Ask to spawn EPICS IOC (Options are: yes or no)
dbe dbe
spawn_epics_ioc = no # Ask to spawn DBE EPICS IOC (Options are: yes or no)
fmc_board = fmc250m_4ch
afe afe
spawn_epics_ioc = no # Ask to spawn AFE EPICS IOC (Options are: yes or no)
bind = bind =
bpm1 bpm1
spawn_epics_ioc = yes # Ask to spawn EPICS IOC (Options are: yes or no)
dbe dbe
spawn_epics_ioc = no # Ask to spawn DBE EPICS IOC (Options are: yes or no)
fmc_board = fmc250m_4ch
afe afe
spawn_epics_ioc = no # Ask to spawn AFE EPICS IOC (Options are: yes or no)
bind = bind =
board4 board4
bpm0 bpm0
spawn_epics_ioc = yes # Ask to spawn EPICS IOC (Options are: yes or no)
dbe dbe
spawn_epics_ioc = no # Ask to spawn DBE EPICS IOC (Options are: yes or no)
fmc_board = fmc250m_4ch
afe afe
spawn_epics_ioc = no # Ask to spawn AFE EPICS IOC (Options are: yes or no)
bind = bind =
bpm1 bpm1
spawn_epics_ioc = yes # Ask to spawn EPICS IOC (Options are: yes or no)
dbe dbe
spawn_epics_ioc = no # Ask to spawn DBE EPICS IOC (Options are: yes or no)
fmc_board = fmc250m_4ch
afe afe
spawn_epics_ioc = no # Ask to spawn AFE EPICS IOC (Options are: yes or no)
bind = bind =
board5 board5
bpm0 bpm0
spawn_epics_ioc = yes # Ask to spawn EPICS IOC (Options are: yes or no)
dbe dbe
spawn_epics_ioc = no # Ask to spawn DBE EPICS IOC (Options are: yes or no)
fmc_board = fmc250m_4ch
afe afe
spawn_epics_ioc = no # Ask to spawn AFE EPICS IOC (Options are: yes or no)
bind = bind =
bpm1 bpm1
spawn_epics_ioc = yes # Ask to spawn EPICS IOC (Options are: yes or no)
dbe dbe
spawn_epics_ioc = no # Ask to spawn DBE EPICS IOC (Options are: yes or no)
fmc_board = fmc250m_4ch
afe afe
spawn_epics_ioc = no # Ask to spawn AFE EPICS IOC (Options are: yes or no)
bind = bind =
board6 board6
bpm0 bpm0
spawn_epics_ioc = yes # Ask to spawn EPICS IOC (Options are: yes or no)
dbe dbe
spawn_epics_ioc = no # Ask to spawn DBE EPICS IOC (Options are: yes or no)
fmc_board = fmc250m_4ch
afe afe
spawn_epics_ioc = no # Ask to spawn AFE EPICS IOC (Options are: yes or no)
bind = bind =
bpm1 bpm1
spawn_epics_ioc = yes # Ask to spawn EPICS IOC (Options are: yes or no)
dbe dbe
spawn_epics_ioc = no # Ask to spawn DBE EPICS IOC (Options are: yes or no)
fmc_board = fmc250m_4ch
afe afe
spawn_epics_ioc = no # Ask to spawn AFE EPICS IOC (Options are: yes or no)
bind = bind =
board7 board7
bpm0 bpm0
spawn_epics_ioc = yes # Ask to spawn EPICS IOC (Options are: yes or no)
dbe dbe
spawn_epics_ioc = no # Ask to spawn DBE EPICS IOC (Options are: yes or no)
fmc_board = fmc250m_4ch
afe afe
spawn_epics_ioc = no # Ask to spawn AFE EPICS IOC (Options are: yes or no)
bind = bind =
bpm1 bpm1
spawn_epics_ioc = yes # Ask to spawn EPICS IOC (Options are: yes or no)
dbe dbe
spawn_epics_ioc = no # Ask to spawn DBE EPICS IOC (Options are: yes or no)
fmc_board = fmc250m_4ch
afe afe
spawn_epics_ioc = no # Ask to spawn AFE EPICS IOC (Options are: yes or no)
bind = bind =
board8 board8
bpm0 bpm0
spawn_epics_ioc = yes # Ask to spawn EPICS IOC (Options are: yes or no)
dbe dbe
spawn_epics_ioc = no # Ask to spawn DBE EPICS IOC (Options are: yes or no)
fmc_board = fmc250m_4ch
afe afe
spawn_epics_ioc = no # Ask to spawn AFE EPICS IOC (Options are: yes or no)
bind = bind =
bpm1 bpm1
spawn_epics_ioc = yes # Ask to spawn EPICS IOC (Options are: yes or no)
dbe dbe
spawn_epics_ioc = no # Ask to spawn DBE EPICS IOC (Options are: yes or no)
fmc_board = fmc250m_4ch
afe afe
spawn_epics_ioc = no # Ask to spawn AFE EPICS IOC (Options are: yes or no)
bind = bind =
board9 board9
bpm0 bpm0
spawn_epics_ioc = yes # Ask to spawn EPICS IOC (Options are: yes or no)
dbe dbe
spawn_epics_ioc = no # Ask to spawn DBE EPICS IOC (Options are: yes or no)
fmc_board = fmc250m_4ch
afe afe
spawn_epics_ioc = no # Ask to spawn AFE EPICS IOC (Options are: yes or no)
bind = bind =
bpm1 bpm1
spawn_epics_ioc = yes # Ask to spawn EPICS IOC (Options are: yes or no)
dbe dbe
spawn_epics_ioc = no # Ask to spawn DBE EPICS IOC (Options are: yes or no)
fmc_board = fmc250m_4ch
afe afe
spawn_epics_ioc = no # Ask to spawn AFE EPICS IOC (Options are: yes or no)
bind = bind =
board10 board10
bpm0 bpm0
spawn_epics_ioc = yes # Ask to spawn EPICS IOC (Options are: yes or no)
dbe dbe
spawn_epics_ioc = no # Ask to spawn DBE EPICS IOC (Options are: yes or no)
fmc_board = fmc250m_4ch
afe afe
spawn_epics_ioc = no # Ask to spawn AFE EPICS IOC (Options are: yes or no)
bind = bind =
bpm1 bpm1
spawn_epics_ioc = yes # Ask to spawn EPICS IOC (Options are: yes or no)
dbe dbe
spawn_epics_ioc = no # Ask to spawn DBE EPICS IOC (Options are: yes or no)
fmc_board = fmc250m_4ch
afe afe
spawn_epics_ioc = no # Ask to spawn AFE EPICS IOC (Options are: yes or no)
bind = bind =
board11 board11
bpm0 bpm0
spawn_epics_ioc = yes # Ask to spawn EPICS IOC (Options are: yes or no)
dbe dbe
spawn_epics_ioc = no # Ask to spawn DBE EPICS IOC (Options are: yes or no)
fmc_board = fmc250m_4ch
afe afe
spawn_epics_ioc = no # Ask to spawn AFE EPICS IOC (Options are: yes or no)
bind = bind =
bpm1 bpm1
spawn_epics_ioc = yes # Ask to spawn EPICS IOC (Options are: yes or no)
dbe dbe
spawn_epics_ioc = no # Ask to spawn DBE EPICS IOC (Options are: yes or no)
fmc_board = fmc250m_4ch
afe afe
spawn_epics_ioc = no # Ask to spawn AFE EPICS IOC (Options are: yes or no)
bind = bind =
board12 board12
bpm0 bpm0
spawn_epics_ioc = yes # Ask to spawn EPICS IOC (Options are: yes or no)
dbe dbe
spawn_epics_ioc = no # Ask to spawn DBE EPICS IOC (Options are: yes or no)
fmc_board = fmc250m_4ch
afe afe
spawn_epics_ioc = no # Ask to spawn AFE EPICS IOC (Options are: yes or no)
bind = bind =
bpm1 bpm1
spawn_epics_ioc = yes # Ask to spawn EPICS IOC (Options are: yes or no)
dbe dbe
spawn_epics_ioc = no # Ask to spawn DBE EPICS IOC (Options are: yes or no)
fmc_board = fmc250m_4ch
afe afe
spawn_epics_ioc = no # Ask to spawn AFE EPICS IOC (Options are: yes or no)
bind = bind =
...@@ -16,133 +16,181 @@ dev_mngr ...@@ -16,133 +16,181 @@ dev_mngr
dev_io dev_io
board1 board1
bpm0 bpm0
spawn_epics_ioc = yes # Ask to spawn EPICS IOC (Options are: yes or no)
dbe dbe
spawn_epics_ioc = yes # Ask to spawn DBE EPICS IOC (Options are: yes or no)
fmc_board = fmc250m_4ch
afe afe
spawn_epics_ioc = yes # Ask to spawn AFE EPICS IOC (Options are: yes or no)
bind = bind =
bpm1 bpm1
spawn_epics_ioc = yes # Ask to spawn EPICS IOC (Options are: yes or no)
dbe dbe
spawn_epics_ioc = yes # Ask to spawn DBE EPICS IOC (Options are: yes or no)
fmc_board = fmc250m_4ch
afe afe
spawn_epics_ioc = yes # Ask to spawn AFE EPICS IOC (Options are: yes or no)
bind = bind =
board2 board2
bpm0 bpm0
spawn_epics_ioc = yes # Ask to spawn EPICS IOC (Options are: yes or no)
dbe dbe
spawn_epics_ioc = yes # Ask to spawn DBE EPICS IOC (Options are: yes or no)
fmc_board = fmc250m_4ch
afe afe
spawn_epics_ioc = yes # Ask to spawn AFE EPICS IOC (Options are: yes or no)
bind = tcp://10.2.117.210:6791 bind = tcp://10.2.117.210:6791
bpm1 bpm1
spawn_epics_ioc = yes # Ask to spawn EPICS IOC (Options are: yes or no)
dbe dbe
spawn_epics_ioc = yes # Ask to spawn DBE EPICS IOC (Options are: yes or no)
fmc_board = fmc250m_4ch
afe afe
spawn_epics_ioc = yes # Ask to spawn AFE EPICS IOC (Options are: yes or no)
bind = tcp://10.2.117.211:6791 bind = tcp://10.2.117.211:6791
board3 board3
bpm0 bpm0
spawn_epics_ioc = yes # Ask to spawn EPICS IOC (Options are: yes or no)
dbe dbe
spawn_epics_ioc = yes # Ask to spawn DBE EPICS IOC (Options are: yes or no)
fmc_board = fmc250m_4ch
afe afe
spawn_epics_ioc = yes # Ask to spawn AFE EPICS IOC (Options are: yes or no)
bind = tcp://10.2.117.208:6791 bind = tcp://10.2.117.208:6791
bpm1 bpm1
spawn_epics_ioc = yes # Ask to spawn EPICS IOC (Options are: yes or no)
dbe dbe
spawn_epics_ioc = yes # Ask to spawn DBE EPICS IOC (Options are: yes or no)
fmc_board = fmc250m_4ch
afe afe
spawn_epics_ioc = yes # Ask to spawn AFE EPICS IOC (Options are: yes or no)
bind = tcp://10.2.117.209:6791 bind = tcp://10.2.117.209:6791
board4 board4
bpm0 bpm0
spawn_epics_ioc = yes # Ask to spawn EPICS IOC (Options are: yes or no)
dbe dbe
spawn_epics_ioc = yes # Ask to spawn DBE EPICS IOC (Options are: yes or no)
fmc_board = fmc250m_4ch
afe afe
spawn_epics_ioc = yes # Ask to spawn AFE EPICS IOC (Options are: yes or no)
bind = tcp://10.2.117.206:6791 bind = tcp://10.2.117.206:6791
bpm1 bpm1
spawn_epics_ioc = yes # Ask to spawn EPICS IOC (Options are: yes or no)
dbe dbe
spawn_epics_ioc = yes # Ask to spawn DBE EPICS IOC (Options are: yes or no)
fmc_board = fmc250m_4ch
afe afe
spawn_epics_ioc = yes # Ask to spawn AFE EPICS IOC (Options are: yes or no)
bind = tcp://10.2.117.207:6791 bind = tcp://10.2.117.207:6791
board5 board5
bpm0 bpm0
spawn_epics_ioc = yes # Ask to spawn EPICS IOC (Options are: yes or no)
dbe dbe
spawn_epics_ioc = yes # Ask to spawn DBE EPICS IOC (Options are: yes or no)
fmc_board = fmc250m_4ch
afe afe
spawn_epics_ioc = yes # Ask to spawn AFE EPICS IOC (Options are: yes or no)
bind = bind =
bpm1 bpm1
spawn_epics_ioc = yes # Ask to spawn EPICS IOC (Options are: yes or no)
dbe dbe
spawn_epics_ioc = yes # Ask to spawn DBE EPICS IOC (Options are: yes or no)
fmc_board = fmc250m_4ch
afe afe
spawn_epics_ioc = yes # Ask to spawn AFE EPICS IOC (Options are: yes or no)
bind = bind =
board6 board6
bpm0 bpm0
spawn_epics_ioc = yes # Ask to spawn EPICS IOC (Options are: yes or no)
dbe dbe
spawn_epics_ioc = yes # Ask to spawn DBE EPICS IOC (Options are: yes or no)
fmc_board = fmc250m_4ch
afe afe
spawn_epics_ioc = yes # Ask to spawn AFE EPICS IOC (Options are: yes or no)
bind = bind =
bpm1 bpm1
spawn_epics_ioc = yes # Ask to spawn EPICS IOC (Options are: yes or no)
dbe dbe
spawn_epics_ioc = yes # Ask to spawn DBE EPICS IOC (Options are: yes or no)
fmc_board = fmc250m_4ch
afe afe
spawn_epics_ioc = yes # Ask to spawn AFE EPICS IOC (Options are: yes or no)
bind = bind =
board7 board7
bpm0 bpm0
spawn_epics_ioc = yes # Ask to spawn EPICS IOC (Options are: yes or no)
dbe dbe
spawn_epics_ioc = yes # Ask to spawn DBE EPICS IOC (Options are: yes or no)
fmc_board = fmc250m_4ch
afe afe
spawn_epics_ioc = yes # Ask to spawn AFE EPICS IOC (Options are: yes or no)
bind = tcp://10.2.117.204:6791 bind = tcp://10.2.117.204:6791
bpm1 bpm1
spawn_epics_ioc = yes # Ask to spawn EPICS IOC (Options are: yes or no)
dbe dbe
spawn_epics_ioc = yes # Ask to spawn DBE EPICS IOC (Options are: yes or no)
fmc_board = fmc250m_4ch
afe afe
spawn_epics_ioc = yes # Ask to spawn AFE EPICS IOC (Options are: yes or no)
bind = tcp://10.2.117.205:6791 bind = tcp://10.2.117.205:6791
board8 board8
bpm0 bpm0
spawn_epics_ioc = yes # Ask to spawn EPICS IOC (Options are: yes or no)
dbe dbe
spawn_epics_ioc = yes # Ask to spawn DBE EPICS IOC (Options are: yes or no)
fmc_board = fmc250m_4ch
afe afe
spawn_epics_ioc = yes # Ask to spawn AFE EPICS IOC (Options are: yes or no)
bind = tcp://10.2.117.202:6791 bind = tcp://10.2.117.202:6791
bpm1 bpm1
spawn_epics_ioc = yes # Ask to spawn EPICS IOC (Options are: yes or no)
dbe dbe
spawn_epics_ioc = yes # Ask to spawn DBE EPICS IOC (Options are: yes or no)
fmc_board = fmc250m_4ch
afe afe
spawn_epics_ioc = yes # Ask to spawn AFE EPICS IOC (Options are: yes or no)
bind = tcp://10.2.117.203:6791 bind = tcp://10.2.117.203:6791
board9 board9
bpm0 bpm0
spawn_epics_ioc = yes # Ask to spawn EPICS IOC (Options are: yes or no)
dbe dbe
spawn_epics_ioc = yes # Ask to spawn DBE EPICS IOC (Options are: yes or no)
fmc_board = fmc250m_4ch
afe afe
spawn_epics_ioc = yes # Ask to spawn AFE EPICS IOC (Options are: yes or no)
bind = tcp://10.2.117.200:6791 bind = tcp://10.2.117.200:6791
bpm1 bpm1
spawn_epics_ioc = yes # Ask to spawn EPICS IOC (Options are: yes or no)
dbe dbe
spawn_epics_ioc = yes # Ask to spawn DBE EPICS IOC (Options are: yes or no)
fmc_board = fmc250m_4ch
afe afe
spawn_epics_ioc = yes # Ask to spawn AFE EPICS IOC (Options are: yes or no)
bind = tcp://10.2.117.201:6791 bind = tcp://10.2.117.201:6791
board10 board10
bpm0 bpm0
spawn_epics_ioc = yes # Ask to spawn EPICS IOC (Options are: yes or no)
dbe dbe
spawn_epics_ioc = yes # Ask to spawn DBE EPICS IOC (Options are: yes or no)
fmc_board = fmc250m_4ch
afe afe
spawn_epics_ioc = yes # Ask to spawn AFE EPICS IOC (Options are: yes or no)
bind = bind =
bpm1 bpm1
spawn_epics_ioc = yes # Ask to spawn EPICS IOC (Options are: yes or no)
dbe dbe
spawn_epics_ioc = yes # Ask to spawn DBE EPICS IOC (Options are: yes or no)
fmc_board = fmc250m_4ch
afe afe
spawn_epics_ioc = yes # Ask to spawn AFE EPICS IOC (Options are: yes or no)
bind = bind =
board11 board11
bpm0 bpm0
spawn_epics_ioc = yes # Ask to spawn EPICS IOC (Options are: yes or no)
dbe dbe
spawn_epics_ioc = yes # Ask to spawn DBE EPICS IOC (Options are: yes or no)
fmc_board = fmc250m_4ch
afe afe
spawn_epics_ioc = yes # Ask to spawn AFE EPICS IOC (Options are: yes or no)
bind = bind =
bpm1 bpm1
spawn_epics_ioc = yes # Ask to spawn EPICS IOC (Options are: yes or no)
dbe dbe
spawn_epics_ioc = yes # Ask to spawn DBE EPICS IOC (Options are: yes or no)
fmc_board = fmc250m_4ch
afe afe
spawn_epics_ioc = yes # Ask to spawn AFE EPICS IOC (Options are: yes or no)
bind = bind =
board12 board12
bpm0 bpm0
spawn_epics_ioc = yes # Ask to spawn EPICS IOC (Options are: yes or no)
dbe dbe
spawn_epics_ioc = yes # Ask to spawn DBE EPICS IOC (Options are: yes or no)
fmc_board = fmc250m_4ch
afe afe
spawn_epics_ioc = yes # Ask to spawn AFE EPICS IOC (Options are: yes or no)
bind = bind =
bpm1 bpm1
spawn_epics_ioc = yes # Ask to spawn EPICS IOC (Options are: yes or no)
dbe dbe
spawn_epics_ioc = yes # Ask to spawn DBE EPICS IOC (Options are: yes or no)
fmc_board = fmc250m_4ch
afe afe
spawn_epics_ioc = yes # Ask to spawn AFE EPICS IOC (Options are: yes or no)
bind = bind =
...@@ -5,12 +5,14 @@ set -x ...@@ -5,12 +5,14 @@ set -x
# Build and local install repositories # Build and local install repositories
mkdir tmp mkdir tmp
mkdir tmp/etc
BUILD_PREFIX=$PWD/tmp BUILD_PREFIX=$PWD/tmp
SCRIPTS_PREFIX=$PWD/tmp/etc
LIBSODIUM_VER=1.0.3 LIBSODIUM_VER=1.0.3
LIBZMQ_VER=v4.2.0-pre LIBZMQ_VER=v4.2.0-pre
LIBCZMQ_VER=v3.0.2 LIBCZMQ_VER=v3.0.2
MALAMUTE_VER=v0.1.1 MALAMUTE_VER=v1.0
ZYRE_VER=v1.1.0 ZYRE_VER=v1.1.0
CONFIG_FLAGS=() CONFIG_FLAGS=()
...@@ -27,6 +29,7 @@ BPM_OPTS=() ...@@ -27,6 +29,7 @@ BPM_OPTS=()
BPM_OPTS+=(${CONFIG_FLAGS[@]}) BPM_OPTS+=(${CONFIG_FLAGS[@]})
BPM_OPTS+=(${KERNEL_FLAGS[@]}) BPM_OPTS+=(${KERNEL_FLAGS[@]})
BPM_OPTS+=("PREFIX=${BUILD_PREFIX}") BPM_OPTS+=("PREFIX=${BUILD_PREFIX}")
BPM_OPTS+=("SCRIPTS_PREFIX=${SCRIPTS_PREFIX}")
CONFIG_OPTS=() CONFIG_OPTS=()
CONFIG_OPTS+=(${CONFIG_FLAGS[@]}) CONFIG_OPTS+=(${CONFIG_FLAGS[@]})
...@@ -58,4 +61,4 @@ git clone --branch=${MALAMUTE_VER} git://github.com/lnls-dig/malamute.git && ...@@ -58,4 +61,4 @@ git clone --branch=${MALAMUTE_VER} git://github.com/lnls-dig/malamute.git &&
( cd malamute; ./autogen.sh && ./configure "${CONFIG_OPTS[@]}" && ( cd malamute; ./autogen.sh && ./configure "${CONFIG_OPTS[@]}" &&
make check && make install ) || exit 1 make check && make install ) || exit 1
./compile.sh $BOARD $EXAMPLES $LIBS_LINK "${BPM_OPTS[@]}" ./compile.sh -b $BOARD -a "${APP}" -e $EXAMPLES -l $SYSTEM_INTEGRATION -x "${BPM_OPTS[*]}"
#!/usr/bin/env bash #!/usr/bin/env bash
VALID_BOARDS_STR="Valid values are: \"ml605\" and \"afcv3\"." VALID_BOARDS_STR="Valid values are: \"ml605\", \"afcv3\" or \"afcv3_1\"."
VALID_WITH_EXAMPLES_STR="Valid values are: \"with_examples\" or \"without_examples\"." VALID_APPS_STR="Valid values are: \"ebpm\"."
VALID_WITH_LIBS_LINK_STR="Valid values are: \"with_libs_link\" or \"without_libs_link\"." VALID_WITH_EXAMPLES_STR="Valid values are: \"yes\" or \"no\"."
VALID_WITH_SYSTEM_INTEGRATION_STR="Valid values are: \"yes\" or \"no\"."
VALID_WITH_DRIVER_STR="Valid values are: \"yes\" or \"no\"."
function usage() {
echo "Usage: $0 [-b <board>] [-a <applications>] [-e <with examples = yes/no>]"
echo " [-l <with library linking = yes/no>] [-d <with driver = yes/no>] [-x <extra flags>]"
}
####################################### #######################################
# All of our Makefile options # All of our Makefile options
####################################### #######################################
# Select board in which we will work. Options are: ml605 or afcv3 BOARD=
BOARD=$1 APPS=
WITH_EXAMPLES="no"
WITH_SYSTEM_INTEGRATION="no"
WITH_DRIVER="no"
EXTRA_FLAGS=
# Get command line options
while getopts ":b:a:e:l:x:d:" opt; do
case $opt in
b)
BOARD=$OPTARG
;;
a)
APPS=$OPTARG
;;
e)
WITH_EXAMPLES=$OPTARG
;;
l)
WITH_SYSTEM_INTEGRATION=$OPTARG
;;
x)
EXTRA_FLAGS=$OPTARG
;;
d)
WITH_DRIVER=$OPTARG
;;
\?)
echo "Invalid option: -$OPTARG" >&2
usage
exit 1
;;
:)
echo "Option -$OPTARG requires an argument." >&2
usage
exit 1
;;
esac
done
if [ -z "$BOARD" ]; then if [ -z "$BOARD" ]; then
echo "\"BOARD\" variable unset. "$VALID_BOARDS_STR echo "\"board\" variable unset."
usage
exit 1 exit 1
fi fi
if [ "$BOARD" != "afcv3" ] && [ "$BOARD" != "ml605" ]; then if [ "$BOARD" != "afcv3" ] && [ "$BOARD" != "afcv3_1" ] && [ "$BOARD" != "ml605" ]; then
echo "Unsupported board. "$VALID_BOARDS_STR echo "Unsupported board. "$VALID_BOARDS_STR
exit 1 exit 1
fi fi
WITH_EXAMPLES=$2 if [ -z "$APPS" ]; then
echo "\"applications\" variable unset."
usage
exit 1
fi
if [ -n "$WITH_EXAMPLES" ] && [ "$WITH_EXAMPLES" != "with_examples" ] && [ "$WITH_EXAMPLES" != "without_examples" ]; then if [ -z "$WITH_EXAMPLES" ]; then
echo "Wrong variable value. "$VALID_WITH_EXAMPLES_STR echo "\"examples\" variable unset."
usage
exit 1 exit 1
fi fi
WITH_LIBS_LINK=$3 if [ "$WITH_EXAMPLES" != "yes" ] && [ "$WITH_EXAMPLES" != "no" ]; then
echo "Unsupported examples. "$VALID_WITH_EXAMPLES_STR
exit 1
fi
if [ -n "$WITH_LIBS_LINK" ] && [ "$WITH_LIBS_LINK" != "with_libs_link" ] && [ "$WITH_LIBS_LINK" != "without_libs_link" ]; then if [ -z "$WITH_SYSTEM_INTEGRATION" ]; then
echo "Wrong variable value. "$VALID_WITH_LIBS_LINK_STR echo "\"system integration\" variable unset."
usage
exit 1 exit 1
fi fi
EXTRA_FLAGS=() if [ "$WITH_SYSTEM_INTEGRATION" != "yes" ] && [ "$WITH_SYSTEM_INTEGRATION" != "no" ]; then
# Get all other arguments echo "Unsupported system integration option. "$VALID_WITH_SYSTEM_INTEGRATION_STR
for item in "${@:4}" exit 1
do fi
EXTRA_FLAGS+=("${item}")
done if [ "$WITH_DRIVER" != "yes" ] && [ "$WITH_DRIVER" != "no" ]; then
echo "Unsupported driver option. "$VALID_WITH_DRIVER_STR
exit 1
fi
# Select if we want to have the AFCv3 DDR memory shrink to 2^28 or the full size 2^32. Options are: (y)es ot (n)o. # Select if we want to have the AFCv3 DDR memory shrink to 2^28 or the full size 2^32. Options are: (y)es ot (n)o.
# This is a TEMPORARY fix until the AFCv3 FPGA firmware is fixed. If unsure, select (y)es. # This is a TEMPORARY fix until the AFCv3 FPGA firmware is fixed. If unsure, select (y)es.
...@@ -50,7 +108,7 @@ LOCAL_MSG_DBG=n ...@@ -50,7 +108,7 @@ LOCAL_MSG_DBG=n
#Select if we want to compile with debug mode on. Options are: y(es) or n(o) #Select if we want to compile with debug mode on. Options are: y(es) or n(o)
ERRHAND_DBG=y ERRHAND_DBG=y
# Select the minimum debug verbosity. See liberrhand file errhand_opts.h for more info. # Select the minimum debug verbosity. See liberrhand file errhand_opts.h for more info.
ERRHAND_MIN_LEVEL=DBG_LVL_TRACE ERRHAND_MIN_LEVEL=DBG_LVL_WARN
# Select the subsytems which will have the debug on. See liberrhand file errhand_opts.h for more info. # Select the subsytems which will have the debug on. See liberrhand file errhand_opts.h for more info.
ERRHAND_SUBSYS_ON='"(DBG_DEV_MNGR | DBG_DEV_IO | DBG_SM_IO | DBG_LIB_CLIENT | DBG_SM_PR | DBG_SM_CH | DBG_LL_IO | DBG_HAL_UTILS)"' ERRHAND_SUBSYS_ON='"(DBG_DEV_MNGR | DBG_DEV_IO | DBG_SM_IO | DBG_LIB_CLIENT | DBG_SM_PR | DBG_SM_CH | DBG_LL_IO | DBG_HAL_UTILS)"'
# Select the FMC ADC board type. Options are: passive or active # Select the FMC ADC board type. Options are: passive or active
...@@ -58,6 +116,11 @@ FMC130M_4CH_TYPE=passive ...@@ -58,6 +116,11 @@ FMC130M_4CH_TYPE=passive
# Select if we should program FMC EEPROM with some code or not. Option are: # Select if we should program FMC EEPROM with some code or not. Option are:
# active, passive or nothing (dont' program EEPROM) # active, passive or nothing (dont' program EEPROM)
FMC130M_4CH_EEPROM_PROGRAM= FMC130M_4CH_EEPROM_PROGRAM=
# Select the FMC ADC board type. Options are: passive or active
FMC250M_4CH_TYPE=passive
# Select if we should program FMC EEPROM with some code or not. Option are:
# active, passive or nothing (dont' program EEPROM)
FMC250M_4CH_EEPROM_PROGRAM=
# Selects if we want to compile DEV_MNGR. Options are: y(es) or n(o) # Selects if we want to compile DEV_MNGR. Options are: y(es) or n(o)
WITH_DEV_MNGR=y WITH_DEV_MNGR=y
# Selects the AFE RFFE version. Options are: 2 # Selects the AFE RFFE version. Options are: 2
...@@ -65,7 +128,7 @@ AFE_RFFE_TYPE=2 ...@@ -65,7 +128,7 @@ AFE_RFFE_TYPE=2
# Selects if we want to compile DEVIO Config. Options are: y(es) or n(o). # Selects if we want to compile DEVIO Config. Options are: y(es) or n(o).
# If selected, the FPGA firmware must have the AFC diagnostics module # If selected, the FPGA firmware must have the AFC diagnostics module
# synthesized. # synthesized.
WITH_DEVIO_CFG=y WITH_APP_CFG=n
# Selects the install location of the config file # Selects the install location of the config file
CFG_FILENAME=/etc/bpm_sw/bpm_sw.cfg CFG_FILENAME=/etc/bpm_sw/bpm_sw.cfg
# Selects the install location of the config file # Selects the install location of the config file
...@@ -76,12 +139,12 @@ CFG=lnls_defconfig ...@@ -76,12 +139,12 @@ CFG=lnls_defconfig
export CFG export CFG
COMMAND_DEPS="\ COMMAND_DEPS="\
make ${EXTRA_FLAGS[@]} deps && \ make ${EXTRA_FLAGS} deps && \
make ${EXTRA_FLAGS[@]} deps_install" make ${EXTRA_FLAGS} deps_install"
COMMAND_LIBS="\ COMMAND_LIBS="\
make \ make \
${EXTRA_FLAGS[@]} \ ${EXTRA_FLAGS} \
BOARD=${BOARD} \ BOARD=${BOARD} \
ERRHAND_DBG=${ERRHAND_DBG} \ ERRHAND_DBG=${ERRHAND_DBG} \
ERRHAND_MIN_LEVEL=${ERRHAND_MIN_LEVEL} \ ERRHAND_MIN_LEVEL=${ERRHAND_MIN_LEVEL} \
...@@ -89,10 +152,11 @@ COMMAND_LIBS="\ ...@@ -89,10 +152,11 @@ COMMAND_LIBS="\
LOCAL_MSG_DBG=${LOCAL_MSG_DBG} \ LOCAL_MSG_DBG=${LOCAL_MSG_DBG} \
libs_compile_install" libs_compile_install"
COMMAND_HAL="\ COMMAND_CORE="\
make \ make \
${EXTRA_FLAGS[@]} \ ${EXTRA_FLAGS} \
BOARD=${BOARD} \ BOARD=${BOARD} \
APPS=${APPS} \
SHRINK_AFCV3_DDR_SIZE=${SHRINK_AFCV3_DDR_SIZE} \ SHRINK_AFCV3_DDR_SIZE=${SHRINK_AFCV3_DDR_SIZE} \
ERRHAND_DBG=${ERRHAND_DBG} \ ERRHAND_DBG=${ERRHAND_DBG} \
ERRHAND_MIN_LEVEL=${ERRHAND_MIN_LEVEL} \ ERRHAND_MIN_LEVEL=${ERRHAND_MIN_LEVEL} \
...@@ -102,29 +166,43 @@ COMMAND_HAL="\ ...@@ -102,29 +166,43 @@ COMMAND_HAL="\
FMC130M_4CH_EEPROM_PROGRAM=${FMC130M_4CH_EEPROM_PROGRAM} \ FMC130M_4CH_EEPROM_PROGRAM=${FMC130M_4CH_EEPROM_PROGRAM} \
WITH_DEV_MNGR=${WITH_DEV_MNGR} \ WITH_DEV_MNGR=${WITH_DEV_MNGR} \
AFE_RFFE_TYPE=${AFE_RFFE_TYPE} \ AFE_RFFE_TYPE=${AFE_RFFE_TYPE} \
WITH_DEVIO_CFG=${WITH_DEVIO_CFG} \ WITH_APP_CFG=${WITH_APP_CFG} \
CFG_DIR=${CFG_DIR} && \ CFG_DIR=${CFG_DIR} && \
make CFG=${CFG} ${EXTRA_FLAGS[@]} install" make CFG=${CFG} \
WITH_APP_CFG=${WITH_APP_CFG} \
${EXTRA_FLAGS} core_install cfg_install"
if [ "$WITH_EXAMPLES" = "with_examples" ]; then if [ "$WITH_EXAMPLES" = "yes" ]; then
COMMAND_EXAMPLES="\ COMMAND_EXAMPLES="\
make ${EXTRA_FLAGS[@]} examples" make ${EXTRA_FLAGS} examples"
else else
COMMAND_EXAMPLES="" COMMAND_EXAMPLES=""
fi fi
if [ "$WITH_LIBS_LINK" == "with_libs_link" ] || [ "$WITH_LIBS_LINK" == "" ]; then if [ "$WITH_SYSTEM_INTEGRATION" = "yes" ]; then
COMMAND_LIBS_LINK="ldconfig" COMMAND_SYSTEM_INTEGRATION="\
make scripts_install && \
ldconfig"
else
COMMAND_SYSTEM_INTEGRATION=""
fi
if [ "$WITH_DRIVER" = "yes" ]; then
COMMAND_DRIVER="\
make ${EXTRA_FLAGS} pcie_driver && \
make ${EXTRA_FLAGS} pcie_driver_install"
else else
COMMAND_LIBS_LINK="" COMMAND_DRIVER=""
fi fi
COMMAND_ARRAY=( COMMAND_ARRAY=(
"${COMMAND_DEPS}" "${COMMAND_DEPS}"
"${COMMAND_DRIVER}"
"${COMMAND_LIBS}" "${COMMAND_LIBS}"
"${COMMAND_HAL}" "${COMMAND_CORE}"
"${COMMAND_EXAMPLES}" "${COMMAND_EXAMPLES}"
"${COMMAND_LIBS_LINK}" "${COMMAND_SYSTEM_INTEGRATION}"
) )
for i in "${COMMAND_ARRAY[@]}" for i in "${COMMAND_ARRAY[@]}"
......
...@@ -18,6 +18,10 @@ CFLAGS_USR = -std=gnu99 -O2 ...@@ -18,6 +18,10 @@ CFLAGS_USR = -std=gnu99 -O2
override CPPFLAGS += override CPPFLAGS +=
override CXXFLAGS += override CXXFLAGS +=
# Malamute 1.0.0 requires this to be defined
# as all of its API is in DRAFT state
CFLAGS_USR += -DMLM_BUILD_DRAFT_API
LOCAL_MSG_DBG ?= n LOCAL_MSG_DBG ?= n
DBE_DBG ?= n DBE_DBG ?= n
CFLAGS_DEBUG = CFLAGS_DEBUG =
...@@ -54,7 +58,7 @@ LIBS = -lbpmclient -lerrhand -lhutils -lmlm -lczmq -lzmq ...@@ -54,7 +58,7 @@ LIBS = -lbpmclient -lerrhand -lhutils -lmlm -lczmq -lzmq
LFLAGS = LFLAGS =
# Include directories # Include directories
INCLUDE_DIRS = -I. -I/usr/local/lib INCLUDE_DIRS = -I. -I/usr/local/include
# Merge all flags. We expect tghese variables to be appended to the possible # Merge all flags. We expect tghese variables to be appended to the possible
# command-line options # command-line options
......
This diff is collapsed.
...@@ -202,7 +202,7 @@ int main (int argc, char *argv []) ...@@ -202,7 +202,7 @@ int main (int argc, char *argv [])
} }
char service[50]; char service[50];
snprintf (service, sizeof (service), "BPM%u:DEVIO:FMC130M_4CH%u", board_number, bpm_number); snprintf (service, sizeof (service), "BPM%u:DEVIO:FMC_ACTIVE_CLK%u", board_number, bpm_number);
bpm_client_t *bpm_client = bpm_client_new (broker_endp, verbose, NULL); bpm_client_t *bpm_client = bpm_client_new (broker_endp, verbose, NULL);
if (bpm_client == NULL) { if (bpm_client == NULL) {
......
/*
* Controlling the FMC 250 MSPS leds
*/
#include <inttypes.h>
#include <bpm_client.h>
#define DFLT_BIND_FOLDER "/tmp/bpm"
#define DFLT_BPM_NUMBER 0
#define MAX_BPM_NUMBER 1
#define DFLT_BOARD_NUMBER 0
#define DFLT_TEST_MODE 0
#define MAX_TEST_MODE 1
void print_help (char *program_name)
{
printf( "Usage: %s [options]\n"
"\t-h This help message\n"
"\t-v Verbose output\n"
"\t-board <AMC board = [0|1|2|3|4|5]>\n"
"\t-bpm <BPM number = [0|1]>\n"
"\t-sleep_adcs <Test mode = [0-15]>\n"
"\t-b <broker_endpoint> Broker endpoint\n", program_name);
}
int main (int argc, char *argv [])
{
int verbose = 0;
char *broker_endp = NULL;
char *board_number_str = NULL;
char *bpm_number_str = NULL;
char *sleep_adcs_str = NULL;
char **str_p = NULL;
if (argc < 2) {
print_help (argv[0]);
exit (1);
}
/* FIXME: This is rather buggy! */
/* Simple handling of command-line options. This should be done
* with getopt, for instance*/
int i;
for (i = 1; i < argc; i++)
{
if (streq(argv[i], "-v")) {
verbose = 1;
}
else if (streq(argv[i], "-h"))
{
print_help (argv [0]);
exit (1);
}
else if (streq(argv[i], "-board"))
{
str_p = &board_number_str;
}
else if (streq(argv[i], "-bpm"))
{
str_p = &bpm_number_str;
}
else if (streq(argv[i], "-sleep_adcs"))
{
str_p = &sleep_adcs_str;
}
else if (streq (argv[i], "-b")) {
str_p = &broker_endp;
}
/* Fallout for options with parameters */
else {
*str_p = strdup (argv[i]);
}
}
/* Set default broker address */
if (broker_endp == NULL) {
broker_endp = strdup ("ipc://"DFLT_BIND_FOLDER);
}
/* Set default board number */
uint32_t board_number;
if (board_number_str == NULL) {
fprintf (stderr, "[client:fmc250m_sleep_adcs]: Setting default value to BOARD number: %u\n",
DFLT_BOARD_NUMBER);
board_number = DFLT_BOARD_NUMBER;
}
else {
board_number = strtoul (board_number_str, NULL, 10);
}
/* Set default bpm number */
uint32_t bpm_number;
if (bpm_number_str == NULL) {
fprintf (stderr, "[client:fmc250m_sleep_adcs]: Setting default value to BPM number: %u\n",
DFLT_BPM_NUMBER);
bpm_number = DFLT_BPM_NUMBER;
}
else {
bpm_number = strtoul (bpm_number_str, NULL, 10);
if (bpm_number > MAX_BPM_NUMBER) {
fprintf (stderr, "[client:fmc250m_sleep_adcs]: BPM number too big! Defaulting to: %u\n",
MAX_BPM_NUMBER);
bpm_number = MAX_BPM_NUMBER;
}
}
/* Set default bpm number */
uint32_t sleep_adcs;
if (sleep_adcs_str == NULL) {
fprintf (stderr, "[client:fmc250m_sleep_adcs]: Setting default value to test mode: %u\n",
DFLT_TEST_MODE);
sleep_adcs = DFLT_TEST_MODE;
}
else {
sleep_adcs = strtoul (sleep_adcs_str, NULL, 10);
if (sleep_adcs > MAX_TEST_MODE) {
fprintf (stderr, "[client:fmc250m_sleep_adcs]: Test mode too big! Defaulting to: %u\n",
MAX_TEST_MODE);
sleep_adcs = MAX_TEST_MODE;
}
}
char service[50];
snprintf (service, sizeof (service), "BPM%u:DEVIO:FMC250M_4CH%u", board_number, bpm_number);
bpm_client_t *bpm_client = bpm_client_new (broker_endp, verbose, NULL);
if (bpm_client == NULL) {
fprintf (stderr, "[client:fmc250m_sleep_adcs]: bpm_client could be created\n");
goto err_bpm_client_new;
}
bpm_client_err_e err = bpm_set_sleep_adcs (bpm_client, service, sleep_adcs);
if (err != BPM_CLIENT_SUCCESS) {
fprintf (stderr, "[client:fmc250_sleep_adcs]: bpm_set_sleep_adcs error\n");
goto err_bpm_client_new;
}
err_bpm_client_new:
bpm_client_destroy (&bpm_client);
str_p = &sleep_adcs_str;
free (*str_p);
sleep_adcs_str = NULL;
str_p = &broker_endp;
free (*str_p);
broker_endp = NULL;
str_p = &board_number_str;
free (*str_p);
board_number_str = NULL;
str_p = &bpm_number_str;
free (*str_p);
bpm_number_str = NULL;
return 0;
}
/*
* Controlling the FMC 250 MSPS leds
*/
#include <inttypes.h>
#include <bpm_client.h>
#define DFLT_BIND_FOLDER "/tmp/bpm"
#define DFLT_BPM_NUMBER 0
#define MAX_BPM_NUMBER 1
#define DFLT_BOARD_NUMBER 0
#define DFLT_TEST_MODE 0
#define MAX_TEST_MODE 15
void print_help (char *program_name)
{
printf( "Usage: %s [options]\n"
"\t-h This help message\n"
"\t-v Verbose output\n"
"\t-board <AMC board = [0|1|2|3|4|5]>\n"
"\t-bpm <BPM number = [0|1]>\n"
"\t-testmode <Test mode = [0-15]>\n"
"\t-b <broker_endpoint> Broker endpoint\n", program_name);
}
int main (int argc, char *argv [])
{
int verbose = 0;
char *broker_endp = NULL;
char *board_number_str = NULL;
char *bpm_number_str = NULL;
char *test_mode_str = NULL;
char **str_p = NULL;
if (argc < 2) {
print_help (argv[0]);
exit (1);
}
/* FIXME: This is rather buggy! */
/* Simple handling of command-line options. This should be done
* with getopt, for instance*/
int i;
for (i = 1; i < argc; i++)
{
if (streq(argv[i], "-v")) {
verbose = 1;
}
else if (streq(argv[i], "-h"))
{
print_help (argv [0]);
exit (1);
}
else if (streq(argv[i], "-board"))
{
str_p = &board_number_str;
}
else if (streq(argv[i], "-bpm"))
{
str_p = &bpm_number_str;
}
else if (streq(argv[i], "-testmode"))
{
str_p = &test_mode_str;
}
else if (streq (argv[i], "-b")) {
str_p = &broker_endp;
}
/* Fallout for options with parameters */
else {
*str_p = strdup (argv[i]);
}
}
/* Set default broker address */
if (broker_endp == NULL) {
broker_endp = strdup ("ipc://"DFLT_BIND_FOLDER);
}
/* Set default board number */
uint32_t board_number;
if (board_number_str == NULL) {
fprintf (stderr, "[client:fmc250m_test_mode]: Setting default value to BOARD number: %u\n",
DFLT_BOARD_NUMBER);
board_number = DFLT_BOARD_NUMBER;
}
else {
board_number = strtoul (board_number_str, NULL, 10);
}
/* Set default bpm number */
uint32_t bpm_number;
if (bpm_number_str == NULL) {
fprintf (stderr, "[client:fmc250m_test_mode]: Setting default value to BPM number: %u\n",
DFLT_BPM_NUMBER);
bpm_number = DFLT_BPM_NUMBER;
}
else {
bpm_number = strtoul (bpm_number_str, NULL, 10);
if (bpm_number > MAX_BPM_NUMBER) {
fprintf (stderr, "[client:fmc250m_test_mode]: BPM number too big! Defaulting to: %u\n",
MAX_BPM_NUMBER);
bpm_number = MAX_BPM_NUMBER;
}
}
/* Set default bpm number */
uint32_t test_mode;
if (test_mode_str == NULL) {
fprintf (stderr, "[client:fmc250m_test_mode]: Setting default value to test mode: %u\n",
DFLT_TEST_MODE);
test_mode = DFLT_TEST_MODE;
}
else {
test_mode = strtoul (test_mode_str, NULL, 10);
if (test_mode > MAX_TEST_MODE) {
fprintf (stderr, "[client:fmc250m_test_mode]: Test mode too big! Defaulting to: %u\n",
MAX_TEST_MODE);
test_mode = MAX_TEST_MODE;
}
}
char service[50];
snprintf (service, sizeof (service), "BPM%u:DEVIO:FMC250M_4CH%u", board_number, bpm_number);
bpm_client_t *bpm_client = bpm_client_new (broker_endp, verbose, NULL);
if (bpm_client == NULL) {
fprintf (stderr, "[client:fmc250m_test_mode]: bpm_client could be created\n");
goto err_bpm_client_new;
}
bpm_client_err_e err = bpm_set_test_mode0 (bpm_client, service, test_mode);
err |= bpm_set_test_mode1 (bpm_client, service, test_mode);
err |= bpm_set_test_mode2 (bpm_client, service, test_mode);
err |= bpm_set_test_mode3 (bpm_client, service, test_mode);
if (err != BPM_CLIENT_SUCCESS) {
fprintf (stderr, "[client:fmc250_test_mode]: bpm_set_test_mode error\n");
goto err_bpm_client_new;
}
err_bpm_client_new:
bpm_client_destroy (&bpm_client);
str_p = &test_mode_str;
free (*str_p);
test_mode_str = NULL;
str_p = &broker_endp;
free (*str_p);
broker_endp = NULL;
str_p = &board_number_str;
free (*str_p);
board_number_str = NULL;
str_p = &bpm_number_str;
free (*str_p);
bpm_number_str = NULL;
return 0;
}
...@@ -100,7 +100,7 @@ int main (int argc, char *argv []) ...@@ -100,7 +100,7 @@ int main (int argc, char *argv [])
} }
char service[50]; char service[50];
snprintf (service, sizeof (service), "BPM%u:DEVIO:FMC130M_4CH%u", board_number, bpm_number); snprintf (service, sizeof (service), "BPM%u:DEVIO:FMC_ADC_COMMON%u", board_number, bpm_number);
bpm_client_t *bpm_client = bpm_client_new (broker_endp, verbose, NULL); bpm_client_t *bpm_client = bpm_client_new (broker_endp, verbose, NULL);
if (bpm_client == NULL) { if (bpm_client == NULL) {
......
...@@ -127,7 +127,7 @@ int main (int argc, char *argv []) ...@@ -127,7 +127,7 @@ int main (int argc, char *argv [])
} }
char service[50]; char service[50];
snprintf (service, sizeof (service), "BPM%u:DEVIO:FMC130M_4CH%u", board_number, bpm_number); snprintf (service, sizeof (service), "BPM%u:DEVIO:FMC_ACTIVE_CLK%u", board_number, bpm_number);
bpm_client_t *bpm_client = bpm_client_new (broker_endp, verbose, NULL); bpm_client_t *bpm_client = bpm_client_new (broker_endp, verbose, NULL);
if (bpm_client == NULL) { if (bpm_client == NULL) {
...@@ -135,12 +135,21 @@ int main (int argc, char *argv []) ...@@ -135,12 +135,21 @@ int main (int argc, char *argv [])
goto err_bpm_client_new; goto err_bpm_client_new;
} }
bpm_client_err_e err = bpm_set_si571_set_freq (bpm_client, service, si571_freq); bpm_client_err_e err = bpm_set_si571_freq (bpm_client, service, si571_freq);
if (err != BPM_CLIENT_SUCCESS){ if (err != BPM_CLIENT_SUCCESS){
fprintf (stderr, "[client:si571_ctl]: Si571 Set frequency failed\n"); fprintf (stderr, "[client:si571_ctl]: Si571 Set frequency failed\n");
goto err_bpm_set_freq; goto err_bpm_set_freq;
} }
double freq = 0;
err = bpm_get_si571_freq (bpm_client, service, &freq);
if (err != BPM_CLIENT_SUCCESS){
fprintf (stderr, "[client:si571_ctl]: Si571 Set frequency failed\n");
goto err_bpm_set_freq;
}
printf ("Freq: %f\n", freq);
err_bpm_client_new: err_bpm_client_new:
err_bpm_set_freq: err_bpm_set_freq:
bpm_client_destroy (&bpm_client); bpm_client_destroy (&bpm_client);
......
...@@ -125,7 +125,7 @@ int main (int argc, char *argv []) ...@@ -125,7 +125,7 @@ int main (int argc, char *argv [])
fprintf (stdout, "[client:test_data_en]: test_data_en = %u\n", test_data_en); fprintf (stdout, "[client:test_data_en]: test_data_en = %u\n", test_data_en);
char service[50]; char service[50];
snprintf (service, sizeof (service), "BPM%u:DEVIO:FMC130M_4CH%u", board_number, bpm_number); snprintf (service, sizeof (service), "BPM%u:DEVIO:FMC_ADC_COMMON%u", board_number, bpm_number);
bpm_client_t *bpm_client = bpm_client_new (broker_endp, verbose, NULL); bpm_client_t *bpm_client = bpm_client_new (broker_endp, verbose, NULL);
if (bpm_client == NULL) { if (bpm_client == NULL) {
......
This diff is collapsed.
Subproject commit 7255640760a4d2adccf4d56e1746c4dfebc682b5 Subproject commit 5a2b82de7c8d416632aa25e512906649c88367ae
#ifndef _ACQ_CHAN_H_
#define _ACQ_CHAN_H_
#if defined(__BOARD_ML605__)
#include "boards/ml605/priv_defs/acq_chan_ml605.h"
#elif defined(__BOARD_AFCV3__)
#include "boards/afcv3/priv_defs/acq_chan_afcv3.h"
#else
#error "Could not include acquisition channel definitions. Unsupported board!"
#endif
#endif
#ifndef _ACQ_CHAN_AFCV3_H_ #ifndef _ACQ_CHAN_H_
#define _ACQ_CHAN_AFCV3_H_ #define _ACQ_CHAN_H_
#include <acq_chan_gen_defs.h> #include <acq_chan_gen_defs.h>
......
#ifndef _BOARD_H_ #ifndef _BOARD_H_
#define _BOARD_H_ #define _BOARD_H_
#include "priv_defs/defs.h" #include "defs.h"
/****************************/ /****************************/
/* General Definitions */ /* General Definitions */
......
...@@ -5,15 +5,19 @@ ...@@ -5,15 +5,19 @@
* Released according to the GNU GPL, version 3 or any later version. * Released according to the GNU GPL, version 3 or any later version.
*/ */
#ifndef _SM_IO_FMC130M_4CH_STRUCTS_H_ #ifndef _CHIPS_ADDR_H_
#define _SM_IO_FMC130M_4CH_STRUCTS_H_ #define _CHIPS_ADDR_H_
extern const uint32_t fmc130m_4ch_si571_addr[NUM_FMC130M_4CH_SMIOS];
extern const uint32_t fmc130m_4ch_ad9510_addr[NUM_FMC130M_4CH_SMIOS];
extern const uint32_t fmc130m_4ch_24aa64_addr[NUM_FMC130M_4CH_SMIOS]; extern const uint32_t fmc130m_4ch_24aa64_addr[NUM_FMC130M_4CH_SMIOS];
extern const uint32_t fmc130m_4ch_lm75a_addr[NUM_FMC130M_4CH_SMIOS][NUM_FMC130M_4CH_LM75A]; extern const uint32_t fmc130m_4ch_lm75a_addr[NUM_FMC130M_4CH_SMIOS][NUM_FMC130M_4CH_LM75A];
extern const uint32_t fmc130m_4ch_pca9547_addr[NUM_FMC130M_4CH_SMIOS]; extern const uint32_t fmc130m_4ch_pca9547_addr[NUM_FMC130M_4CH_SMIOS];
extern const uint32_t fmc250m_4ch_24aa64_addr[NUM_FMC250M_4CH_SMIOS];
extern const uint32_t fmc250m_4ch_amc7823_addr[NUM_FMC250M_4CH_SMIOS];
extern const uint32_t fmc250m_4ch_isla216p_addr[NUM_FMC250M_4CH_SMIOS][NUM_FMC250M_4CH_ISLA216P];
extern const uint32_t fmc250m_4ch_pca9547_addr[NUM_FMC250M_4CH_SMIOS];
#endif #endif
#ifndef _DDR3_MAP_AFCV3_H_ #ifndef _DDR3_MAP_H_
#define _DDR3_MAP_AFCV3_H_ #define _DDR3_MAP_H_
#include "acq_chan_afcv3.h" #include "acq_chan.h"
#include "varg_macros.h" #include "varg_macros.h"
/* Does the acquisition channel gets a memory region? */ /* Does the acquisition channel gets a memory region? */
......
#ifndef _DEFS_H_ #ifndef _DEFS_H_
#define _DEFS_H_ #define _DEFS_H_
#include "acq_chan_afcv3.h"
#include "ddr3_defs.h" #include "ddr3_defs.h"
#include "ddr3_map_afcv3.h" #include "ddr3_map.h"
#include "mem_layout.h" #include "mem_layout.h"
#endif #endif
#ifndef _ACQ_CHAN_H_
#define _ACQ_CHAN_H_
#include <acq_chan_gen_defs.h>
#define NUM_ACQ_CORE_SMIOS 2
/************************ Acquistion 0 Channel Parameters **************/
/* ADC */
#define ADC0_CHAN_ID 0
#define ADC0_SAMPLE_SIZE 8 /* 8 Bytes -> ADC0 = 16-bit / ADC1 = 16-bit ... */
/* ADC SWAPPED (after the switching module) */
#define ADCSWAP0_CHAN_ID (ADC0_CHAN_ID + 1)
#define ADCSWAP0_SAMPLE_SIZE 8 /* 8 Bytes -> ADCSWAP0 = 16-bit / ADCSWAP1 = 16-bit ... */
/* MIXER I/Q 1/2 */
#define MIXIQ120_CHAN_ID (ADCSWAP0_CHAN_ID + 1)
#define MIXIQ120_SAMPLE_SIZE 16 /* 16 Bytes -> MIXI0 = 32-bit / MIXQ0 = 32-bit ... */
/* MIXER I/Q 3/4 */
#define MIXIQ340_CHAN_ID (MIXIQ120_CHAN_ID + 1)
#define MIXIQ340_SAMPLE_SIZE 16 /* 16 Bytes -> MIXI2 = 32-bit / MIXQ2 = 32-bit ... */
/* TBTDECIM I/Q 1/2 */
#define TBTDECIMIQ120_CHAN_ID (MIXIQ340_CHAN_ID + 1)
#define TBTDECIMIQ120_SAMPLE_SIZE 16 /* 16 Bytes -> TBTDECIM0 = 32-bit / TBTDECIM1 = 32-bit ... */
/* TBTDECIM I/Q 3/4 */
#define TBTDECIMIQ340_CHAN_ID (TBTDECIMIQ120_CHAN_ID + 1)
#define TBTDECIMIQ340_SAMPLE_SIZE 16 /* 16 Bytes -> TBTDECIM0 = 32-bit / TBTDECIM1 = 32-bit ... */
/* TBT AMP */
#define TBTAMP0_CHAN_ID (TBTDECIMIQ340_CHAN_ID + 1)
#define TBTAMP0_SAMPLE_SIZE 16 /* 16 Bytes -> TBTAMP0 = 32-bit / TBTAMP1 = 32-bit ... */
/* TBT PHASE */
#define TBTPHA0_CHAN_ID (TBTAMP0_CHAN_ID + 1)
#define TBTPHA0_SAMPLE_SIZE 16 /* 16 Bytes -> TBTPHA0 = 32-bit / TBTPHA1 = 32-bit ... */
/* TBT POS */
#define TBTPOS0_CHAN_ID (TBTPHA0_CHAN_ID + 1)
#define TBTPOS0_SAMPLE_SIZE 16 /* 16 Bytes -> X = 32-bit / Y = 32-bit ... */
/* FOFBDECIM I/Q 1/2 */
#define FOFBDECIMIQ120_CHAN_ID (TBTPOS0_CHAN_ID + 1)
#define FOFBDECIMIQ120_SAMPLE_SIZE 16 /* 16 Bytes -> FOFBDECIM0 = 32-bit / FOFBDECIM1 = 32-bit ... */
/* FOFBDECIM I/Q 3/4 */
#define FOFBDECIMIQ340_CHAN_ID (FOFBDECIMIQ120_CHAN_ID + 1)
#define FOFBDECIMIQ340_SAMPLE_SIZE 16 /* 16 Bytes -> FOFBDECIM0 = 32-bit / FOFBDECIM1 = 32-bit ... */
/* FOFB AMP */
#define FOFBAMP0_CHAN_ID (FOFBDECIMIQ340_CHAN_ID + 1)
#define FOFBAMP0_SAMPLE_SIZE 16 /* 16 Bytes -> FOFBAMP0 = 32-bit / FOFBAMP1 = 32-bit ... */
/* FOFB PHA */
#define FOFBPHA0_CHAN_ID (FOFBAMP0_CHAN_ID + 1)
#define FOFBPHA0_SAMPLE_SIZE 16 /* 16 Bytes -> FOFBPHA0 = 32-bit / FOFBPHA1 = 32-bit ... */
/* FOFB POS */
#define FOFBPOS0_CHAN_ID (FOFBPHA0_CHAN_ID + 1)
#define FOFBPOS0_SAMPLE_SIZE 16 /* 16 Bytes -> X = 32-bit / Y = 32-bit ... */
/* MONIT AMP */
#define MONITAMP0_CHAN_ID (FOFBPOS0_CHAN_ID + 1)
#define MONITAMP0_SAMPLE_SIZE 16 /* 16 Bytes -> MONITAMP0 = 32-bit / MONITAMP1 = 32-bit ... */
/* MONIT POS */
#define MONITPOS0_CHAN_ID (MONITAMP0_CHAN_ID + 1)
#define MONITPOS0_SAMPLE_SIZE 16 /* 16 Bytes -> X = 32-bit / Y = 32-bit ... */
/* MONIT1 POS */
#define MONIT1POS0_CHAN_ID (MONITPOS0_CHAN_ID + 1)
#define MONIT1POS0_SAMPLE_SIZE 16 /* 16 Bytes -> X = 32-bit / Y = 32-bit ... */
/* End of channels placeholder */
#define END_CHAN_ID (MONIT1POS0_CHAN_ID + 1)
#endif
#ifndef _BOARD_H_
#define _BOARD_H_
#include "defs.h"
/****************************/
/* General Definitions */
/****************************/
/* CPU Clock frequency in hertz */
#define SYS_CLOCK 100000000ULL
/* Baud rate of the builtin UART (does not apply to the VUART) */
#define UART_BAUDRATE 115200ULL
int board_init();
int board_update();
#endif
/*
* Copyright (C) 2015 LNLS (www.lnls.br)
* Author: Lucas Russo <lucas.russo@lnls.br>
*
* Released according to the GNU GPL, version 3 or any later version.
*/
#ifndef _CHIPS_ADDR_H_
#define _CHIPS_ADDR_H_
extern const uint32_t fmc130m_4ch_24aa64_addr[NUM_FMC130M_4CH_SMIOS];
extern const uint32_t fmc130m_4ch_lm75a_addr[NUM_FMC130M_4CH_SMIOS][NUM_FMC130M_4CH_LM75A];
extern const uint32_t fmc130m_4ch_pca9547_addr[NUM_FMC130M_4CH_SMIOS];
extern const uint32_t fmc250m_4ch_24aa64_addr[NUM_FMC250M_4CH_SMIOS];
extern const uint32_t fmc250m_4ch_amc7823_addr[NUM_FMC250M_4CH_SMIOS];
extern const uint32_t fmc250m_4ch_isla216p_addr[NUM_FMC250M_4CH_SMIOS][NUM_FMC250M_4CH_ISLA216P];
extern const uint32_t fmc250m_4ch_pca9547_addr[NUM_FMC250M_4CH_SMIOS];
#endif
#ifndef _DDR3_DEFS_H_
#define _DDR3_DEFS_H_
#ifdef __SHRINK_AFCV3_DDR_SIZE__
#define MEM_TOTAL_SIZE (1ULL << 28) /* 256 MB reserved for position storage */
#else
#define MEM_TOTAL_SIZE (1ULL << 31) /* 2 GB reserved for position storage */
#endif
#define MEM_REGION_SIZE (MEM_TOTAL_SIZE / 16)
/* FPGA Specific */
#define DDR3_PAYLOAD_SIZE 32 /* In Bytes: Artix7 (AFCv3) */
/* DDR3 Specific */
/* DDR3 for AFCv3 has a 32-bit interface */
#define DDR3_DATA_WIDTH 32 /* In Bits */
#define DDR3_BYTE_2_BIT 8
#define DDR3_ADDR_WORD_2_BYTE (DDR3_DATA_WIDTH/DDR3_BYTE_2_BIT)
#endif
This diff is collapsed.
#ifndef _DEFS_H_ #ifndef _DEFS_H_
#define _DEFS_H_ #define _DEFS_H_
#include "acq_chan_ml605.h"
#include "ddr3_defs.h" #include "ddr3_defs.h"
#include "ddr3_map_ml605.h" #include "ddr3_map.h"
#include "mem_layout.h" #include "mem_layout.h"
#endif #endif
This diff is collapsed.
#ifndef _ACQ_CHAN_ML605_H_ #ifndef _ACQ_CHAN_H_
#define _ACQ_CHAN_ML605_H_ #define _ACQ_CHAN_H_
#include <acq_chan_gen_defs.h> #include <acq_chan_gen_defs.h>
......
#ifndef _BOARD_H_ #ifndef _BOARD_H_
#define _BOARD_H_ #define _BOARD_H_
#include "priv_defs/defs.h" #include "defs.h"
/****************************/ /****************************/
/* General Definitions */ /* General Definitions */
......
/*
* Copyright (C) 2015 LNLS (www.lnls.br)
* Author: Lucas Russo <lucas.russo@lnls.br>
*
* Released according to the GNU GPL, version 3 or any later version.
*/
#ifndef _CHIPS_ADDR_H_
#define _CHIPS_ADDR_H_
extern const uint32_t fmc130m_4ch_24aa64_addr[NUM_FMC130M_4CH_SMIOS];
extern const uint32_t fmc130m_4ch_lm75a_addr[NUM_FMC130M_4CH_SMIOS][NUM_FMC130M_4CH_LM75A];
extern const uint32_t fmc130m_4ch_pca9547_addr[NUM_FMC130M_4CH_SMIOS];
extern const uint32_t fmc250m_4ch_24aa64_addr[NUM_FMC250M_4CH_SMIOS];
extern const uint32_t fmc250m_4ch_amc7823_addr[NUM_FMC250M_4CH_SMIOS];
extern const uint32_t fmc250m_4ch_isla216p_addr[NUM_FMC250M_4CH_SMIOS][NUM_FMC250M_4CH_ISLA216P];
extern const uint32_t fmc250m_4ch_pca9547_addr[NUM_FMC250M_4CH_SMIOS];
#endif
#ifndef _DDR3_MAP_ML605_H_ #ifndef _DDR3_MAP_H_
#define _DDR3_MAP_ML605_H_ #define _DDR3_MAP_H_
#include "acq_chan_ml605.h" #include "acq_chan.h"
#include "varg_macros.h" #include "varg_macros.h"
/* Does the acquisition channel gets a memory region? */ /* Does the acquisition channel gets a memory region? */
......
#ifndef _DEFS_H_
#define _DEFS_H_
#include "ddr3_defs.h"
#include "ddr3_map.h"
#include "mem_layout.h"
#endif
#ifndef _MEM_LAYOUT_H_ #ifndef _MEM_LAYOUT_H_
#define _MEM_LAYOUT_H_ #define _MEM_LAYOUT_H_
#include "pcie_regs.h" #include "mem_layout_common.h"
#include "acq_chan_ml605.h" #include "acq_chan.h"
#define NUM_MAX_SLOTS 1 #define NUM_MAX_SLOTS 1
#define NUM_MAX_BPM_PER_SLOT 2 #define NUM_MAX_BPM_PER_SLOT 2
#define NUM_MAX_BPMS (NUM_MAX_SLOTS * NUM_MAX_BPM_PER_SLOT) #define NUM_MAX_BPMS (NUM_MAX_SLOTS * NUM_MAX_BPM_PER_SLOT)
#define NUM_FMC130M_4CH_SMIOS 1 #define NUM_FMC130M_4CH_SMIOS 1
#define NUM_FMC250M_4CH_SMIOS 1
/*********************** Static ML605 FPGA layout ***********************/ /*********************** Static ML605 FPGA layout ***********************/
/* FMC_130M Components */
#define FMC_130M_CTRL_RAW_REGS_OFFS 0x0000
#define FMC_130M_SI571_RAW_I2C_OFFS 0x0100
#define FMC_130M_AD9510_RAW_SPI_OFFS 0x0200
#define FMC_130M_EEPROM_RAW_I2C_OFFS 0x0300
#define FMC_130M_LM75A_RAW_I2C_OFFS 0x0400
/* DSP Components */
#define DSP_CTRL_RAW_REGS_OFFS 0x0000
#define DSP_BPM_RAW_SWAP_OFFS 0x0100
/* ACQ Components */
#define WB_ACQ_CORE_CTRL_RAW_REGS_OFFS 0x0000
/* Should be autodiscovered by SDB */ /* Should be autodiscovered by SDB */
/* Wishbone RAW Addresses */ /* Wishbone RAW Addresses */
#define DSP1_BASE_RAW_ADDR 0x00308000
#define DSP1_CTRL_RAW_REGS (DSP1_BASE_RAW_ADDR + \
DSP_CTRL_RAW_REGS_OFFS)
#define DSP1_BPM_RAW_SWAP (DSP1_BASE_RAW_ADDR + \
DSP_BPM_RAW_SWAP_OFFS)
#define FMC1_130M_BASE_RAW_ADDR 0x00310000 #define FMC1_130M_BASE_RAW_ADDR 0x00310000
#define FMC1_130M_CTRL_RAW_REGS (FMC1_130M_BASE_RAW_ADDR + \ #define FMC1_130M_CTRL_RAW_REGS (FMC1_130M_BASE_RAW_ADDR + \
...@@ -41,12 +36,20 @@ ...@@ -41,12 +36,20 @@
#define FMC1_130M_LM75A_RAW_I2C (FMC1_130M_BASE_RAW_ADDR + \ #define FMC1_130M_LM75A_RAW_I2C (FMC1_130M_BASE_RAW_ADDR + \
FMC_130M_LM75A_RAW_I2C_OFFS) FMC_130M_LM75A_RAW_I2C_OFFS)
#define DSP1_BASE_RAW_ADDR 0x00308000 #define FMC1_250M_BASE_RAW_ADDR 0x00310000
#define DSP1_CTRL_RAW_REGS (DSP1_BASE_RAW_ADDR + \ #define FMC1_250M_CTRL_RAW_REGS (FMC1_250M_BASE_RAW_ADDR + \
DSP_CTRL_RAW_REGS_OFFS) FMC_250M_CTRL_RAW_REGS_OFFS)
#define DSP1_BPM_RAW_SWAP (DSP1_BASE_RAW_ADDR + \ #define FMC1_250M_AMC7823_RAW_SPI (FMC1_250M_BASE_RAW_ADDR + \
DSP_BPM_RAW_SWAP_OFFS) FMC_250M_AMC7823_RAW_SPI_OFFS)
#define FMC1_250M_ISLA216P_RAW_SPI (FMC1_250M_BASE_RAW_ADDR + \
FMC_250M_ISLA216P_RAW_SPI_OFFS)
#define FMC1_250M_AD9510_RAW_SPI (FMC1_250M_BASE_RAW_ADDR + \
FMC_250M_AD9510_RAW_SPI_OFFS)
#define FMC1_250M_SI571_RAW_I2C (FMC1_250M_BASE_RAW_ADDR + \
FMC_250M_SI571_RAW_I2C_OFFS)
#define FMC1_250M_EEPROM_RAW_I2C (FMC1_250M_BASE_RAW_ADDR + \
FMC_250M_EEPROM_RAW_I2C_OFFS)
#define WB_ACQ1_BASE_RAW_ADDR 0x00330000 #define WB_ACQ1_BASE_RAW_ADDR 0x00330000
...@@ -74,39 +77,31 @@ ...@@ -74,39 +77,31 @@
* the correct one to read or write * the correct one to read or write
*/ */
/* FMC_130M Components */ /* Wishbone Addresses */
#define FMC_130M_CTRL_REGS_OFFS (/*BAR4_ADDR |*/ FMC_130M_CTRL_RAW_REGS_OFFS) #define DSP1_BASE_ADDR (BAR4_ADDR | DSP1_BASE_RAW_ADDR)
#define FMC_130M_SI571_I2C_OFFS (/*BAR4_ADDR |*/ FMC_130M_SI571_RAW_I2C_OFFS)
#define FMC_130M_AD9510_SPI_OFFS (/*BAR4_ADDR |*/ FMC_130M_AD9510_RAW_SPI_OFFS)
#define FMC_130M_EEPROM_I2C_OFFS (/*BAR4_ADDR |*/ FMC_130M_EEPROM_RAW_I2C_OFFS)
#define FMC_130M_LM75A_I2C_OFFS (/*BAR4_ADDR |*/ FMC_130M_LM75A_RAW_I2C_OFFS)
/* DSP Components */
#define DSP_CTRL_REGS_OFFS (/*BAR4_ADDR |*/ DSP_CTRL_RAW_REGS_OFFS)
#define DSP_BPM_SWAP_OFFS (/*BAR4_ADDR |*/ DSP_BPM_RAW_SWAP_OFFS)
/* ACQ Components */ #define DSP1_CTRL_REGS (BAR4_ADDR | DSP1_CTRL_RAW_REGS)
#define WB_ACQ_CORE_CTRL_REGS_OFFS (/*BAR4_ADDR |*/ WB_ACQ_CORE_CTRL_RAW_REGS_OFFS) #define DSP1_BPM_SWAP (BAR4_ADDR | DSP1_BPM_RAW_SWAP)
/* Wishbone Addresses */
#define FMC1_130M_BASE_ADDR (BAR4_ADDR | FMC1_130M_BASE_RAW_ADDR) #define FMC1_130M_BASE_ADDR (BAR4_ADDR | FMC1_130M_BASE_RAW_ADDR)
#define FMC1_130M_CTRL_REGS (/*BAR4_ADDR |*/ FMC1_130M_CTRL_RAW_REGS) #define FMC1_130M_CTRL_REGS (BAR4_ADDR | FMC1_130M_CTRL_RAW_REGS)
#define FMC1_130M_SI571_I2C (/*BAR4_ADDR |*/ FMC1_130M_SI571_RAW_I2C) #define FMC1_130M_FMC_ADC_COMMON (BAR4_ADDR | FMC1_130M_FMC_ADC_COMMON_RAW_REGS)
#define FMC1_130M_AD9510_SPI (/*BAR4_ADDR |*/ FMC1_130M_AD9510_RAW_SPI) #define FMC1_130M_FMC_ACTIVE_CLK (BAR4_ADDR | FMC1_130M_FMC_ACTIVE_CLK_RAW)
#define FMC1_130M_EEPROM_I2C (/*BAR4_ADDR |*/ FMC1_130M_EEPROM_RAW_I2C) #define FMC1_130M_EEPROM_I2C (BAR4_ADDR | FMC1_130M_EEPROM_RAW_I2C)
#define FMC1_130M_LM75A_I2C (/*BAR4_ADDR |*/ FMC1_130M_LM75A_RAW_I2C) #define FMC1_130M_LM75A_I2C (BAR4_ADDR | FMC1_130M_LM75A_RAW_I2C)
#define DSP1_BASE_ADDR (BAR4_ADDR | DSP1_BASE_RAW_ADDR) #define FMC1_250M_BASE_ADDR (BAR4_ADDR | FMC1_250M_BASE_RAW_ADDR)
#define DSP1_CTRL_REGS (/*BAR4_ADDR |*/ DSP1_CTRL_RAW_REGS) #define FMC1_250M_CTRL_REGS (BAR4_ADDR | FMC1_250M_CTRL_RAW_REGS)
#define DSP1_BPM_SWAP (/*BAR4_ADDR |*/ DSP1_BPM_RAW_SWAP) #define FMC1_250M_FMC_ADC_COMMON (BAR4_ADDR | FMC1_250M_FMC_ADC_COMMON_RAW_REGS)
#define FMC1_250M_FMC_ACTIVE_CLK (BAR4_ADDR | FMC1_250M_FMC_ACTIVE_CLK_RAW)
#define FMC1_250M_EEPROM_I2C (BAR4_ADDR | FMC1_250M_EEPROM_RAW_I2C)
#define FMC1_250M_AMC7823_SPI (BAR4_ADDR | FMC1_250M_AMC7823_RAW_SPI)
#define FMC1_250M_ISLA216P_SPI (BAR4_ADDR | FMC1_250M_ISLA216P_RAW_SPI)
#define WB_ACQ1_BASE_ADDR (BAR4_ADDR | WB_ACQ1_BASE_RAW_ADDR) #define WB_ACQ1_BASE_ADDR (BAR4_ADDR | WB_ACQ1_BASE_RAW_ADDR)
/* Large Memory Addresses */
#define LARGE_MEM_ADDR (BAR2_ADDR | LARGE_MEM_RAW_ADDR)
/************************* ML605 Gateware Options *************************/ /************************* ML605 Gateware Options *************************/
/********************* FMC130M_4CH SMIO Gateware Options ******************/ /********************* FMC130M_4CH SMIO Gateware Options ******************/
...@@ -121,6 +116,19 @@ extern const uint32_t fmc130m_4ch_24aa64_addr[NUM_FMC130M_4CH_SMIOS]; ...@@ -121,6 +116,19 @@ extern const uint32_t fmc130m_4ch_24aa64_addr[NUM_FMC130M_4CH_SMIOS];
extern const uint32_t fmc130m_4ch_lm75a_addr[NUM_FMC130M_4CH_SMIOS][NUM_FMC130M_4CH_LM75A]; extern const uint32_t fmc130m_4ch_lm75a_addr[NUM_FMC130M_4CH_SMIOS][NUM_FMC130M_4CH_LM75A];
extern const uint32_t fmc130m_4ch_pca9547_addr[NUM_FMC130M_4CH_SMIOS]; extern const uint32_t fmc130m_4ch_pca9547_addr[NUM_FMC130M_4CH_SMIOS];
/********************* FMC250M_4CH SMIO Gateware Options ******************/
/* Chip SPI slave select lines and I2C address */
#define NUM_FMC250M_4CH_ISLA216P 4
extern const uint32_t fmc250m_4ch_amc7823_addr[NUM_FMC250M_4CH_SMIOS];
extern const uint32_t fmc250m_4ch_isla216p_addr[NUM_FMC250M_4CH_SMIOS][NUM_FMC250M_4CH_ISLA216P];
extern const uint32_t fmc250m_4ch_ad9510_addr[NUM_FMC250M_4CH_SMIOS];
extern const uint32_t fmc250m_4ch_si571_addr[NUM_FMC250M_4CH_SMIOS];
extern const uint32_t fmc250m_4ch_24aa64_addr[NUM_FMC250M_4CH_SMIOS];
extern const uint32_t fmc250m_4ch_pca9547_addr[NUM_FMC250M_4CH_SMIOS];
/*********************** SMIO ACQ Gateware Options ***********************/ /*********************** SMIO ACQ Gateware Options ***********************/
/* FIXME: The Gateware does not support yet a way of reading which /* FIXME: The Gateware does not support yet a way of reading which
* ACQ channels are valid. So, we hardcoded it here for now. This issue * ACQ channels are valid. So, we hardcoded it here for now. This issue
......
...@@ -25,9 +25,12 @@ ...@@ -25,9 +25,12 @@
/* General dependencies */ /* General dependencies */
#include "board.h" #include "board.h"
#include "mem_layout_common.h"
#include "chips_addr_common.h"
#include "epics_mapping.h" #include "epics_mapping.h"
#include "revision.h" #include "revision.h"
#include "acq_chan_gen_defs.h" #include "acq_chan_gen_defs.h"
#include "ddr3_map_structs.h"
/* BPM version macros for compile-time API detection */ /* BPM version macros for compile-time API detection */
...@@ -85,7 +88,12 @@ typedef struct _smch_pca9547_t smch_pca9547_t; ...@@ -85,7 +88,12 @@ typedef struct _smch_pca9547_t smch_pca9547_t;
typedef struct _smch_si57x_t smch_si57x_t; typedef struct _smch_si57x_t smch_si57x_t;
/* Opaque sm_ch_rffe_t structure */ /* Opaque sm_ch_rffe_t structure */
typedef struct _smch_rffe_t smch_rffe_t; typedef struct _smch_rffe_t smch_rffe_t;
/* Opaque sm_ch_isla216p_t structure */
typedef struct _smch_isla216p_t smch_isla216p_t;
/* Forward declaration smio_mod_dispatch_t declaration structure */
typedef struct _smio_mod_dispatch_t smio_mod_dispatch_t;
/* Forward smio_err_e declaration enumeration */ /* Forward smio_err_e declaration enumeration */
typedef enum _smio_err_e smio_err_e; typedef enum _smio_err_e smio_err_e;
/* Opaque smio_t structure */ /* Opaque smio_t structure */
...@@ -118,10 +126,13 @@ typedef struct _zmq_server_args_t zmq_server_args_t; ...@@ -118,10 +126,13 @@ typedef struct _zmq_server_args_t zmq_server_args_t;
#include "sm_pr_spi.h" #include "sm_pr_spi.h"
#include "hw/wb_spi_regs.h" #include "hw/wb_spi_regs.h"
#include "protocols/smpr_spi_regs.h" #include "protocols/smpr_spi_regs.h"
#include "protocols/sm_pr_spi_defaults.h"
#include "sm_pr_i2c.h" #include "sm_pr_i2c.h"
#include "hw/wb_i2c_regs.h" #include "hw/wb_i2c_regs.h"
#include "protocols/smpr_i2c_regs.h" #include "protocols/smpr_i2c_regs.h"
#include "protocols/sm_pr_i2c_defaults.h"
#include "sm_pr_bsmp.h" #include "sm_pr_bsmp.h"
#include "protocols/sm_pr_bsmp_defaults.h"
/* SM_CH */ /* SM_CH */
#include "sm_ch_err.h" #include "sm_ch_err.h"
...@@ -129,11 +140,17 @@ typedef struct _zmq_server_args_t zmq_server_args_t; ...@@ -129,11 +140,17 @@ typedef struct _zmq_server_args_t zmq_server_args_t;
#include "chips/e24aa64_regs.h" #include "chips/e24aa64_regs.h"
#include "sm_ch_ad9510.h" #include "sm_ch_ad9510.h"
#include "chips/ad9510_regs.h" #include "chips/ad9510_regs.h"
#include "chips/sm_ch_ad9510_defaults.h"
#include "sm_ch_pca9547.h" #include "sm_ch_pca9547.h"
#include "chips/pca9547_regs.h" #include "chips/pca9547_regs.h"
#include "sm_ch_si57x.h" #include "sm_ch_si57x.h"
#include "chips/si57x_regs.h" #include "chips/si57x_regs.h"
#include "chips/sm_ch_si57x_defaults.h"
#include "sm_ch_isla216p.h"
#include "chips/isla216p_regs.h"
#include "chips/sm_ch_isla216p_defaults.h"
#include "sm_ch_rffe.h" #include "sm_ch_rffe.h"
#include "chips/sm_ch_rffe_defaults.h"
/* SM_IO */ /* SM_IO */
#include "sm_io_err.h" #include "sm_io_err.h"
......
...@@ -15,6 +15,7 @@ ...@@ -15,6 +15,7 @@
#include <inttypes.h> #include <inttypes.h>
#include <sys/types.h> #include <sys/types.h>
#include <stdbool.h> #include <stdbool.h>
#include <getopt.h>
/* zeroMQ libraries */ /* zeroMQ libraries */
#include <zmq.h> #include <zmq.h>
...@@ -34,8 +35,8 @@ ...@@ -34,8 +35,8 @@
#endif #endif
/* MLM */ /* MLM */
#if MALAMUTE_VERSION < 100 #if MLM_VERSION < 10000
#error "BPM-SW requires at least malamute/0.1.0" #error "BPM-SW requires at least malamute/1.0.0"
#endif #endif
#endif #endif
This diff is collapsed.
/*
* Copyright (C) 2016 LNLS (www.lnls.br)
* Author: Lucas Russo <lucas.russo@lnls.br>
*
* Released according to the GNU GPL, version 3 or any later version.
*/
#ifndef _SMCH_ISLA216P_DEFAULTS_H_
#define _SMCH_ISLA216P_DEFAULTS_H_
#include "chips/isla216p_regs.h"
#endif
/*
* Copyright (C) 2015 LNLS (www.lnls.br)
* Author: Lucas Russo <lucas.russo@lnls.br>
*
* Released according to the GNU GPL, version 3 or any later version.
*/
#ifndef _CHIPS_ADDR_COMMON_H_
#define _CHIPS_ADDR_COMMON_H_
#ifdef __cplusplus
extern "C" {
#endif
extern const uint32_t fmc_active_clk_si571_addr;
extern const uint32_t fmc_active_clk_ad9510_addr;
#ifdef __cplusplus
}
#endif
#endif
#ifndef _DDR3_MAP_H_ #ifndef _DDR3_MAP_STRUCTS_H_
#define _DDR3_MAP_H_ #define _DDR3_MAP_STRUCTS_H_
typedef struct { typedef struct {
uint32_t id; uint32_t id;
......
...@@ -16,6 +16,21 @@ extern "C" { ...@@ -16,6 +16,21 @@ extern "C" {
#define SMIO_HKEY_LEN 8 #define SMIO_HKEY_LEN 8
#define NODES_MAX_LEN 20 #define NODES_MAX_LEN 20
/* Node of sig_ops list */
typedef struct {
int signal; /* Signal identifier, e.g., SIGINT, SIGKILL, etc... */
sig_handler_fp devio_sig_h;
} devio_sig_handler_t;
typedef struct {
wait_chld_handler_fp devio_wait_chld; /* Called to wait a all child process */
wait_chld_timed_handler_fp devio_wait_chld_timed; /* Called to wait a all child process */
spawn_chld_handler_fp devio_spawn_chld; /* Called to spawn a new process to handle device */
/* List of devio_sig_handler_t */
zlistx_t *sig_ops;
} devio_ops_t;
typedef struct { typedef struct {
disp_table_func_fp thsafe_server_open; /* Open device */ disp_table_func_fp thsafe_server_open; /* Open device */
disp_table_func_fp thsafe_server_release; /* Release device */ disp_table_func_fp thsafe_server_release; /* Release device */
...@@ -50,15 +65,15 @@ devio_err_e devio_destroy (devio_t **self_p); ...@@ -50,15 +65,15 @@ devio_err_e devio_destroy (devio_t **self_p);
* this is stored in the SDB structure inside the device */ * this is stored in the SDB structure inside the device */
devio_err_e devio_print_info (devio_t *self); devio_err_e devio_print_info (devio_t *self);
/* Register an specific sm_io module to this device */ /* Register an specific sm_io module to this device */
devio_err_e devio_register_sm (devio_t *self, uint32_t smio_id, devio_err_e devio_register_sm (void *pipe, uint32_t smio_id,
uint64_t base, uint32_t inst_id); uint64_t base, uint32_t inst_id);
/* Register all sm_io module that this device can handle, /* Register all sm_io module that this device can handle,
* according to the device information stored in the SDB */ * according to the device information stored in the SDB */
devio_err_e devio_register_all_sm (devio_t *self); devio_err_e devio_register_all_sm (void *pipe);
devio_err_e devio_unregister_sm (devio_t *self, const char *smio_key); devio_err_e devio_unregister_sm (void *pipe, const char *smio_key);
devio_err_e devio_unregister_all_sm (devio_t *self); devio_err_e devio_unregister_all_sm (void *pipe);
/* Poll all PIPE sockets */ /* Poll all PIPE sockets */
devio_err_e devio_loop (devio_t *self); void devio_loop (zsock_t *pipe, void *args);
/* Router for all the opcodes registered for this dev_io */ /* Router for all the opcodes registered for this dev_io */
/* devio_err_e devio_do_op (devio_t *self, uint32_t opcode, int nargs, ...); */ /* devio_err_e devio_do_op (devio_t *self, uint32_t opcode, int nargs, ...); */
/* Router for all of the low-level operations for this dev_io */ /* Router for all of the low-level operations for this dev_io */
...@@ -68,6 +83,26 @@ devio_err_e devio_set_llio (devio_t *self, llio_t *llio); ...@@ -68,6 +83,26 @@ devio_err_e devio_set_llio (devio_t *self, llio_t *llio);
/* Get LLIO instance from DEVIO */ /* Get LLIO instance from DEVIO */
llio_t *devio_get_llio (devio_t *self); llio_t *devio_get_llio (devio_t *self);
/* Register signals to Device Manager instance */
devio_err_e devio_set_sig_handler (devio_t *self, devio_sig_handler_t *sig_handler);
/* Register all signal handlers previously set */
devio_err_e devio_register_sig_handlers (devio_t *self);
/* Register function to wait a all child process */
devio_err_e devio_set_wait_clhd_handler (devio_t *self, wait_chld_handler_fp fp);
/* Register function to wait with timeout a all child process */
devio_err_e devio_set_wait_clhd_timed_handler (devio_t *self, wait_chld_timed_handler_fp fp);
/* Execute function to wait a all child process */
devio_err_e devio_wait_chld (devio_t *self);
/* Execute function to wait with timeout all child process */
devio_err_e devio_wait_chld_timed (devio_t *self, int timeout);
/* Register function to spawn a all child process */
devio_err_e devio_set_spawn_clhd_handler (devio_t *self, spawn_chld_handler_fp fp);
/* Execute function to spawn a all child process */
devio_err_e devio_spawn_chld (devio_t *self, const char *program, char *const argv[]);
/* Setting all operations at once */
devio_err_e devio_set_ops (devio_t *self, devio_ops_t *devio_ops);
/********* Low-level generic methods API *********/ /********* Low-level generic methods API *********/
/* Open device */ /* Open device */
......
...@@ -32,6 +32,9 @@ enum _devio_err_e { ...@@ -32,6 +32,9 @@ enum _devio_err_e {
DEVIO_ERR_INV_SOCKET, /* Invalid socket reference */ DEVIO_ERR_INV_SOCKET, /* Invalid socket reference */
DEVIO_ERR_MOD_LLIO, /* Error modifying LLIO instance */ DEVIO_ERR_MOD_LLIO, /* Error modifying LLIO instance */
DEVIO_ERR_CFG, /* Could not get property from config file */ DEVIO_ERR_CFG, /* Could not get property from config file */
DEVIO_ERR_SIGACTION, /* Could not register signal */
DEVIO_ERR_WAITCHLD, /* Wait child routine error */
DEVIO_ERR_SPAWNCHLD, /* Spawn child routine error */
DEVIO_ERR_END /* End of enum marker */ DEVIO_ERR_END /* End of enum marker */
}; };
......
...@@ -24,15 +24,6 @@ extern char *dmngr_work_dir; ...@@ -24,15 +24,6 @@ extern char *dmngr_work_dir;
extern char *dmngr_spawn_broker_cfg_str; extern char *dmngr_spawn_broker_cfg_str;
extern int dmngr_spawn_broker_cfg; extern int dmngr_spawn_broker_cfg;
/* Signal handler function pointer */
typedef void (*sig_handler_fp)(int sig, siginfo_t *siginfo, void *context);
/* Wait child handler function pointer */
typedef int (*wait_chld_handler_fp)(void);
/* Spawn child handler function pointer */
typedef int (*spawn_chld_handler_fp)(const char *program, char *const argv[]);
/* Spawn broker handler function pointer */
typedef int (*spawn_broker_handler_fp)(const char *program, char *const argv[]);
/* Node of sig_ops list */ /* Node of sig_ops list */
typedef struct { typedef struct {
int signal; /* Signal identifier, e.g., SIGINT, SIGKILL, etc... */ int signal; /* Signal identifier, e.g., SIGINT, SIGKILL, etc... */
......
...@@ -19,6 +19,7 @@ typedef struct { ...@@ -19,6 +19,7 @@ typedef struct {
typedef struct { typedef struct {
int telnet_port; int telnet_port;
int telnet_afe_port;
} board_epics_opts_t; } board_epics_opts_t;
......
...@@ -36,4 +36,15 @@ ...@@ -36,4 +36,15 @@
#define ARRAY_SIZE(ARRAY) (sizeof(ARRAY)/sizeof((ARRAY)[0])) #define ARRAY_SIZE(ARRAY) (sizeof(ARRAY)/sizeof((ARRAY)[0]))
/* Signal handler function pointer */
typedef void (*sig_handler_fp)(int sig, siginfo_t *siginfo, void *context);
/* Wait child handler function pointer */
typedef int (*wait_chld_handler_fp)(void);
/* Wait child with timeout handler function pointer */
typedef int (*wait_chld_timed_handler_fp)(int timeout);
/* Spawn child handler function pointer */
typedef int (*spawn_chld_handler_fp)(const char *program, char *const argv[]);
/* Spawn broker handler function pointer */
typedef int (*spawn_broker_handler_fp)(const char *program, char *const argv[]);
#endif #endif
/* /*
Register definitions for slave core: Control and status registers for FMC 130M 4CH Register definitions for slave core: Control and status registers for FMC 130M 4CH
* File : fmc130m_4ch_regs.h * File : wb_fmc130m_4ch_regs.h
* Author : auto-generated by wbgen2 from fmc_130m_4ch_regs.wb * Author : auto-generated by wbgen2 from fmc_130m_4ch_regs.wb
* Created : Fri May 16 20:05:39 2014 * Created : Mon Apr 18 15:10:45 2016
* Standard : ANSI C * Standard : ANSI C
THIS FILE WAS GENERATED BY wbgen2 FROM SOURCE FILE fmc_130m_4ch_regs.wb THIS FILE WAS GENERATED BY wbgen2 FROM SOURCE FILE fmc_130m_4ch_regs.wb
...@@ -31,40 +31,6 @@ ...@@ -31,40 +31,6 @@
#endif #endif
/* definitions for register: FMC Status */
/* definitions for field: FMC Present in reg: FMC Status */
#define WB_FMC_130M_4CH_CSR_FMC_STATUS_PRSNT WBGEN2_GEN_MASK(0, 1)
/* definitions for field: Power Good from mezzanine in reg: FMC Status */
#define WB_FMC_130M_4CH_CSR_FMC_STATUS_PG_M2C WBGEN2_GEN_MASK(1, 1)
/* definitions for field: Clock Direction in reg: FMC Status */
#define WB_FMC_130M_4CH_CSR_FMC_STATUS_CLK_DIR WBGEN2_GEN_MASK(2, 1)
/* definitions for field: Firware ID in reg: FMC Status */
#define WB_FMC_130M_4CH_CSR_FMC_STATUS_FIRMWARE_ID_MASK WBGEN2_GEN_MASK(3, 29)
#define WB_FMC_130M_4CH_CSR_FMC_STATUS_FIRMWARE_ID_SHIFT 3
#define WB_FMC_130M_4CH_CSR_FMC_STATUS_FIRMWARE_ID_W(value) WBGEN2_GEN_WRITE(value, 3, 29)
#define WB_FMC_130M_4CH_CSR_FMC_STATUS_FIRMWARE_ID_R(reg) WBGEN2_GEN_READ(reg, 3, 29)
/* definitions for register: Trigger control */
/* definitions for field: DIR in reg: Trigger control */
#define WB_FMC_130M_4CH_CSR_TRIGGER_DIR WBGEN2_GEN_MASK(0, 1)
/* definitions for field: Termination Control in reg: Trigger control */
#define WB_FMC_130M_4CH_CSR_TRIGGER_TERM WBGEN2_GEN_MASK(1, 1)
/* definitions for field: Trigger Value in reg: Trigger control */
#define WB_FMC_130M_4CH_CSR_TRIGGER_TRIG_VAL WBGEN2_GEN_MASK(2, 1)
/* definitions for field: Reserved in reg: Trigger control */
#define WB_FMC_130M_4CH_CSR_TRIGGER_RESERVED_MASK WBGEN2_GEN_MASK(3, 29)
#define WB_FMC_130M_4CH_CSR_TRIGGER_RESERVED_SHIFT 3
#define WB_FMC_130M_4CH_CSR_TRIGGER_RESERVED_W(value) WBGEN2_GEN_WRITE(value, 3, 29)
#define WB_FMC_130M_4CH_CSR_TRIGGER_RESERVED_R(reg) WBGEN2_GEN_READ(reg, 3, 29)
/* definitions for register: ADC LTC2208 control register (4 chips) */ /* definitions for register: ADC LTC2208 control register (4 chips) */
/* definitions for field: RAND in reg: ADC LTC2208 control register (4 chips) */ /* definitions for field: RAND in reg: ADC LTC2208 control register (4 chips) */
...@@ -85,46 +51,6 @@ ...@@ -85,46 +51,6 @@
#define WB_FMC_130M_4CH_CSR_ADC_RESERVED_W(value) WBGEN2_GEN_WRITE(value, 4, 28) #define WB_FMC_130M_4CH_CSR_ADC_RESERVED_W(value) WBGEN2_GEN_WRITE(value, 4, 28)
#define WB_FMC_130M_4CH_CSR_ADC_RESERVED_R(reg) WBGEN2_GEN_READ(reg, 4, 28) #define WB_FMC_130M_4CH_CSR_ADC_RESERVED_R(reg) WBGEN2_GEN_READ(reg, 4, 28)
/* definitions for register: Clock distribution control register */
/* definitions for field: SI571_OE in reg: Clock distribution control register */
#define WB_FMC_130M_4CH_CSR_CLK_DISTRIB_SI571_OE WBGEN2_GEN_MASK(0, 1)
/* definitions for field: PLL_FUNCTION in reg: Clock distribution control register */
#define WB_FMC_130M_4CH_CSR_CLK_DISTRIB_PLL_FUNCTION WBGEN2_GEN_MASK(1, 1)
/* definitions for field: PLL_STATUS in reg: Clock distribution control register */
#define WB_FMC_130M_4CH_CSR_CLK_DISTRIB_PLL_STATUS WBGEN2_GEN_MASK(2, 1)
/* definitions for field: CLK_SEL in reg: Clock distribution control register */
#define WB_FMC_130M_4CH_CSR_CLK_DISTRIB_CLK_SEL WBGEN2_GEN_MASK(3, 1)
/* definitions for field: Reserved in reg: Clock distribution control register */
#define WB_FMC_130M_4CH_CSR_CLK_DISTRIB_RESERVED_MASK WBGEN2_GEN_MASK(4, 28)
#define WB_FMC_130M_4CH_CSR_CLK_DISTRIB_RESERVED_SHIFT 4
#define WB_FMC_130M_4CH_CSR_CLK_DISTRIB_RESERVED_W(value) WBGEN2_GEN_WRITE(value, 4, 28)
#define WB_FMC_130M_4CH_CSR_CLK_DISTRIB_RESERVED_R(reg) WBGEN2_GEN_READ(reg, 4, 28)
/* definitions for register: Monitor and FMC status control register */
/* definitions for field: Temperate Alarm in reg: Monitor and FMC status control register */
#define WB_FMC_130M_4CH_CSR_MONITOR_TEMP_ALARM WBGEN2_GEN_MASK(0, 1)
/* definitions for field: Led 1 in reg: Monitor and FMC status control register */
#define WB_FMC_130M_4CH_CSR_MONITOR_LED1 WBGEN2_GEN_MASK(1, 1)
/* definitions for field: Led 2 in reg: Monitor and FMC status control register */
#define WB_FMC_130M_4CH_CSR_MONITOR_LED2 WBGEN2_GEN_MASK(2, 1)
/* definitions for field: Led 3 in reg: Monitor and FMC status control register */
#define WB_FMC_130M_4CH_CSR_MONITOR_LED3 WBGEN2_GEN_MASK(3, 1)
/* definitions for field: Reserved in reg: Monitor and FMC status control register */
#define WB_FMC_130M_4CH_CSR_MONITOR_RESERVED_MASK WBGEN2_GEN_MASK(4, 28)
#define WB_FMC_130M_4CH_CSR_MONITOR_RESERVED_SHIFT 4
#define WB_FMC_130M_4CH_CSR_MONITOR_RESERVED_W(value) WBGEN2_GEN_WRITE(value, 4, 28)
#define WB_FMC_130M_4CH_CSR_MONITOR_RESERVED_R(reg) WBGEN2_GEN_READ(reg, 4, 28)
/* definitions for register: FPGA control */ /* definitions for register: FPGA control */
/* definitions for field: FMC_IDELAY_RST in reg: FPGA control */ /* definitions for field: FMC_IDELAY_RST in reg: FPGA control */
...@@ -151,8 +77,8 @@ ...@@ -151,8 +77,8 @@
#define WB_FMC_130M_4CH_CSR_FPGA_CTRL_RESERVED1_W(value) WBGEN2_GEN_WRITE(value, 6, 2) #define WB_FMC_130M_4CH_CSR_FPGA_CTRL_RESERVED1_W(value) WBGEN2_GEN_WRITE(value, 6, 2)
#define WB_FMC_130M_4CH_CSR_FPGA_CTRL_RESERVED1_R(reg) WBGEN2_GEN_READ(reg, 6, 2) #define WB_FMC_130M_4CH_CSR_FPGA_CTRL_RESERVED1_R(reg) WBGEN2_GEN_READ(reg, 6, 2)
/* definitions for field: Enable test data in reg: FPGA control */ /* definitions for field: Temperature Alarm in reg: FPGA control */
#define WB_FMC_130M_4CH_CSR_FPGA_CTRL_TEST_DATA_EN WBGEN2_GEN_MASK(8, 1) #define WB_FMC_130M_4CH_CSR_FPGA_CTRL_TEMP_ALARM WBGEN2_GEN_MASK(8, 1)
/* definitions for field: Reserved in reg: FPGA control */ /* definitions for field: Reserved in reg: FPGA control */
#define WB_FMC_130M_4CH_CSR_FPGA_CTRL_RESERVED2_MASK WBGEN2_GEN_MASK(9, 23) #define WB_FMC_130M_4CH_CSR_FPGA_CTRL_RESERVED2_MASK WBGEN2_GEN_MASK(9, 23)
...@@ -306,34 +232,26 @@ ...@@ -306,34 +232,26 @@
#define WB_FMC_130M_4CH_CSR_DCM_RESERVED_SHIFT 5 #define WB_FMC_130M_4CH_CSR_DCM_RESERVED_SHIFT 5
#define WB_FMC_130M_4CH_CSR_DCM_RESERVED_W(value) WBGEN2_GEN_WRITE(value, 5, 27) #define WB_FMC_130M_4CH_CSR_DCM_RESERVED_W(value) WBGEN2_GEN_WRITE(value, 5, 27)
#define WB_FMC_130M_4CH_CSR_DCM_RESERVED_R(reg) WBGEN2_GEN_READ(reg, 5, 27) #define WB_FMC_130M_4CH_CSR_DCM_RESERVED_R(reg) WBGEN2_GEN_READ(reg, 5, 27)
/* [0x0]: REG FMC Status */ /* [0x0]: REG ADC LTC2208 control register (4 chips) */
#define WB_FMC_130M_4CH_CSR_REG_FMC_STATUS 0x00000000 #define WB_FMC_130M_4CH_CSR_REG_ADC 0x00000000
/* [0x4]: REG Trigger control */ /* [0x4]: REG FPGA control */
#define WB_FMC_130M_4CH_CSR_REG_TRIGGER 0x00000004 #define WB_FMC_130M_4CH_CSR_REG_FPGA_CTRL 0x00000004
/* [0x8]: REG ADC LTC2208 control register (4 chips) */ /* [0x8]: REG IDELAY ADC0 calibration */
#define WB_FMC_130M_4CH_CSR_REG_ADC 0x00000008 #define WB_FMC_130M_4CH_CSR_REG_IDELAY0_CAL 0x00000008
/* [0xc]: REG Clock distribution control register */ /* [0xc]: REG IDELAY ADC1 calibration */
#define WB_FMC_130M_4CH_CSR_REG_CLK_DISTRIB 0x0000000c #define WB_FMC_130M_4CH_CSR_REG_IDELAY1_CAL 0x0000000c
/* [0x10]: REG Monitor and FMC status control register */ /* [0x10]: REG IDELAY ADC2 calibration */
#define WB_FMC_130M_4CH_CSR_REG_MONITOR 0x00000010 #define WB_FMC_130M_4CH_CSR_REG_IDELAY2_CAL 0x00000010
/* [0x14]: REG FPGA control */ /* [0x14]: REG IDELAY ADC3 calibration */
#define WB_FMC_130M_4CH_CSR_REG_FPGA_CTRL 0x00000014 #define WB_FMC_130M_4CH_CSR_REG_IDELAY3_CAL 0x00000014
/* [0x18]: REG IDELAY ADC0 calibration */ /* [0x18]: REG ADC Data Channel 0 */
#define WB_FMC_130M_4CH_CSR_REG_IDELAY0_CAL 0x00000018 #define WB_FMC_130M_4CH_CSR_REG_DATA0 0x00000018
/* [0x1c]: REG IDELAY ADC1 calibration */ /* [0x1c]: REG ADC Data Channel 1 */
#define WB_FMC_130M_4CH_CSR_REG_IDELAY1_CAL 0x0000001c #define WB_FMC_130M_4CH_CSR_REG_DATA1 0x0000001c
/* [0x20]: REG IDELAY ADC2 calibration */ /* [0x20]: REG ADC Data Channel 2 */
#define WB_FMC_130M_4CH_CSR_REG_IDELAY2_CAL 0x00000020 #define WB_FMC_130M_4CH_CSR_REG_DATA2 0x00000020
/* [0x24]: REG IDELAY ADC3 calibration */ /* [0x24]: REG ADC Data Channel 3 */
#define WB_FMC_130M_4CH_CSR_REG_IDELAY3_CAL 0x00000024 #define WB_FMC_130M_4CH_CSR_REG_DATA3 0x00000024
/* [0x28]: REG ADC Data Channel 0 */ /* [0x28]: REG ADC DCM control */
#define WB_FMC_130M_4CH_CSR_REG_DATA0 0x00000028 #define WB_FMC_130M_4CH_CSR_REG_DCM 0x00000028
/* [0x2c]: REG ADC Data Channel 1 */
#define WB_FMC_130M_4CH_CSR_REG_DATA1 0x0000002c
/* [0x30]: REG ADC Data Channel 2 */
#define WB_FMC_130M_4CH_CSR_REG_DATA2 0x00000030
/* [0x34]: REG ADC Data Channel 3 */
#define WB_FMC_130M_4CH_CSR_REG_DATA3 0x00000034
/* [0x38]: REG ADC DCM control */
#define WB_FMC_130M_4CH_CSR_REG_DCM 0x00000038
#endif #endif
This diff is collapsed.
/*
Register definitions for slave core: FMC Active Clock registers
* File : wb_fmc_active_clk_regs.h
* Author : auto-generated by wbgen2 from wb_fmc_active_clk_regs.wb
* Created : Mon Apr 18 10:20:28 2016
* Standard : ANSI C
THIS FILE WAS GENERATED BY wbgen2 FROM SOURCE FILE wb_fmc_active_clk_regs.wb
DO NOT HAND-EDIT UNLESS IT'S ABSOLUTELY NECESSARY!
*/
#ifndef __WBGEN2_REGDEFS_WB_FMC_ACTIVE_CLK_REGS_WB
#define __WBGEN2_REGDEFS_WB_FMC_ACTIVE_CLK_REGS_WB
#include <inttypes.h>
#if defined( __GNUC__)
#define PACKED __attribute__ ((packed))
#else
#error "Unsupported compiler?"
#endif
#ifndef __WBGEN2_MACROS_DEFINED__
#define __WBGEN2_MACROS_DEFINED__
#define WBGEN2_GEN_MASK(offset, size) (((1<<(size))-1) << (offset))
#define WBGEN2_GEN_WRITE(value, offset, size) (((value) & ((1<<(size))-1)) << (offset))
#define WBGEN2_GEN_READ(reg, offset, size) (((reg) >> (offset)) & ((1<<(size))-1))
#define WBGEN2_SIGN_EXTEND(value, bits) (((value) & (1<<bits) ? ~((1<<(bits))-1): 0 ) | (value))
#endif
/* definitions for register: Clock distribution control register */
/* definitions for field: Si 571 Output Enable in reg: Clock distribution control register */
#define WB_FMC_ACTIVE_CLK_CSR_CLK_DISTRIB_SI571_OE WBGEN2_GEN_MASK(0, 1)
/* definitions for field: AD9510 PLL function in reg: Clock distribution control register */
#define WB_FMC_ACTIVE_CLK_CSR_CLK_DISTRIB_PLL_FUNCTION WBGEN2_GEN_MASK(1, 1)
/* definitions for field: AD9510 PLL Status in reg: Clock distribution control register */
#define WB_FMC_ACTIVE_CLK_CSR_CLK_DISTRIB_PLL_STATUS WBGEN2_GEN_MASK(2, 1)
/* definitions for field: Reference Clock Selection in reg: Clock distribution control register */
#define WB_FMC_ACTIVE_CLK_CSR_CLK_DISTRIB_CLK_SEL WBGEN2_GEN_MASK(3, 1)
/* definitions for field: Reserved in reg: Clock distribution control register */
#define WB_FMC_ACTIVE_CLK_CSR_CLK_DISTRIB_RESERVED_MASK WBGEN2_GEN_MASK(4, 28)
#define WB_FMC_ACTIVE_CLK_CSR_CLK_DISTRIB_RESERVED_SHIFT 4
#define WB_FMC_ACTIVE_CLK_CSR_CLK_DISTRIB_RESERVED_W(value) WBGEN2_GEN_WRITE(value, 4, 28)
#define WB_FMC_ACTIVE_CLK_CSR_CLK_DISTRIB_RESERVED_R(reg) WBGEN2_GEN_READ(reg, 4, 28)
/* definitions for register: Dummy */
/* definitions for field: Reserved in reg: Dummy */
#define WB_FMC_ACTIVE_CLK_CSR_DUMMY_RESERVED_MASK WBGEN2_GEN_MASK(0, 32)
#define WB_FMC_ACTIVE_CLK_CSR_DUMMY_RESERVED_SHIFT 0
#define WB_FMC_ACTIVE_CLK_CSR_DUMMY_RESERVED_W(value) WBGEN2_GEN_WRITE(value, 0, 32)
#define WB_FMC_ACTIVE_CLK_CSR_DUMMY_RESERVED_R(reg) WBGEN2_GEN_READ(reg, 0, 32)
/* [0x0]: REG Clock distribution control register */
#define WB_FMC_ACTIVE_CLK_CSR_REG_CLK_DISTRIB 0x00000000
/* [0x4]: REG Dummy */
#define WB_FMC_ACTIVE_CLK_CSR_REG_DUMMY 0x00000004
#endif
/*
Register definitions for slave core: FMC ADC Common registers
* File : wb_fmc_adc_common_regs.h
* Author : auto-generated by wbgen2 from wb_fmc_adc_common_regs.wb
* Created : Mon Apr 18 09:02:33 2016
* Standard : ANSI C
THIS FILE WAS GENERATED BY wbgen2 FROM SOURCE FILE wb_fmc_adc_common_regs.wb
DO NOT HAND-EDIT UNLESS IT'S ABSOLUTELY NECESSARY!
*/
#ifndef __WBGEN2_REGDEFS_WB_FMC_ADC_COMMON_REGS_WB
#define __WBGEN2_REGDEFS_WB_FMC_ADC_COMMON_REGS_WB
#include <inttypes.h>
#if defined( __GNUC__)
#define PACKED __attribute__ ((packed))
#else
#error "Unsupported compiler?"
#endif
#ifndef __WBGEN2_MACROS_DEFINED__
#define __WBGEN2_MACROS_DEFINED__
#define WBGEN2_GEN_MASK(offset, size) (((1<<(size))-1) << (offset))
#define WBGEN2_GEN_WRITE(value, offset, size) (((value) & ((1<<(size))-1)) << (offset))
#define WBGEN2_GEN_READ(reg, offset, size) (((reg) >> (offset)) & ((1<<(size))-1))
#define WBGEN2_SIGN_EXTEND(value, bits) (((value) & (1<<bits) ? ~((1<<(bits))-1): 0 ) | (value))
#endif
/* definitions for register: Status register */
/* definitions for field: MMCM locked status in reg: Status register */
#define WB_FMC_ADC_COMMON_CSR_FMC_STATUS_MMCM_LOCKED WBGEN2_GEN_MASK(0, 1)
/* definitions for field: FMC power good status in reg: Status register */
#define WB_FMC_ADC_COMMON_CSR_FMC_STATUS_PWR_GOOD WBGEN2_GEN_MASK(1, 1)
/* definitions for field: FMC board present status in reg: Status register */
#define WB_FMC_ADC_COMMON_CSR_FMC_STATUS_PRST WBGEN2_GEN_MASK(2, 1)
/* definitions for field: Reserved in reg: Status register */
#define WB_FMC_ADC_COMMON_CSR_FMC_STATUS_RESERVED_MASK WBGEN2_GEN_MASK(3, 28)
#define WB_FMC_ADC_COMMON_CSR_FMC_STATUS_RESERVED_SHIFT 3
#define WB_FMC_ADC_COMMON_CSR_FMC_STATUS_RESERVED_W(value) WBGEN2_GEN_WRITE(value, 3, 28)
#define WB_FMC_ADC_COMMON_CSR_FMC_STATUS_RESERVED_R(reg) WBGEN2_GEN_READ(reg, 3, 28)
/* definitions for register: Trigger control */
/* definitions for field: Direction in reg: Trigger control */
#define WB_FMC_ADC_COMMON_CSR_TRIGGER_DIR WBGEN2_GEN_MASK(0, 1)
/* definitions for field: Termination Control in reg: Trigger control */
#define WB_FMC_ADC_COMMON_CSR_TRIGGER_TERM WBGEN2_GEN_MASK(1, 1)
/* definitions for field: Trigger Value in reg: Trigger control */
#define WB_FMC_ADC_COMMON_CSR_TRIGGER_TRIG_VAL WBGEN2_GEN_MASK(2, 1)
/* definitions for field: Reserved in reg: Trigger control */
#define WB_FMC_ADC_COMMON_CSR_TRIGGER_RESERVED_MASK WBGEN2_GEN_MASK(3, 29)
#define WB_FMC_ADC_COMMON_CSR_TRIGGER_RESERVED_SHIFT 3
#define WB_FMC_ADC_COMMON_CSR_TRIGGER_RESERVED_W(value) WBGEN2_GEN_WRITE(value, 3, 29)
#define WB_FMC_ADC_COMMON_CSR_TRIGGER_RESERVED_R(reg) WBGEN2_GEN_READ(reg, 3, 29)
/* definitions for register: Monitor and FMC status control register */
/* definitions for field: Enable test data in reg: Monitor and FMC status control register */
#define WB_FMC_ADC_COMMON_CSR_MONITOR_TEST_DATA_EN WBGEN2_GEN_MASK(0, 1)
/* definitions for field: Led 1 in reg: Monitor and FMC status control register */
#define WB_FMC_ADC_COMMON_CSR_MONITOR_LED1 WBGEN2_GEN_MASK(1, 1)
/* definitions for field: Led 2 in reg: Monitor and FMC status control register */
#define WB_FMC_ADC_COMMON_CSR_MONITOR_LED2 WBGEN2_GEN_MASK(2, 1)
/* definitions for field: Led 3 in reg: Monitor and FMC status control register */
#define WB_FMC_ADC_COMMON_CSR_MONITOR_LED3 WBGEN2_GEN_MASK(3, 1)
/* definitions for field: Reserved in reg: Monitor and FMC status control register */
#define WB_FMC_ADC_COMMON_CSR_MONITOR_RESERVED_MASK WBGEN2_GEN_MASK(4, 28)
#define WB_FMC_ADC_COMMON_CSR_MONITOR_RESERVED_SHIFT 4
#define WB_FMC_ADC_COMMON_CSR_MONITOR_RESERVED_W(value) WBGEN2_GEN_WRITE(value, 4, 28)
#define WB_FMC_ADC_COMMON_CSR_MONITOR_RESERVED_R(reg) WBGEN2_GEN_READ(reg, 4, 28)
/* [0x0]: REG Status register */
#define WB_FMC_ADC_COMMON_CSR_REG_FMC_STATUS 0x00000000
/* [0x4]: REG Trigger control */
#define WB_FMC_ADC_COMMON_CSR_REG_TRIGGER 0x00000004
/* [0x8]: REG Monitor and FMC status control register */
#define WB_FMC_ADC_COMMON_CSR_REG_MONITOR 0x00000008
#endif
...@@ -57,14 +57,14 @@ ...@@ -57,14 +57,14 @@
#define SPI_PROTO_CTRL_GO_BSY WBGEN2_GEN_MASK(8, 1) #define SPI_PROTO_CTRL_GO_BSY WBGEN2_GEN_MASK(8, 1)
#define SPI_PROTO_CTRL_BSY WBGEN2_GEN_MASK(8, 1) #define SPI_PROTO_CTRL_BSY WBGEN2_GEN_MASK(8, 1)
#define SPI_PROTO_CTRL_CHAR_LEN_SIZE 7 #define SPI_PROTO_CTRL_CHARLEN_SIZE 7
#define SPI_PROTO_CTRL_CHAR_LEN_SHIFT 0 #define SPI_PROTO_CTRL_CHARLEN_SHIFT 0
#define SPI_PROTO_CTRL_CHAR_LEN_MASK WBGEN2_GEN_MASK(SPI_PROTO_CTRL_CHAR_LEN_SHIFT, \ #define SPI_PROTO_CTRL_CHARLEN_MASK WBGEN2_GEN_MASK(SPI_PROTO_CTRL_CHARLEN_SHIFT, \
SPI_PROTO_CTRL_CHAR_LEN_SIZE) SPI_PROTO_CTRL_CHARLEN_SIZE)
#define SPI_PROTO_CTRL_CHAR_LEN_W(value) WBGEN2_GEN_WRITE(value, SPI_PROTO_CTRL_CHAR_LEN_SHIFT, \ #define SPI_PROTO_CTRL_CHARLEN_W(value) WBGEN2_GEN_WRITE(value, SPI_PROTO_CTRL_CHARLEN_SHIFT, \
SPI_PROTO_CTRL_CHAR_LEN_SIZE) SPI_PROTO_CTRL_CHARLEN_SIZE)
#define SPI_PROTO_CTRL_CHAR_LEN_R(reg) WBGEN2_GEN_READ(reg, SPI_PROTO_CTRL_CHAR_LEN_SHIFT, \ #define SPI_PROTO_CTRL_CHARLEN_R(reg) WBGEN2_GEN_READ(reg, SPI_PROTO_CTRL_CHARLEN_SHIFT, \
SPI_PROTO_CTRL_CHAR_LEN_SIZE) SPI_PROTO_CTRL_CHARLEN_SIZE)
/* read-write whole register */ /* read-write whole register */
#define SPI_PROTO_CTRL_SIZE 16 #define SPI_PROTO_CTRL_SIZE 16
...@@ -101,14 +101,19 @@ ...@@ -101,14 +101,19 @@
#define SPI_PROTO_REG_CFG_BIDIR 0x0000001C #define SPI_PROTO_REG_CFG_BIDIR 0x0000001C
/* Definitions for SPI_PROTO_REG_CFG_BIDIR */ /* Definitions for SPI_PROTO_REG_CFG_BIDIR */
#define SPI_PROTO_CFG_BIDIR_SIZE 1 #define SPI_PROTO_CFG_BIDIR_CHARLEN_SIZE 7
#define SPI_PROTO_CFG_BIDIR_SHIFT 0 #define SPI_PROTO_CFG_BIDIR_CHARLEN_SHIFT 0
#define SPI_PROTO_CFG_BIDIR_MASK WBGEN2_GEN_MASK(SPI_PROTO_CFG_BIDIR_SHIFT, \ #define SPI_PROTO_CFG_BIDIR_CHARLEN_MASK WBGEN2_GEN_MASK(SPI_PROTO_CFG_BIDIR_CHARLEN_SHIFT, \
SPI_PROTO_CFG_BIDIR_SIZE) SPI_PROTO_CFG_BIDIR_CHARLEN_SIZE)
#define SPI_PROTO_CFG_BIDIR_W(value) WBGEN2_GEN_WRITE(value, SPI_PROTO_CFG_BIDIR_SHIFT, \ #define SPI_PROTO_CFG_BIDIR_CHARLEN_W(value) WBGEN2_GEN_WRITE(value, SPI_PROTO_CFG_BIDIR_CHARLEN_SHIFT, \
SPI_PROTO_CFG_BIDIR_SIZE) SPI_PROTO_CFG_BIDIR_CHARLEN_SIZE)
#define SPI_PROTO_CFG_BIDIR_R(reg) WBGEN2_GEN_READ(reg, SPI_PROTO_CFG_BIDIR_SHIFT, \ #define SPI_PROTO_CFG_BIDIR_CHARLEN_R(reg) WBGEN2_GEN_READ(reg, SPI_PROTO_CFG_BIDIR_CHARLEN_SHIFT, \
SPI_PROTO_CFG_BIDIR_SIZE) SPI_PROTO_CFG_BIDIR_CHARLEN_SIZE)
#define SPI_PROTO_CFG_BIDIR_EN_SIZE 1
#define SPI_PROTO_CFG_BIDIR_EN_SHIFT 7
#define SPI_PROTO_CFG_BIDIR_EN WBGEN2_GEN_MASK(SPI_PROTO_CFG_BIDIR_EN_SHIFT, \
SPI_PROTO_CFG_BIDIR_EN_SIZE)
/* For RX data from MISO (single line) */ /* For RX data from MISO (single line) */
#define SPI_PROTO_REG_RX0_SINGLE 0x00000020 #define SPI_PROTO_REG_RX0_SINGLE 0x00000020
......
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#ifndef _MEM_LAYOUT_COMMON_
#define _MEM_LAYOUT_COMMON_
#ifdef __cplusplus
extern "C" {
#endif
#include "pcie_regs.h"
/* FMC_ACTIVE_CLK Component */
#define FMC_ACTIVE_CLK_CTRL_RAW_REGS_OFFS 0x0000
#define FMC_ACTIVE_CLK_SI571_RAW_I2C_OFFS 0x0100
#define FMC_ACTIVE_CLK_AD9510_RAW_SPI_OFFS 0x0200
/* FMC_130M Components */
#define FMC_130M_CTRL_RAW_REGS_OFFS 0x00000
#define FMC_130M_FMC_ADC_COMMON_RAW_REGS_OFFS 0x01000
#define FMC_130M_FMC_ACTIVE_CLK_RAW_OFFS 0x02000
#define FMC_130M_EEPROM_RAW_I2C_OFFS 0x03000
#define FMC_130M_LM75A_RAW_I2C_OFFS 0x04000
/* FMC_250M Components */
#define FMC_250M_CTRL_RAW_REGS_OFFS 0x00000
#define FMC_250M_FMC_ADC_COMMON_RAW_REGS_OFFS 0x01000
#define FMC_250M_FMC_ACTIVE_CLK_RAW_OFFS 0x02000
#define FMC_250M_EEPROM_RAW_I2C_OFFS 0x03000
#define FMC_250M_AMC7823_RAW_SPI_OFFS 0x04000
#define FMC_250M_ISLA216P_RAW_SPI_OFFS 0x05000
/* DSP Components */
#define DSP_CTRL_RAW_REGS_OFFS 0x0000
#define DSP_BPM_RAW_SWAP_OFFS 0x0100
/* AFC DIAG Components */
#define WB_AFC_DIAG_CTRL_RAW_REGS_OFFS 0x0000
/* ACQ Components */
#define WB_ACQ_CORE_CTRL_RAW_REGS_OFFS 0x0000
/* Trigger Interface Components */
#define WB_TRIGGER_IFACE_RAW_REG_OFFS 0x0000
/* Trigger Mux Components */
#define WB_TRIGGER_MUX_RAW_REG_OFFS 0x0000
/* Large Memory RAW Addresses. It lives at address 0 */
#define LARGE_MEM_RAW_ADDR 0x00000000
/* The following is a bit of a hack.
* We employ a generic API for talking to the hardware.
* So, our transport layer (PCIe or Ethernet, for now)
* should be invisible to the SMIO instances.
*
* However, PCI devices generally employ multiple BAR
* registers mapped to different parts of the device.
* For instance, in the bpm-gw FPGA firmware, the PCIe
* core has 3 BARs (BAR0, BAR2 and BAR4) mapped to the
* following:
*
* BAR0 -> PCIe control registers
* BAR2 -> DDR3 SDRAM
* BAR4 -> Wishbone (necessary to use pages mechanism)
*
* So, we define our addresses as the logic address plus
* the BAR number. With this, the PCIe transport layer
* can differentiate between multiple bars and select
* the correct one to read or write
*/
/* FMC_ACTIVE_CLK Component */
#define FMC_ACTIVE_CLK_CTRL_REGS_OFFS (BAR4_ADDR | FMC_ACTIVE_CLK_CTRL_RAW_REGS_OFFS)
#define FMC_ACTIVE_CLK_SI571_I2C_OFFS (BAR4_ADDR | FMC_ACTIVE_CLK_SI571_RAW_I2C_OFFS)
#define FMC_ACTIVE_CLK_AD9510_SPI_OFFS (BAR4_ADDR | FMC_ACTIVE_CLK_AD9510_RAW_SPI_OFFS)
/* FMC_130M Components */
#define FMC_130M_CTRL_REGS_OFFS (BAR4_ADDR | FMC_130M_CTRL_RAW_REGS_OFFS)
#define FMC_130M_FMC_ADC_COMMON_OFFS (BAR4_ADDR | FMC_130M_FMC_ADC_COMMON_RAW_REGS_OFFS)
#define FMC_130M_FMC_ACTIVE_CLK_OFFS (BAR4_ADDR | FMC_130M_FMC_ACTIVE_CLK_RAW_OFFS)
#define FMC_130M_EEPROM_I2C_OFFS (BAR4_ADDR | FMC_130M_EEPROM_RAW_I2C_OFFS)
#define FMC_130M_LM75A_I2C_OFFS (BAR4_ADDR | FMC_130M_LM75A_RAW_I2C_OFFS)
/* FMC_250M Components */
#define FMC_250M_CTRL_REGS_OFFS (BAR4_ADDR | FMC_250M_CTRL_RAW_REGS_OFFS)
#define FMC_250M_FMC_ADC_COMMON_OFFS (BAR4_ADDR | FMC_250M_FMC_ADC_COMMON_RAW_REGS_OFFS)
#define FMC_250M_FMC_ACTIVE_CLK_OFFS (BAR4_ADDR | FMC_250M_FMC_ACTIVE_CLK_RAW_OFFS)
#define FMC_250M_EEPROM_I2C_OFFS (BAR4_ADDR | FMC_250M_EEPROM_RAW_I2C_OFFS)
#define FMC_250M_AMC7823_SPI_OFFS (BAR4_ADDR | FMC_250M_AMC7823_RAW_SPI_OFFS)
#define FMC_250M_ISLA216P_SPI_OFFS (BAR4_ADDR | FMC_250M_ISLA216P_RAW_SPI_OFFS)
/* DSP Components */
#define DSP_CTRL_REGS_OFFS (BAR4_ADDR | DSP_CTRL_RAW_REGS_OFFS)
#define DSP_BPM_SWAP_OFFS (BAR4_ADDR | DSP_BPM_RAW_SWAP_OFFS)
/* ACQ Components */
#define WB_ACQ_CORE_CTRL_REGS_OFFS (BAR4_ADDR | WB_ACQ_CORE_CTRL_RAW_REGS_OFFS)
/* Large Memory Addresses */
#define LARGE_MEM_ADDR (BAR2_ADDR | LARGE_MEM_RAW_ADDR)
#ifdef __cplusplus
}
#endif
#endif
...@@ -227,6 +227,59 @@ typedef int (*rw_param_format_fp) (uint32_t *param); ...@@ -227,6 +227,59 @@ typedef int (*rw_param_format_fp) (uint32_t *param);
max, chk_funcp, fmt_funcp, clr_field, smio_thsafe_client_read_32, \ max, chk_funcp, fmt_funcp, clr_field, smio_thsafe_client_read_32, \
smio_thsafe_client_write_32) smio_thsafe_client_write_32)
/* zmq message in SET_GET_PARAM_CHANNEL macro is:
* frame 0: operation code
* frame 1: rw R /W 1 = read mode, 0 = write mode
* frame 2: channel (0 to num_channels -1)
* frame 3: value to be written (rw = 0) or dummy value (rw = 1)
* */
#define SET_GET_PARAM_CHANNEL_GEN(module, base_addr, prefix, reg, field, \
chan_offset, chan_num, single_bit, min, max, chk_funcp, fmt_funcp, clr_field, \
read_32_fp, write_32_fp) \
do { \
assert (owner); \
assert (args); \
DBE_DEBUG (DBG_SM_IO | DBG_LVL_TRACE, "[sm_io:rw_param:"#module"] " \
"Calling SET_GET_PARAM_"#reg"\n"); \
SMIO_OWNER_TYPE *self = SMIO_EXP_OWNER(owner); \
uint32_t rw = *(uint32_t *) EXP_MSG_ZMQ_FIRST_ARG(args); \
uint32_t chan = *(uint32_t *) EXP_MSG_ZMQ_NEXT_ARG(args); \
uint32_t value = *(uint32_t *) EXP_MSG_ZMQ_NEXT_ARG(args); \
DBE_DEBUG (DBG_SM_IO | DBG_LVL_TRACE, "[sm_io:rw_param:"#module"] " \
"SET_GET_PARAM_CHANNEL_"#reg": rw = %u, chan = %u\n", rw, chan); \
RW_REPLY_TYPE set_param_return; \
\
if (chan > chan_num-1) { \
return -RW_INV; \
} \
if (rw) { \
set_param_return = GET_PARAM_GEN(self, module, \
(base_addr + (chan*chan_offset)), \
prefix, reg, field, single_bit, value, fmt_funcp, read_32_fp); \
if (set_param_return != RW_OK) { \
return -set_param_return; \
} \
else { \
*(uint32_t *) ret = value; \
return sizeof(value); \
} \
} \
else { \
set_param_return = SET_PARAM_GEN(self, module, \
(base_addr + (chan*chan_offset)), \
prefix, reg, field, single_bit, value, min, max, chk_funcp, \
clr_field, read_32_fp, write_32_fp); \
return -set_param_return; \
} \
} while (0)
#define SET_GET_PARAM_CHANNEL(module, base_addr, prefix, reg, field, chan_offset, \
chan_num, single_bit, min, max, chk_funcp, fmt_funcp, clr_field) \
SET_GET_PARAM_CHANNEL_GEN(module, base_addr, prefix, reg, field, \
chan_offset, chan_num, single_bit, min, max, chk_funcp, \
fmt_funcp, clr_field, smio_thsafe_client_read_32, \
smio_thsafe_client_write_32)
uint32_t check_param_limits (uint32_t value, uint32_t min, uint32_t max); uint32_t check_param_limits (uint32_t value, uint32_t min, uint32_t max);
#endif #endif
......
/*
* Copyright (C) 2014 LNLS (www.lnls.br)
* Author: Lucas Russo <lucas.russo@lnls.br>
*
* Released according to the GNU GPL, version 3 or any later version.
*/
#ifndef _SM_CH_ISLA216P_H_
#define _SM_CH_ISLA216P_H_
#ifdef __cplusplus
extern "C" {
#endif
/***************** Our methods *****************/
/* Creates a new instance of the SMCH ISLA216P */
smch_isla216p_t * smch_isla216p_new (smio_t *parent, uint64_t base, uint32_t ss,
int verbose);
/* Destroy an instance of the SMCH ISLA216P */
smch_err_e smch_isla216p_destroy (smch_isla216p_t **self_p);
/* Read/Write to/from ISLA216P Registers */
smch_err_e smch_isla216p_write_8 (smch_isla216p_t *self, uint8_t addr,
const uint8_t *data);
smch_err_e smch_isla216p_read_8 (smch_isla216p_t *self, uint8_t addr,
uint8_t *data);
/* ISLA216P Test functions */
smch_err_e smch_isla216p_set_test_mode (smch_isla216p_t *self, uint8_t mode);
/* Chid ID */
smch_err_e smch_isla216p_get_chipid (smch_isla216p_t *self, uint8_t *chipid);
/* CHIP Version */
smch_err_e smch_isla216p_get_chipver (smch_isla216p_t *self, uint8_t *chipver);
#ifdef __cplusplus
}
#endif
#endif
...@@ -40,7 +40,9 @@ smch_err_e smch_si57x_get_divs (smch_si57x_t *self, uint64_t *rfreq, ...@@ -40,7 +40,9 @@ smch_err_e smch_si57x_get_divs (smch_si57x_t *self, uint64_t *rfreq,
smch_err_e smch_si57x_get_defaults (smch_si57x_t *self, double fout); smch_err_e smch_si57x_get_defaults (smch_si57x_t *self, double fout);
/* Setup new frequency */ /* Setup new frequency */
smch_err_e smch_si57x_set_freq (smch_si57x_t *self, double frequency); smch_err_e smch_si57x_set_freq (smch_si57x_t *self, double *freq);
/* Get current frequency */
smch_err_e smch_si57x_get_freq (smch_si57x_t *self, double *freq);
#ifdef __cplusplus #ifdef __cplusplus
} }
......
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...@@ -31,11 +31,11 @@ typedef struct { ...@@ -31,11 +31,11 @@ typedef struct {
/* Config thread args structure */ /* Config thread args structure */
typedef struct { typedef struct {
uint32_t smio_id; /* ID of the SMIO instance */ volatile const smio_mod_dispatch_t *smio_handler; /* SMIO table handler */
uint32_t inst_id; /* SMIO instance ID */ uint32_t inst_id; /* SMIO instance ID */
char *broker; /* Endpoint to connect to broker */ char *broker; /* Endpoint to connect to broker */
char *service; /* Full name of the exported service */ char *service; /* Full name of the exported service */
char *log_file; /* Thread log file */ char *log_file; /* Thread log file */
} th_config_args_t; } th_config_args_t;
/************************************************************/ /************************************************************/
......
...@@ -29,6 +29,7 @@ enum _smio_err_e { ...@@ -29,6 +29,7 @@ enum _smio_err_e {
SMIO_ERR_INTERRUPTED_POLLER, /* SMIO Poller interrupted. zeroMQ context was SMIO_ERR_INTERRUPTED_POLLER, /* SMIO Poller interrupted. zeroMQ context was
terminated or received interrupt signal */ terminated or received interrupt signal */
SMIO_ERR_INV_SOCKET, /* Invalid socket reference */ SMIO_ERR_INV_SOCKET, /* Invalid socket reference */
SMIO_ERR_REGISTER_SM, /* Could not register SMIO */
SMIO_ERR_END /* End of enum marker */ SMIO_ERR_END /* End of enum marker */
}; };
......
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...@@ -17,6 +17,7 @@ typedef struct { ...@@ -17,6 +17,7 @@ typedef struct {
uint32_t sys_freq; /* System clock [Hz] */ uint32_t sys_freq; /* System clock [Hz] */
uint32_t spi_freq; /* SPI clock [Hz] */ uint32_t spi_freq; /* SPI clock [Hz] */
uint32_t init_config; /* SPI initial config register */ uint32_t init_config; /* SPI initial config register */
bool bidir; /* SPI bidirectional control enable */
} spi_proto_args_t; } spi_proto_args_t;
typedef enum { typedef enum {
......
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...@@ -8,6 +8,7 @@ EPICS_BIN="${EPICS_BASE}/bin/${EPICS_HOST_ARCH}" ...@@ -8,6 +8,7 @@ EPICS_BIN="${EPICS_BASE}/bin/${EPICS_HOST_ARCH}"
#LINUX_HOSTNAME=$(hostname) #LINUX_HOSTNAME=$(hostname)
EPICS_HOSTNAME="SIDI-BPM-01" EPICS_HOSTNAME="SIDI-BPM-01"
BPM_EPICS_STARTUP="/opt/epics/startup/ioc/bpm-epics-ioc/iocBoot/iocBPM" BPM_EPICS_STARTUP="/opt/epics/startup/ioc/bpm-epics-ioc/iocBoot/iocBPM"
BPM_AFE_EPICS_STARTUP="/opt/epics/startup/ioc/bpm-epics-ioc/iocBoot/iocBPMRFFE"
EPICS_EXTENSIONS="/opt/epics/extensions" EPICS_EXTENSIONS="/opt/epics/extensions"
EPICS_EXTENSIONS_BIN="/opt/epics/extensions/bin/${EPICS_HOST_ARCH}" EPICS_EXTENSIONS_BIN="/opt/epics/extensions/bin/${EPICS_HOST_ARCH}"
EPICS_CA_MAX_ARRAY_BYTES="50000000" EPICS_CA_MAX_ARRAY_BYTES="50000000"
......
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