Commit bc3db3c6 authored by Lucas Russo's avatar Lucas Russo

sm_io/*/acq/*: add independent trigger addresses

This fixes the issue where we want just to read
the last channel acquisition. Before this patch,
we would always read the trigger address from
the last acquisition independent of the channel.

This would result in wrong data, if the last channel
was not the same as the current.
parent f7f2eb9f
......@@ -41,11 +41,16 @@ smio_acq_t * smio_acq_new (smio_t *parent, uint32_t num_samples_pre,
ASSERT_ALLOC(self, err_self_alloc);
uint32_t inst_id = smio_get_inst_id (parent);
self->acq_buf = __acq_buf[inst_id];
self->curr_chan = 0;
/* Set default value for all channels */
for (uint32_t i = 0; i < END_CHAN_ID; i++) {
self->acq_params[i].num_samples_pre = num_samples_pre;
self->acq_params[i].num_samples_post = num_samples_post;
self->acq_params[i].num_shots = num_shots;
/* Default trigger address is the beggining of the channel address */
self->acq_params[i].trig_addr = self->acq_buf[i].start_addr;
}
/* initilize acquisition buffer areas. Defined in ddr3_map.h */
......@@ -54,8 +59,6 @@ smio_acq_t * smio_acq_new (smio_t *parent, uint32_t num_samples_pre,
return NULL;
}
self->acq_buf = __acq_buf[inst_id];
return self;
err_self_alloc:
......
......@@ -30,16 +30,15 @@ typedef struct {
uint32_t num_samples_pre; /* Number of pre-trigger samples */
uint32_t num_samples_post; /* Number of post-trigger samples */
uint32_t num_shots; /* Number of shots */
#if 0
/* Last trigger address. In case of multishot acquisition, this will
contain only the last trigger address*/
uint32_t trig_addr;
#endif
} acq_params_t;
typedef struct {
acq_params_t acq_params[END_CHAN_ID];
const acq_buf_t *acq_buf;
acq_params_t acq_params[END_CHAN_ID]; /* Parameters for each channel */
uint32_t curr_chan; /* Current channel being acquired */
const acq_buf_t *acq_buf; /* Channel properties */
} smio_acq_t;
/***************** Our methods *****************/
......
......@@ -216,6 +216,10 @@ static int _acq_data_acquire (void *owner, void *args, void *ret)
acq_core_ctl_reg |= ACQ_CORE_CTL_FSM_START_ACQ;
smio_thsafe_client_write_32 (self, ACQ_CORE_REG_CTL, &acq_core_ctl_reg);
/* If we are here, the FPGA is acquiring samples from the
* specified channel. Set current channel field */
acq->curr_chan = chan;
DBE_DEBUG (DBG_SM_IO | DBG_LVL_TRACE, "[sm_io:acq] data_acquire: "
"Acquisition Started!\n");
......@@ -245,14 +249,19 @@ static int _acq_check_data_acquire (void *owner, void *args, void *ret)
ASSERT_TEST(acq != NULL, "Could not get SMIO ACQ handler",
err_get_acq_handler, -ACQ_ERR);
uint32_t chan = acq->curr_chan;
err = _acq_check_status (self, ACQ_CORE_COMPLETE_MASK, ACQ_CORE_COMPLETE_VALUE);
if (err != -ACQ_OK) {
DBE_DEBUG (DBG_SM_IO | DBG_LVL_TRACE, "[sm_io:acq] acq_check_data_acquire: "
"Acquisition is not done\n");
"Acquisition is not done for channel %u\n", chan);
}
else {
uint32_t acq_core_trig_addr;
DBE_DEBUG (DBG_SM_IO | DBG_LVL_TRACE, "[sm_io:acq] acq_check_data_acquire: "
"Acquisition is done\n");
"Acquisition is done for channel %u\n", chan);
smio_thsafe_client_read_32 (self, ACQ_CORE_REG_TRIG_POS, &acq_core_trig_addr);
acq->acq_params[chan].trig_addr = acq_core_trig_addr;
}
err_get_acq_handler:
......@@ -392,11 +401,10 @@ static int _acq_get_data_block (void *owner, void *args, void *ret)
* sample_size
* */
/* First step if to read trigger address. Even on skip trigger mode,
* this register will contain the address after the last valid sample
* (end of acquisition address) */
uint32_t acq_core_trig_addr = 0;
smio_thsafe_client_read_32 (self, ACQ_CORE_REG_TRIG_POS, &acq_core_trig_addr);
/* First step if to get the trigger address from the channel.
* Even on skip trigger mode, this will contain the address after
* the last valid sample (end of acquisition address) */
uint32_t acq_core_trig_addr = acq->acq_params[chan].trig_addr;
/* Second step is to calculate the size of the whole acquisition in bytes */
uint32_t acq_size_bytes = (num_samples_shot*(num_shots-1) +
......
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