include/*: add Trigger Mux register definitions

c757c939 · Lucas Russo · f2fbab25 · c757c939 · c757c939 · c757c939
Commit c757c939 authored May 17, 2016 by Lucas Russo
4 changed files
--- a/include/boards/afcv3/mem_layout.h
+++ b/include/boards/afcv3/mem_layout.h
@@ -101,6 +101,17 @@

 #define WB_TRIGGER_IFACE_RAW_CTRL_REGS             (WB_TRIGGER_IFACE_RAW_ADDR +  \
                                                        WB_TRIGGER_IFACE_RAW_REG_OFFS)
+
+#define WB_TRIGGER_MUX1_RAW_ADDR                    0x00400000
+
+#define WB_TRIGGER_MUX1_RAW_CTRL_REGS               (WB_TRIGGER_MUX1_RAW_ADDR +  \
+                                                        WB_TRIGGER_MUX_RAW_REG_OFFS)
+
+#define WB_TRIGGER_MUX2_RAW_ADDR                    0x00410000
+
+#define WB_TRIGGER_MUX2_RAW_CTRL_REGS               (WB_TRIGGER_MUX2_RAW_ADDR +  \
+                                                        WB_TRIGGER_MUX_RAW_REG_OFFS)
+
 /* Large Memory RAW Addresses. It lives at address 0 */
 #define LARGE_MEM_RAW_ADDR                          0x00000000

@@ -183,6 +194,15 @@
 #define WB_TRIGGER_IFACE_BASE_ADDR                  (BAR4_ADDR | WB_TRIGGER_IFACE_RAW_ADDR)

 #define WB_TRIGGER_IFACE_CTRL_REGS                  (BAR4_ADDR | WB_TRIGGER_IFACE_RAW_CTRL_REGS)
+
+#define WB_TRIGGER_MUX1_ADDR                        (BAR4_ADDR | WB_TRIGGER_MUX1_RAW_ADDR)
+
+#define WB_TRIGGER_MUX1_CTRL_REGS                   (BAR4_ADDR | WB_TRIGGER_MUX1_RAW_CTRL_REGS)
+
+#define WB_TRIGGER_MUX2_ADDR                        (BAR4_ADDR | WB_TRIGGER_MUX2_RAW_ADDR)
+
+#define WB_TRIGGER_MUX2_CTRL_REGS                   (BAR4_ADDR | WB_TRIGGER_MUX2_RAW_CTRL_REGS)
+
 /************************* AFCv3 Gateware Options *************************/

 /********************* FMC130M_4CH SMIO Gateware Options ******************/

--- a/include/boards/afcv3_1/mem_layout.h
+++ b/include/boards/afcv3_1/mem_layout.h
@@ -101,6 +101,18 @@

 #define WB_TRIGGER_IFACE_RAW_CTRL_REGS             (WB_TRIGGER_IFACE_RAW_ADDR +  \
                                                        WB_TRIGGER_IFACE_RAW_REG_OFFS)
+
+#define WB_TRIGGER_MUX1_RAW_ADDR                    0x00400000
+
+#define WB_TRIGGER_MUX1_RAW_CTRL_REGS               (WB_TRIGGER_MUX1_RAW_ADDR +  \
+                                                        WB_TRIGGER_MUX_RAW_REG_OFFS)
+
+#define WB_TRIGGER_MUX2_RAW_ADDR                    0x00410000
+
+#define WB_TRIGGER_MUX2_RAW_CTRL_REGS               (WB_TRIGGER_MUX2_RAW_ADDR +  \
+                                                        WB_TRIGGER_MUX_RAW_REG_OFFS)
+
+
 /* Large Memory RAW Addresses. It lives at address 0 */
 #define LARGE_MEM_RAW_ADDR                          0x00000000

@@ -183,6 +195,15 @@
 #define WB_TRIGGER_IFACE_BASE_ADDR                  (BAR4_ADDR | WB_TRIGGER_IFACE_RAW_ADDR)

 #define WB_TRIGGER_IFACE_CTRL_REGS                  (BAR4_ADDR | WB_TRIGGER_IFACE_RAW_CTRL_REGS)
+
+#define WB_TRIGGER_MUX1_ADDR                        (BAR4_ADDR | WB_TRIGGER_MUX1_RAW_ADDR)
+
+#define WB_TRIGGER_MUX1_CTRL_REGS                   (BAR4_ADDR | WB_TRIGGER_MUX1_RAW_CTRL_REGS)
+
+#define WB_TRIGGER_MUX2_ADDR                        (BAR4_ADDR | WB_TRIGGER_MUX2_RAW_ADDR)
+
+#define WB_TRIGGER_MUX2_CTRL_REGS                   (BAR4_ADDR | WB_TRIGGER_MUX2_RAW_CTRL_REGS)
+
 /************************* AFCv3 Gateware Options *************************/

 /********************* FMC130M_4CH SMIO Gateware Options ******************/

--- a/include/hw/wb_trigger_mux_regs.h
+++ b/include/hw/wb_trigger_mux_regs.h
--- a/include/mem_layout_common.h
+++ b/include/mem_layout_common.h
@@ -40,6 +40,9 @@ extern "C" {
 /* Trigger Interface Components */
 #define WB_TRIGGER_IFACE_RAW_REG_OFFS               0x0000

+/* Trigger Mux Components */
+#define WB_TRIGGER_MUX_RAW_REG_OFFS                 0x0000
+
 /* Large Memory RAW Addresses. It lives at address 0 */
 #define LARGE_MEM_RAW_ADDR                          0x00000000