various: improve specific board code separation

Now, almost all (with the exception of the dev_io.c which will be fixed soon) specific code to a board is located inside include/board/<board_name> and src/board/<board_name>

various: improve specific board code separation
Now, almost all (with the exception of the dev_io.c which will be fixed soon) specific code to a board is located inside include/board/<board_name> and src/board/<board_name>
d7940824 · Lucas Russo · cccb1086 · cccb1086 · d7940824 · d7940824
Commit d7940824 authored Feb 05, 2016 by Lucas Russo
27 changed files
--- a/include/acq_chan.h
+++ b/include/acq_chan.h
-#ifndef _ACQ_CHAN_H_
-#define _ACQ_CHAN_H_
-
-#if defined(__BOARD_ML605__)
-#include "boards/ml605/priv_defs/acq_chan_ml605.h"
-#elif defined(__BOARD_AFCV3__)
-#include "boards/afcv3/priv_defs/acq_chan_afcv3.h"
-#else
-#error "Could not include acquisition channel definitions. Unsupported board!"
-#endif
-
-#endif
--- a/include/boards/afcv3/priv_defs/acq_chan_afcv3.h
+++ b/include/boards/afcv3/priv_defs/acq_chan_afcv3.h
-#ifndef _ACQ_CHAN_AFCV3_H_
-#define _ACQ_CHAN_AFCV3_H_
+#ifndef _ACQ_CHAN_H_
+#define _ACQ_CHAN_H_

 #include <acq_chan_gen_defs.h>


--- a/include/boards/afcv3/board.h
+++ b/include/boards/afcv3/board.h
 #ifndef _BOARD_H_
 #define _BOARD_H_

-#include "priv_defs/defs.h"
+#include "defs.h"

 /****************************/
 /*    General Definitions  */

--- a/src/sm_io/modules/fmc130m_4ch/sm_io_fmc130m_4ch_structs.h
+++ b/src/sm_io/modules/fmc130m_4ch/sm_io_fmc130m_4ch_structs.h
@@ -5,8 +5,8 @@
 * Released according to the GNU GPL, version 3 or any later version.
 */

-#ifndef _SM_IO_FMC130M_4CH_STRUCTS_H_
-#define _SM_IO_FMC130M_4CH_STRUCTS_H_
+#ifndef _CHIPS_ADDR_H_
+#define _CHIPS_ADDR_H_

 extern const uint32_t fmc130m_4ch_si571_addr[NUM_FMC130M_4CH_SMIOS];
 extern const uint32_t fmc130m_4ch_ad9510_addr[NUM_FMC130M_4CH_SMIOS];

--- a/include/boards/afcv3/priv_defs/ddr3_defs.h
+++ b/include/boards/afcv3/priv_defs/ddr3_defs.h
--- a/include/boards/afcv3/priv_defs/ddr3_map_afcv3.h
+++ b/include/boards/afcv3/priv_defs/ddr3_map_afcv3.h
-#ifndef _DDR3_MAP_AFCV3_H_
-#define _DDR3_MAP_AFCV3_H_
+#ifndef _DDR3_MAP_H_
+#define _DDR3_MAP_H_

-#include "acq_chan_afcv3.h"
+#include "acq_chan.h"
 #include "varg_macros.h"

 /* Does the acquisition channel gets a memory region? */

--- a/include/boards/afcv3/priv_defs/defs.h
+++ b/include/boards/afcv3/priv_defs/defs.h
 #ifndef _DEFS_H_
 #define _DEFS_H_

-#include "acq_chan_afcv3.h"
 #include "ddr3_defs.h"
-#include "ddr3_map_afcv3.h"
+#include "ddr3_map.h"
 #include "mem_layout.h"

 #endif
--- a/include/boards/afcv3/priv_defs/mem_layout.h
+++ b/include/boards/afcv3/priv_defs/mem_layout.h
@@ -2,7 +2,7 @@
 #define _MEM_LAYOUT_H_

 #include "pcie_regs.h"
-#include "acq_chan_afcv3.h"
+#include "acq_chan.h"

 #define NUM_MAX_SLOTS                               12
 #define NUM_MAX_BPM_PER_SLOT                        2

--- a/include/boards/ml605/priv_defs/acq_chan_ml605.h
+++ b/include/boards/ml605/priv_defs/acq_chan_ml605.h
-#ifndef _ACQ_CHAN_ML605_H_
-#define _ACQ_CHAN_ML605_H_
+#ifndef _ACQ_CHAN_H_
+#define _ACQ_CHAN_H_

 #include <acq_chan_gen_defs.h>


--- a/include/boards/ml605/board.h
+++ b/include/boards/ml605/board.h
 #ifndef _BOARD_H_
 #define _BOARD_H_

-#include "priv_defs/defs.h"
+#include "defs.h"

 /****************************/
 /*    General Definitions   */

--- a/include/boards/ml605/chips_addr.h
+++ b/include/boards/ml605/chips_addr.h
+/*
+ * Copyright (C) 2015 LNLS (www.lnls.br)
+ * Author: Lucas Russo <lucas.russo@lnls.br>
+ *
+ * Released according to the GNU GPL, version 3 or any later version.
+ */
+
+#ifndef _CHIPS_ADDR_H_
+#define _CHIPS_ADDR_H_
+
+extern const uint32_t fmc130m_4ch_si571_addr[NUM_FMC130M_4CH_SMIOS];
+extern const uint32_t fmc130m_4ch_ad9510_addr[NUM_FMC130M_4CH_SMIOS];
+
+extern const uint32_t fmc130m_4ch_24aa64_addr[NUM_FMC130M_4CH_SMIOS];
+extern const uint32_t fmc130m_4ch_lm75a_addr[NUM_FMC130M_4CH_SMIOS][NUM_FMC130M_4CH_LM75A];
+
+extern const uint32_t fmc130m_4ch_pca9547_addr[NUM_FMC130M_4CH_SMIOS];
+
+#endif
--- a/include/boards/ml605/priv_defs/ddr3_defs.h
+++ b/include/boards/ml605/priv_defs/ddr3_defs.h
--- a/include/boards/ml605/priv_defs/ddr3_map_ml605.h
+++ b/include/boards/ml605/priv_defs/ddr3_map_ml605.h
-#ifndef _DDR3_MAP_ML605_H_
-#define _DDR3_MAP_ML605_H_
+#ifndef _DDR3_MAP_H_
+#define _DDR3_MAP_H_

-#include "acq_chan_ml605.h"
+#include "acq_chan.h"
 #include "varg_macros.h"

 /* Does the acquisition channel gets a memory region? */

--- a/include/boards/ml605/priv_defs/defs.h
+++ b/include/boards/ml605/priv_defs/defs.h
 #ifndef _DEFS_H_
 #define _DEFS_H_

-#include "acq_chan_ml605.h"
 #include "ddr3_defs.h"
-#include "ddr3_map_ml605.h"
+#include "ddr3_map.h"
 #include "mem_layout.h"

 #endif
--- a/include/boards/ml605/priv_defs/mem_layout.h
+++ b/include/boards/ml605/priv_defs/mem_layout.h
@@ -2,7 +2,7 @@
 #define _MEM_LAYOUT_H_

 #include "pcie_regs.h"
-#include "acq_chan_ml605.h"
+#include "acq_chan.h"

 #define NUM_MAX_SLOTS                               1
 #define NUM_MAX_BPM_PER_SLOT                        2

--- a/include/bpm_server_classes.h
+++ b/include/bpm_server_classes.h
@@ -28,6 +28,7 @@
 #include "epics_mapping.h"
 #include "revision.h"
 #include "acq_chan_gen_defs.h"
+#include "ddr3_map_structs.h"

 /* BPM version macros for compile-time API detection */


--- a/src/sm_io/modules/acq/ddr3_map.h
+++ b/src/sm_io/modules/acq/ddr3_map.h
-#ifndef _DDR3_MAP_H_
-#define _DDR3_MAP_H_
+#ifndef _DDR3_MAP_STRUCTS_H_
+#define _DDR3_MAP_STRUCTS_H_

 typedef struct {
  uint32_t id;

--- a/src/boards/afcv3/board.mk
+++ b/src/boards/afcv3/board.mk
 board_DIR = $(SRC_DIR)/boards/afcv3

-board_OBJS = $(board_DIR)/epics_mapping.o
+board_OBJS = $(board_DIR)/epics_mapping.o \
+			 $(board_DIR)/ddr3_map.o \
+			 $(board_DIR)/chips_addr.o
+
--- a/src/sm_io/modules/fmc130m_4ch/sm_io_fmc130m_4ch_structs.c
+++ b/src/sm_io/modules/fmc130m_4ch/sm_io_fmc130m_4ch_structs.c
@@ -7,23 +7,6 @@

 #include "bpm_server.h"

-#if defined (__BOARD_ML605__)
-
-const uint32_t fmc130m_4ch_si571_addr[NUM_FMC130M_4CH_SMIOS] = {0x49};
-const uint32_t fmc130m_4ch_ad9510_addr[NUM_FMC130M_4CH_SMIOS] = {0x01};
-
-/* The FMC EEPROM was supposed to have address 0x50 and 0x52, but GA1 and GA0
- * are all grounded on hardware */
-const uint32_t fmc130m_4ch_24aa64_addr[NUM_FMC130M_4CH_SMIOS] = {0x50};
-const uint32_t fmc130m_4ch_lm75a_addr[NUM_FMC130M_4CH_SMIOS][NUM_FMC130M_4CH_LM75A] = {
-        {0x48, 0x49},
-    };
-
-/* This CI PCA9547 is located on the carrier, but it's controlled by the FMC130M_4CH */
-const uint32_t fmc130m_4ch_pca9547_addr[NUM_FMC130M_4CH_SMIOS] = {0x70};
-
-#elif (__BOARD_AFCV3__)
-
 const uint32_t fmc130m_4ch_si571_addr[NUM_FMC130M_4CH_SMIOS] = {0x49, 0x49};
 const uint32_t fmc130m_4ch_ad9510_addr[NUM_FMC130M_4CH_SMIOS] = {0x01, 0x01};

@@ -39,9 +22,3 @@ const uint32_t fmc130m_4ch_lm75a_addr[NUM_FMC130M_4CH_SMIOS][NUM_FMC130M_4CH_LM7
 /* This CI PCA9547 is located on the carrier, but it's controlled by the FMC130M_4CH */
 const uint32_t fmc130m_4ch_pca9547_addr[NUM_FMC130M_4CH_SMIOS] = {0x70, 0x70};

-#else
-
-#error "Board not supported!"
-
-#endif
-
--- a/src/sm_io/modules/acq/ddr3_map.c
+++ b/src/sm_io/modules/acq/ddr3_map.c
@@ -9,72 +9,7 @@
 #include "acq_chan_gen_defs.h"
 #include "board.h"
 #include "ddr3_map.h"
-
-#if defined(__BOARD_ML605__)
-
-const acq_buf_t __acq_buf[NUM_ACQ_CORE_SMIOS][END_CHAN_ID] = {
-    /*** Acquistion 0 Channel Parameters ***/
-    {
-        {
-            .id = ADC0_CHAN_ID,
-            .start_addr = DDR3_ADC0_START_ADDR,
-            .end_addr = DDR3_ADC0_END_ADDR,
-            .max_samples = DDR3_ADC0_MAX_SAMPLES,
-            .sample_size = DDR3_ADC0_SAMPLE_SIZE
-        },
-        {
-            .id = TBTAMP0_CHAN_ID,
-            .start_addr = DDR3_TBTAMP0_START_ADDR,
-            .end_addr = DDR3_TBTAMP0_END_ADDR,
-            .max_samples =  DDR3_TBTAMP0_MAX_SAMPLES,
-            .sample_size = DDR3_TBTAMP0_SAMPLE_SIZE
-        },
-        {
-            .id = TBTPOS0_CHAN_ID,
-            .start_addr = DDR3_TBTPOS0_START_ADDR,
-            .end_addr = DDR3_TBTPOS0_END_ADDR,
-            .max_samples =DDR3_TBTPOS0_MAX_SAMPLES,
-            .sample_size = DDR3_TBTPOS0_SAMPLE_SIZE
-        },
-        {
-            .id = FOFBAMP0_CHAN_ID,
-            .start_addr = DDR3_FOFBAMP0_START_ADDR,
-            .end_addr = DDR3_FOFBAMP0_END_ADDR,
-            .max_samples =  DDR3_FOFBAMP0_MAX_SAMPLES,
-            .sample_size = DDR3_FOFBAMP0_SAMPLE_SIZE
-        },
-        {
-            .id = FOFBPOS0_CHAN_ID,
-            .start_addr = DDR3_FOFBPOS0_START_ADDR,
-            .end_addr = DDR3_FOFBPOS0_END_ADDR,
-            .max_samples = DDR3_FOFBPOS0_MAX_SAMPLES,
-            .sample_size = DDR3_FOFBPOS0_SAMPLE_SIZE
-        },
-        {
-            .id = MONITAMP0_CHAN_ID,
-            .start_addr = DDR3_MONITAMP0_START_ADDR,
-            .end_addr = DDR3_MONITAMP0_END_ADDR,
-            .max_samples = DDR3_MONITAMP0_MAX_SAMPLES,
-            .sample_size = DDR3_MONITAMP0_SAMPLE_SIZE
-        },
-        {
-            .id = MONITPOS0_CHAN_ID,
-            .start_addr = DDR3_MONITPOS0_START_ADDR,
-            .end_addr = DDR3_MONITPOS0_END_ADDR,
-            .max_samples = DDR3_MONITPOS0_MAX_SAMPLES,
-            .sample_size = DDR3_MONITPOS0_SAMPLE_SIZE
-        },
-        {
-            .id = MONIT1POS0_CHAN_ID,
-            .start_addr = DDR3_MONIT1POS0_START_ADDR,
-            .end_addr = DDR3_MONIT1POS0_END_ADDR,
-            .max_samples = DDR3_MONIT1POS0_MAX_SAMPLES,
-            .sample_size = DDR3_MONIT1POS0_SAMPLE_SIZE
-        }
-    }
-};
-
-#elif defined(__BOARD_AFCV3__)
+#include "ddr3_map_structs.h"

 const acq_buf_t __acq_buf[NUM_ACQ_CORE_SMIOS][END_CHAN_ID] = {
    /*** Acquisition Core 0 Channel Parameters ***/
@@ -322,9 +257,3 @@ const acq_buf_t __acq_buf[NUM_ACQ_CORE_SMIOS][END_CHAN_ID] = {
        },
    }
 };
-
-#else
-
-#error "Could not initialize acq_buf. Unsupported board!"
-
-#endif
--- a/src/boards/ml605/board.mk
+++ b/src/boards/ml605/board.mk
 board_DIR = $(SRC_DIR)/boards/ml605

-board_OBJS = $(board_DIR)/epics_mapping.o
+board_OBJS = $(board_DIR)/epics_mapping.o \
+			 $(board_DIR)/ddr3_map.o \
+			 $(board_DIR)/chips_addr.o
--- a/src/boards/ml605/chips_addr.c
+++ b/src/boards/ml605/chips_addr.c
+/*
+ * Copyright (C) 2015 LNLS (www.lnls.br)
+ * Author: Lucas Russo <lucas.russo@lnls.br>
+ *
+ * Released according to the GNU GPL, version 3 or any later version.
+ */
+
+#include "bpm_server.h"
+
+const uint32_t fmc130m_4ch_si571_addr[NUM_FMC130M_4CH_SMIOS] = {0x49};
+const uint32_t fmc130m_4ch_ad9510_addr[NUM_FMC130M_4CH_SMIOS] = {0x01};
+
+/* The FMC EEPROM was supposed to have address 0x50 and 0x52, but GA1 and GA0
+ * are all grounded on hardware */
+const uint32_t fmc130m_4ch_24aa64_addr[NUM_FMC130M_4CH_SMIOS] = {0x50};
+const uint32_t fmc130m_4ch_lm75a_addr[NUM_FMC130M_4CH_SMIOS][NUM_FMC130M_4CH_LM75A] = {
+        {0x48, 0x49},
+    };
+
+/* This CI PCA9547 is located on the carrier, but it's controlled by the FMC130M_4CH */
+const uint32_t fmc130m_4ch_pca9547_addr[NUM_FMC130M_4CH_SMIOS] = {0x70};
+
--- a/src/boards/ml605/ddr3_map.c
+++ b/src/boards/ml605/ddr3_map.c
+/*
+ * Copyright (C) 2014 LNLS (www.lnls.br)
+ * Author: Lucas Russo <lucas.russo@lnls.br>
+ *
+ * Released according to the GNU GPL, version 3 or any later version.
+ */
+
+#include <czmq.h>
+#include "acq_chan_gen_defs.h"
+#include "board.h"
+#include "ddr3_map_structs.h"
+#include "ddr3_map.h"
+
+const acq_buf_t __acq_buf[NUM_ACQ_CORE_SMIOS][END_CHAN_ID] = {
+    /*** Acquistion 0 Channel Parameters ***/
+    {
+        {
+            .id = ADC0_CHAN_ID,
+            .start_addr = DDR3_ADC0_START_ADDR,
+            .end_addr = DDR3_ADC0_END_ADDR,
+            .max_samples = DDR3_ADC0_MAX_SAMPLES,
+            .sample_size = DDR3_ADC0_SAMPLE_SIZE
+        },
+        {
+            .id = TBTAMP0_CHAN_ID,
+            .start_addr = DDR3_TBTAMP0_START_ADDR,
+            .end_addr = DDR3_TBTAMP0_END_ADDR,
+            .max_samples =  DDR3_TBTAMP0_MAX_SAMPLES,
+            .sample_size = DDR3_TBTAMP0_SAMPLE_SIZE
+        },
+        {
+            .id = TBTPOS0_CHAN_ID,
+            .start_addr = DDR3_TBTPOS0_START_ADDR,
+            .end_addr = DDR3_TBTPOS0_END_ADDR,
+            .max_samples =DDR3_TBTPOS0_MAX_SAMPLES,
+            .sample_size = DDR3_TBTPOS0_SAMPLE_SIZE
+        },
+        {
+            .id = FOFBAMP0_CHAN_ID,
+            .start_addr = DDR3_FOFBAMP0_START_ADDR,
+            .end_addr = DDR3_FOFBAMP0_END_ADDR,
+            .max_samples =  DDR3_FOFBAMP0_MAX_SAMPLES,
+            .sample_size = DDR3_FOFBAMP0_SAMPLE_SIZE
+        },
+        {
+            .id = FOFBPOS0_CHAN_ID,
+            .start_addr = DDR3_FOFBPOS0_START_ADDR,
+            .end_addr = DDR3_FOFBPOS0_END_ADDR,
+            .max_samples = DDR3_FOFBPOS0_MAX_SAMPLES,
+            .sample_size = DDR3_FOFBPOS0_SAMPLE_SIZE
+        },
+        {
+            .id = MONITAMP0_CHAN_ID,
+            .start_addr = DDR3_MONITAMP0_START_ADDR,
+            .end_addr = DDR3_MONITAMP0_END_ADDR,
+            .max_samples = DDR3_MONITAMP0_MAX_SAMPLES,
+            .sample_size = DDR3_MONITAMP0_SAMPLE_SIZE
+        },
+        {
+            .id = MONITPOS0_CHAN_ID,
+            .start_addr = DDR3_MONITPOS0_START_ADDR,
+            .end_addr = DDR3_MONITPOS0_END_ADDR,
+            .max_samples = DDR3_MONITPOS0_MAX_SAMPLES,
+            .sample_size = DDR3_MONITPOS0_SAMPLE_SIZE
+        },
+        {
+            .id = MONIT1POS0_CHAN_ID,
+            .start_addr = DDR3_MONIT1POS0_START_ADDR,
+            .end_addr = DDR3_MONIT1POS0_END_ADDR,
+            .max_samples = DDR3_MONIT1POS0_MAX_SAMPLES,
+            .sample_size = DDR3_MONIT1POS0_SAMPLE_SIZE
+        }
+    }
+};
--- a/src/libs/libbpmclient/Makefile
+++ b/src/libs/libbpmclient/Makefile
@@ -155,7 +155,7 @@ $(LIBNAME)_SMIO_EXPORTS = ../../sm_io/modules/fmc130m_4ch/sm_io_fmc130m_4ch_expo
 # Copy specific acq_chan.h defintions according to the BOARD MACRO
 $(LIBNAME)_ACQ_HEADERS_BASENAME = acq_chan
 $(LIBNAME)_ACQ_HEADERS = \
-	../../../include/boards/$(BOARD)/priv_defs/$($(LIBNAME)_ACQ_HEADERS_BASENAME)_$(BOARD).h
+	../../../include/boards/$(BOARD)/$($(LIBNAME)_ACQ_HEADERS_BASENAME).h
 $(LIBNAME)_INST_ACQ_HEADERS = include/$($(LIBNAME)_ACQ_HEADERS_BASENAME).h

 # Copy non-standard headers

--- a/src/sm_io/modules/acq/acq.mk
+++ b/src/sm_io/modules/acq/acq.mk
@@ -2,5 +2,4 @@ sm_io_acq_DIR = $(SRC_DIR)/sm_io/modules/acq

 sm_io_acq_OBJS = $(sm_io_acq_DIR)/sm_io_acq_core.o \
 		 $(sm_io_acq_DIR)/sm_io_acq_exp.o \
-		 $(sm_io_acq_DIR)/sm_io_acq_exports.o \
-		 $(sm_io_acq_DIR)/ddr3_map.o
+		 $(sm_io_acq_DIR)/sm_io_acq_exports.o
--- a/src/sm_io/modules/fmc130m_4ch/fmc130m_4ch.mk
+++ b/src/sm_io/modules/fmc130m_4ch/fmc130m_4ch.mk
@@ -2,6 +2,5 @@ sm_io_fmc130m_4ch_DIR = $(SRC_DIR)/sm_io/modules/fmc130m_4ch

 sm_io_fmc130m_4ch_OBJS = $(sm_io_fmc130m_4ch_DIR)/sm_io_fmc130m_4ch_core.o \
 				$(sm_io_fmc130m_4ch_DIR)/sm_io_fmc130m_4ch_exp.o \
-				$(sm_io_fmc130m_4ch_DIR)/sm_io_fmc130m_4ch_structs.o \
 				$(sm_io_fmc130m_4ch_DIR)/sm_io_fmc130m_4ch_exports.o \
 				$(sm_io_fmc130m_4ch_DIR)/sm_io_fmc130m_4ch_defaults.o
--- a/src/sm_io/modules/fmc130m_4ch/sm_io_fmc130m_4ch_core.c
+++ b/src/sm_io/modules/fmc130m_4ch/sm_io_fmc130m_4ch_core.c
@@ -9,7 +9,7 @@
 /* Private headers */
 #include "sm_io_fmc130m_4ch_defaults.h"
 #include "sm_io_fmc130m_4ch_core.h"
-#include "sm_io_fmc130m_4ch_structs.h"
+#include "chips_addr.h"

 /* Undef ASSERT_ALLOC to avoid conflicting with other ASSERT_ALLOC */
 #ifdef ASSERT_TEST