Commit e8ecada8 authored by Lucas Russo's avatar Lucas Russo

sm_io/modules/fmc250m_4ch/*: add ADC Sleep function

parent 13db8b2b
......@@ -68,15 +68,17 @@
#define FMC250M_4CH_NAME_RST_ADCS "fmc250m_4ch_rst_adcs"
#define FMC250M_4CH_OPCODE_RST_DIV_ADCS 46
#define FMC250M_4CH_NAME_RST_DIV_ADCS "fmc250m_4ch_rst_div_adcs"
#define FMC250M_4CH_OPCODE_TESTMODE0 47
#define FMC250M_4CH_OPCODE_SLEEP_ADCS 47
#define FMC250M_4CH_NAME_SLEEP_ADCS "fmc250m_4ch_sleep_adcs"
#define FMC250M_4CH_OPCODE_TESTMODE0 48
#define FMC250M_4CH_NAME_TESTMODE0 "fmc250m_4ch_test_mode0"
#define FMC250M_4CH_OPCODE_TESTMODE1 48
#define FMC250M_4CH_OPCODE_TESTMODE1 49
#define FMC250M_4CH_NAME_TESTMODE1 "fmc250m_4ch_test_mode1"
#define FMC250M_4CH_OPCODE_TESTMODE2 49
#define FMC250M_4CH_OPCODE_TESTMODE2 50
#define FMC250M_4CH_NAME_TESTMODE2 "fmc250m_4ch_test_mode2"
#define FMC250M_4CH_OPCODE_TESTMODE3 50
#define FMC250M_4CH_OPCODE_TESTMODE3 51
#define FMC250M_4CH_NAME_TESTMODE3 "fmc350m_4ch_test_mode3"
#define FMC250M_4CH_OPCODE_END 51
#define FMC250M_4CH_OPCODE_END 52
/* Messaging Reply OPCODES */
#define FMC250M_4CH_REPLY_TYPE uint32_t
......
......@@ -63,6 +63,10 @@ smio_err_e fmc250m_4ch_config_defaults (char *broker_endp, char *service,
ASSERT_TEST(client_err == BPM_CLIENT_SUCCESS, "Could not reset DIV CLK ADCs",
err_param_set, SMIO_ERR_CONFIG_DFLT);
client_err = bpm_set_sleep_adcs (config_client, service, FMC250M_4CH_DFLT_SLEEP_ADCS);
ASSERT_TEST(client_err == BPM_CLIENT_SUCCESS, "Could set activate ADCs",
err_param_set, SMIO_ERR_CONFIG_DFLT);
err_param_set:
bpm_client_destroy (&config_client);
err_alloc_client:
......
......@@ -13,6 +13,7 @@
#define FMC250M_4CH_DFLT_RST_ADCS 0x1
#define FMC250M_4CH_DFLT_RST_DIV_ADCS 0x1
#define FMC250M_4CH_DFLT_SLEEP_ADCS 0x0
smio_err_e fmc250m_4ch_config_defaults (char *broker_endp, char *service,
const char *log_file_name);
......
......@@ -335,6 +335,16 @@ RW_PARAM_FUNC(fmc250m_4ch, rst_div_adcs) {
NO_FMT_FUNC, SET_FIELD);
}
#define BPM_FMC250M_4CH_SLEEP_ADCS_MIN 0 /* Do nothing on SLEEP_ADCS pin */
#define BPM_FMC250M_4CH_SLEEP_ADCS_MAX 1 /* Pulse SLEEP_ADCS pin */
RW_PARAM_FUNC(fmc250m_4ch, sleep_adcs) {
SET_GET_PARAM(fmc250m_4ch, FMC_250M_CTRL_REGS_OFFS, WB_FMC_250M_4CH_CSR,
ADC_CTL, SLEEP_ADCS, SINGLE_BIT_PARAM,
BPM_FMC250M_4CH_SLEEP_ADCS_MIN, BPM_FMC250M_4CH_SLEEP_ADCS_MAX, NO_CHK_FUNC,
NO_FMT_FUNC, SET_FIELD);
}
/* Macros to avoid repetition of the function body ISLA216P */
typedef smch_err_e (*smch_isla216p_func_fp) (smch_isla216p_t *self, uint32_t *param);
......@@ -474,6 +484,7 @@ const disp_table_func_fp fmc250m_4ch_exp_fp [] = {
#endif
RW_PARAM_FUNC_NAME(fmc250m_4ch, rst_adcs),
RW_PARAM_FUNC_NAME(fmc250m_4ch, rst_div_adcs),
RW_PARAM_FUNC_NAME(fmc250m_4ch, sleep_adcs),
FMC250M_4CH_ISLA216P_FUNC_NAME(test_mode0),
FMC250M_4CH_ISLA216P_FUNC_NAME(test_mode1),
FMC250M_4CH_ISLA216P_FUNC_NAME(test_mode2),
......
......@@ -34,6 +34,18 @@ disp_op_t fmc250m_4ch_rst_div_adcs_exp = {
}
};
disp_op_t fmc250m_4ch_sleep_adcs_exp = {
.name = FMC250M_4CH_NAME_SLEEP_ADCS,
.opcode = FMC250M_4CH_OPCODE_SLEEP_ADCS,
.retval = DISP_ARG_ENCODE(DISP_ATYPE_UINT32, uint32_t),
.retval_owner = DISP_OWNER_OTHER,
.args = {
DISP_ARG_ENCODE(DISP_ATYPE_UINT32, uint32_t),
DISP_ARG_ENCODE(DISP_ATYPE_UINT32, uint32_t),
DISP_ARG_END
}
};
#if 0
disp_op_t fmc250m_4ch_adc_rand_exp = {
.name = FMC250M_4CH_NAME_ADC_RAND,
......@@ -407,6 +419,7 @@ const disp_op_t *fmc250m_4ch_exp_ops [] = {
#endif
&fmc250m_4ch_rst_adcs_exp,
&fmc250m_4ch_rst_div_adcs_exp,
&fmc250m_4ch_sleep_adcs_exp,
&fmc250m_4ch_test_mode0_exp,
&fmc250m_4ch_test_mode1_exp,
&fmc250m_4ch_test_mode2_exp,
......
......@@ -40,6 +40,7 @@ extern disp_op_t fmc250m_4ch_adc_dly3_exp;
#endif
extern disp_op_t fmc250m_4ch_rst_adcs_exp;
extern disp_op_t fmc250m_4ch_rst_div_adcs_exp;
extern disp_op_t fmc250m_4ch_sleep_adcs_exp;
extern disp_op_t fmc250m_4ch_test_mode0_exp;
extern disp_op_t fmc250m_4ch_test_mode1_exp;
extern disp_op_t fmc250m_4ch_test_mode2_exp;
......
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