Description
Project description
The goal of the CernFIP project is to provide a radiation tolerant FPGA-based replacement for the MicroFIP chip, a WorldFIP agent. This FPGA replacement is called nanoFIP.
Detailed project information
The project is organized in work packages. The work packages along with their status are described in the following table:
Work Package | Description | Status |
WP1 | Alstom MicroFIP preliminary VHDL code interpretation | Done |
WP2 | Write project management doc for insourcing of MicroFIP | Done |
WP3 | Write functional specification of MicroFIP replacement | Done |
WP4 | Rewrite and extend Alstom MicroFIP VHDL code | Cancelled |
WP5 | Write new NanoFIP VHDL code | Done |
WP6 | VHDL Testbench creation and simulation of nanoFIP | Done |
WP7 | Stand-alone mode test board design and test | Combined with WP8 |
WP8 | Design board for functional and radiation test | Done |
WP9 | Radiation tests | In Progress |
_For the development of the FPGA replacement either WP4 or WP5 will be
needed.
The decision between the adaptation of existing VHDL code (WP4) or
the development of completely new code (WP5) will be made based on the
results of WP1, WP2 and WP3.
It was concluded in March 2009 that new code needed to be developed._
-- Main.ErikVanDerBij - 5 April 2010