- 27 Sep, 2018 3 commits
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Denia Bouhired-Ferrag authored
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git://ohwr.org/level-conversion/conv-common-gw…Denia Bouhired-Ferrag authored
Merge branch 'proposed-master' of git://ohwr.org/level-conversion/conv-common-gw into proposed-master
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Denia Bouhired-Ferrag authored
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- 24 Sep, 2018 1 commit
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Denia Bouhired-Ferrag authored
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- 04 Jul, 2018 2 commits
- 12 Mar, 2018 1 commit
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Denia Bouhired-Ferrag authored
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- 26 Feb, 2018 1 commit
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Denia Bouhired-Ferrag authored
Merge branch 'DB-rs485-integration' of ohwr.org:level-conversion/conv-common-gw into DB-rs485-integration correcting for a push omission, and realigning remote and local branches
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- 22 Feb, 2018 1 commit
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Denia Bouhired-Ferrag authored
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- 27 Oct, 2017 1 commit
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Denia Bouhired-Ferrag authored
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- 12 Oct, 2017 2 commits
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Denia Bouhired-Ferrag authored
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Denia Bouhired-Ferrag authored
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- 10 Oct, 2017 4 commits
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Denia Bouhired-Ferrag authored
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Denia Bouhired-Ferrag authored
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Denia Bouhired-Ferrag authored
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Denia Bouhired-Ferrag authored
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- 09 Oct, 2017 2 commits
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Denia Bouhired-Ferrag authored
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Denia Bouhired-Ferrag authored
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- 03 Oct, 2017 1 commit
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Denia Bouhired-Ferrag authored
File contained instructions to modify wbgen2 generated vhdl. This is no longer required as explained in the file
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- 27 Sep, 2017 1 commit
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Denia Bouhired-Ferrag authored
Modified top files to use more generic front names rather than signal types that are more specific to a particular board, Eg: ttl and blo for conv-ttl-blo. Now using front and rear instead. this can now be reused with conv-ttl-rs485
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- 26 Sep, 2017 2 commits
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Denia Bouhired-Ferrag authored
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Denia Bouhired-Ferrag authored
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- 25 Sep, 2017 2 commits
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Denia Bouhired-Ferrag authored
Modified wbgen script to remove any references to ttl or blo signal types. Sole reference to front or rear signals
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Denia Bouhired-Ferrag authored
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- 13 Jul, 2017 2 commits
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Denia Bouhired-Ferrag authored
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Denia Bouhired-Ferrag authored
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- 08 Mar, 2017 5 commits
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Denia Bouhired-Ferrag authored
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Denia Bouhired-Ferrag authored
Some ports have been renamed. Notable some of the sfp ports, and a start on trying to replace all signal references, ttl or blo, with reference to input type, front or rear.
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Denia Bouhired-Ferrag authored
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Denia Bouhired-Ferrag authored
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Denia Bouhired-Ferrag authored
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- 07 Mar, 2017 1 commit
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Denia Bouhired-Ferrag authored
Small bug fixes to new version of conv_pulse_gen.vhd. Bug in pulse counters in top file conv_common_gw fixed. pulse counters were not resetting after the external loading of new values.
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- 03 Mar, 2017 1 commit
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Denia Bouhired-Ferrag authored
Major changes: conv_pulse_gen.vhd has been almost completely rewritten. Also top file now uses pulse periods instead of duty cycles, this is to be able to cope with none round duty cycles
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- 28 Feb, 2017 1 commit
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Denia Bouhired-Ferrag authored
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- 23 Feb, 2017 1 commit
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Denia Bouhired-Ferrag authored
Modified pulse counting process to use a Flancter based counter which is able to count very fast pulses
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- 17 Feb, 2017 1 commit
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Denia Bouhired-Ferrag authored
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- 14 Feb, 2017 2 commits
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Denia Bouhired-Ferrag authored
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Denia Bouhired-Ferrag authored
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- 13 Feb, 2017 2 commits
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Denia Bouhired-Ferrag authored
Cleaned up code with very small modifications to reflect new memory map with hardware revision number
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Denia Bouhired-Ferrag authored
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