Commit 101bf178 authored by Dimitris Lampridis's avatar Dimitris Lampridis

add test to check if CTR LEDs are on

parent 6bff6004
...@@ -89,39 +89,41 @@ def main (card=None, default_directory='.',suite=None, serial=""): ...@@ -89,39 +89,41 @@ def main (card=None, default_directory='.',suite=None, serial=""):
test_results={} test_results={}
test_results['PLL LEDs'] = 1
test_results['Ms errors'] = 1 test_results['Ms errors'] = 1
test_results['PLL errors'] = 1 test_results['PLL errors'] = 1
test_results['Missed errors'] = 1 test_results['Missed errors'] = 1
util.user_msg("---> Please make sure that the CTR FEC is powered on and has finished booting and then press [ENTER]")
ret = raw_input("")
util.user_msg("---> Please make sure that both the PLL and TMG LEDs on all four CTR cards are on and then press [ENTER]")
ret = raw_input("")
############################################################################### ###############################################################################
############################ actual test ###################################### ############################ actual test ######################################
############################################################################### ###############################################################################
for i in range(0,4): if not util.ask_user("Are the PLL and TMG LEDs on all four CTR cards ON?"):
ms1[i], pll1[i], miss1[i] = get_ctrtest_err(user, rsa, host, port, i+1) test_results['PLL LEDs'] = 0
util.err_msg("Some of the optical transmitters/receivers might be broken")
else:
for i in range(0,4):
ms1[i], pll1[i], miss1[i] = get_ctrtest_err(user, rsa, host, port, i+1)
time.sleep(duration) time.sleep(duration)
for i in range(0,4): for i in range(0,4):
ms2[i], pll2[i], miss2[i] = get_ctrtest_err(user, rsa, host, port, i+1) ms2[i], pll2[i], miss2[i] = get_ctrtest_err(user, rsa, host, port, i+1)
if (ms1[i] != ms2[i]): if (ms1[i] != ms2[i]):
test_results['Ms errors'] = 0 test_results['Ms errors'] = 0
util.err_msg("Module %s: Ms errors detected ({%s} != {%s})"%(i+1, ms2[i], ms1[i])) util.err_msg("Module %s: Ms errors detected ({%s} != {%s})" %
(i+1, ms2[i], ms1[i]))
if (pll1[i] != pll2[i]): if (pll1[i] != pll2[i]):
test_results['PLL errors'] = 0 test_results['PLL errors'] = 0
util.err_msg("Module %s: PLL errors detected ({%s} != {%s})"%(i+1, pll2[i], pll1[i])) util.err_msg("Module %s: PLL errors detected ({%s} != {%s})" %
(i+1, pll2[i], pll1[i]))
if (miss1[i] != miss2[i]): if (miss1[i] != miss2[i]):
test_results['Missed errors'] = 0 test_results['Missed errors'] = 0
util.err_msg("Module %s: Missed errors detected ({%s} != {%s})"%(i+1, miss2[i], miss1[i])) util.err_msg("Module %s: Missed errors detected ({%s} != {%s})" %
(i+1, miss2[i], miss1[i]))
############################################################################### ###############################################################################
########################## result processing ################################## ########################## result processing ##################################
......
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