PCB design review of CONV-TTL-RS485-RTM-OPT
Held on 2nd of February 2018 at CERN, for version 1 of the PCB layout.
Designer:
- Benoit Civel (TE/MPE/EM)
Reviewers:
- Dimitris Lampridis (BE/CO/HT)
- Denia Bouhired-Ferrag (BE/CO/HT)
- Erik Van Der Bij (BE/CO/HT)
- Tomasz Wlostowski (BE/CO/HT)
Also present:
- Evangelia Gousiou (BE/CO/HT)
- Benjamin Ninet (BE/CO/IN)
Comments and feedback status
- Comments going back to the schematic
- Add one extra test point for P5VME.
- Assigned to: Benoit Civel
- Status: DONE
- Think again about reference designators (R1, C2, etc.). Is it
possible to have short names that still reflect the hierarchy
(eg. R1A1 for resistor R1 in channel 1, TX 1)? If not, then make
sure that PDFs will include all pages of the schematic (all
channels, etc.) so that it will be possible for people to find
which components belong to each channel.
- Assigned to: Dimitris Lampridis
- Status: DONE
- What if plugged as an RTM to a CONV-TTL-BLO by mistake? Study if
we should add some protection to our circuit.
- Assigned to: Denia Bouhired-Ferrag, Dimitris Lampridis
- Status: DONE
-
Outcome: The RS485 transceivers have an absolute maximum
input voltage for the A and B pins set at -9V to 14V.
However, they are also able to take +/-50V transients
through 100Ω, which according to the
datasheet was
tested with 15us pulses, set at 15ms apart. We have tested
the CONV-TTL-BLO with our early prototype, using the
standard "blocking" pulses at maximum repetition rates
(1.2us wide
104kHz and 250ns wide
2MHz), and we've seen that the RS485 transceivers do not get damaged (they do not even warm up). At the same time, we've seen that the idle state of the blocking signals are translated by the RS485 receiver as logic '1', causing the optical transmitters to turn on for as long as the RTM is plugged to the CONV-TTL-BLO. This is not an issue for the optical transmitters though (but it could be on the receiving side, depending on the application). As such, it has been decided to add no extra protection. As an extra step, future versions of the CONV-TTL-BLO gateware should check the RTM ID and disable all outputs.
- Add one extra test point for P5VME.
- PCB layout comments
- Add a "+" to the electrolytic capacitor, next to it, such that
the plus sign will be visible after mounting the component on
the board.
- Assigned to: Benoit Civel
- Status: DONE
- Via size is too small, it will increase the production cost
without any obvious reason. Make them at least as big as the
layer stitching vias.
- Assigned to: Benoit Civel
- Status: DONE
- Eliminate potential "acid traps" (eg. under IC19) between ground
vias and ground fill.
- Assigned to: Benoit Civel
- Status: DONE
- Inverted silkscreen labels for test points (OP+, OP-, GND, etc.)
use small fonts and have been known to cause trouble during
manufacturing. Use non-inverted text, surrounded by a framing
rectangle (without any fill). Bigger labels (such as Channel 1,
TX A, etc) are ok, no need to change them.
- Assigned to: Benoit Civel
- Status: DONE
- Verify the mechanical stability of the sugarcubles for both the
optical transmitters and receivers. Will they hold without a nut
on the panel?
- Assigned to: Dimitris Lampridis
- Status: DONE
- Outcome: For the transmitter it's ok since there will be screws fixing the sugarcube to the PCB. The receiver has been shifted out a bit to allow for a nut to be tightened on the panel if necessary.
- Verify that the power supply circuit is not in the way of the P0
mating connector on the VME backplane.
- Assigned to: Dimitris Lampridis
- Status: DONE
- Outcome: Verified that the power supply circuit will not be in the way of the P0 mating connector on the VME backplane.
- Use "https://" for both URLs on the silkscreen.
- Assigned to: Benoit Civel
- Status: DONE
- Place big "IN, O1 and O2" silkscreen labels to the left of each
channel on the PCB, to match the labels on the panel.
- Assigned to: Benoit Civel
- Status: DONE
- Place little a,b,c,d and z labels on the P2 connector, such that
they remain visible after the connector is mounted.
- Assigned to: Benoit Civel
- Status: DONE
- Add a "+" to the electrolytic capacitor, next to it, such that
the plus sign will be visible after mounting the component on
the board.
- Front panel comments
- Figure out a way to fit "RTM" in the name printed on the panel.
- Assigned to: Dimitris Lampridis
- Status: DONE
- Outcome: Project has been renamed to CONV-RS485-OPT-RTM, which should fit in the panel.
- Figure out a way to fit "RTM" in the name printed on the panel.
- Other comments
- Change the name of the project and URL in OHWR. Also update the
board silkscreen with new URL (and name if necessary)
- Assigned to: Benoit Civel
- Status: DONE
- Outcome: Project has been renamed to CONV-RS485-OPT-RTM.
- Change the name of the project and URL in OHWR. Also update the
board silkscreen with new URL (and name if necessary)
Dimitris Lampridis - February, 2018