--==============================================================================
-- CERN (BE-CO-HT)
-- Package for i2c_slave.vhd
--==============================================================================
--
-- author: Theodor Stana (t.stana@cern.ch)
--
-- date of creation: 2013-06-06
--
-- version: 1.0
--
-- description: 
--
-- dependencies:
--
-- references:
-- 
--==============================================================================
-- GNU LESSER GENERAL PUBLIC LICENSE
--==============================================================================
-- This source file is free software; you can redistribute it and/or modify it
-- under the terms of the GNU Lesser General Public License as published by the
-- Free Software Foundation; either version 2.1 of the License, or (at your
-- option) any later version. This source is distributed in the hope that it
-- will be useful, but WITHOUT ANY WARRANTY; without even the implied warranty
-- of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
-- See the GNU Lesser General Public License for more details. You should have
-- received a copy of the GNU Lesser General Public License along with this
-- source; if not, download it from http://www.gnu.org/licenses/lgpl-2.1.html
--==============================================================================
-- last changes:
--    2013-06-06   Theodor Stana     t.stana@cern.ch     File created
--==============================================================================
-- TODO: - 
--==============================================================================

library ieee;
use ieee.std_logic_1164.all;
use ieee.numeric_std.all;

package i2c_slave_pkg is

  --============================================================================
  -- Constant declarations
  --============================================================================
  constant c_i2cs_idle      : std_logic_vector(1 downto 0) := "00";
  constant c_i2cs_addr_good : std_logic_vector(1 downto 0) := "01";
  constant c_i2cs_rd_done   : std_logic_vector(1 downto 0) := "10";
  constant c_i2cs_wr_done   : std_logic_vector(1 downto 0) := "11";

  --============================================================================
  -- Component declarations
  --============================================================================
  component i2c_slave is
    port
    (
      -- Clock, reset ports
      clk_i      : in  std_logic;
      rst_n_i    : in  std_logic;

      -- I2C lines
      scl_i      : in  std_logic;
      scl_o      : out std_logic;
      scl_en_o   : out std_logic;
      sda_i      : in  std_logic;
      sda_o      : out std_logic;
      sda_en_o   : out std_logic;

      -- Slave address
      i2c_addr_i : in  std_logic_vector(6 downto 0);
      
      -- ACK input, should be set after done_p_o = '1'
      -- (note that the bit is reversed wrt I2C ACK bit)
      -- '1' - ACK
      -- '0' - NACK
      i2c_ack_i  : in  std_logic;

      -- I2C bus operation, set after address detection
      -- '0' - write
      -- '1' - read
      op_o       : out std_logic;

      -- Byte to send, should be loaded while done_p_o = '1'
      tx_byte_i  : in  std_logic_vector(7 downto 0);

      -- Received byte, valid after done_p_o = '1'
      rx_byte_o  : out std_logic_vector(7 downto 0);

      -- Done pulse signal, valid when
      -- * received address matches i2c_addr_i, signaling valid op_o;
      -- * a byte was received, signaling valid rx_byte_o and an ACK/NACK should be
      -- sent to master;
      -- * sent a byte, should set tx_byte_i.
      done_p_o   : out std_logic;

      -- I2C transfer state
      -- "00" - Idle
      -- "01" - Got address, matches i2c_addr_i
      -- "10" - Read done, waiting ACK/NACK
      -- "11" - Write done, waiting next byte
      stat_o     : out std_logic_vector(1 downto 0)
    );
  end component i2c_slave;

end package i2c_slave_pkg;
