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C
Conv TTL Blocking - Testing
Commit 116d295b authored by Maciej Lipinski's avatar Maciej Lipinski
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[SW] update WR register's layout in SW to reflect current GW

parent 5988404a
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Showing with 2 additions and 5 deletions
fm/pts/python/ptsdefine.py
View file @ 116d295b
......@@ -58,10 +58,7 @@ CSR_STLEDT_OFS = 1
CSR_RLEDT_OFS = 2
CSR_TTLPT_OFS = 3
CSR_REARPT_OFS = 4
CSR_TSTCVCC_OFS = 5
CSR_TSTCMUXEN_OFS = 6
CSR_TSTCS0_OFS = 7
CSR_TSTCS1_OFS = 8
CSR_HWVERS_OFS = 8
CSR_RST_UNLOCK_OFS = 14
CSR_RST_OFS = 15
CSR_SWITCH_OFS = 16
......@@ -74,7 +71,7 @@ LSR = 0x008
LSR_FRONT_OFS = 0
LSR_FRONTINV_OFS = 6
LSR_REAR_OFS = 10
LSR_REARFS_OFS = 26
# 1-Wire base address, used in therm_id.py
TEMP_1WIRE_BASE = 0x010
......
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