Commit 8a325d82 authored by Maciej Lipinski's avatar Maciej Lipinski

[SW] added verification test of the version of PCB/hardare

parent 9594a57f
...@@ -20,6 +20,7 @@ all: ...@@ -20,6 +20,7 @@ all:
cp ubuntu/$(BOARD)/pyts/pts.py ubuntu/$(BOARD)/pts cp ubuntu/$(BOARD)/pyts/pts.py ubuntu/$(BOARD)/pts
cp ubuntu/$(BOARD)/pyts/jpts.py ubuntu/$(BOARD)/jpts cp ubuntu/$(BOARD)/pyts/jpts.py ubuntu/$(BOARD)/jpts
cp ubuntu/$(BOARD)/pyts/one.py ubuntu/$(BOARD)/one cp ubuntu/$(BOARD)/pyts/one.py ubuntu/$(BOARD)/one
ln -s pyts/hwvertest.py ubuntu/$(BOARD)/hwvertest.py
ln -s pyts/dac_vcxo_pll.py ubuntu/$(BOARD)/test01.py ln -s pyts/dac_vcxo_pll.py ubuntu/$(BOARD)/test01.py
ln -s pyts/leds.py ubuntu/$(BOARD)/test02.py ln -s pyts/leds.py ubuntu/$(BOARD)/test02.py
ln -s pyts/ttl_pulse_switch.py ubuntu/$(BOARD)/test03.py ln -s pyts/ttl_pulse_switch.py ubuntu/$(BOARD)/test03.py
......
##_______________________________________________________________________________________________
##
## CONV-TTL-BLO PTS
##
## CERN,BE/CO-HT
##_______________________________________________________________________________________________
##
##-----------------------------------------------------------------------------------------------
##
## CONV-TTL-BLO pcb version
##
##-----------------------------------------------------------------------------------------------
##
## Description Test whether the version of PCB is the expected one
##
##
## Authors Maciej Lipinski (maciej.lipinski@cern.ch)
## Website http://www.ohwr.org/projects/pts
## Date 17/08/2017
##-----------------------------------------------------------------------------------------------
##
##------------------------------------------------------------------------------------------------
## GNU LESSER GENERAL PUBLIC LICENSE
## ------------------------------------
## This source file is free software; you can redistribute it and/or modify it under the terms of
## the GNU Lesser General Public License as published by the Free Software Foundation; either
## version 2.1 of the License, or (at your option) any later version.
## This source is distributed in the hope that it will be useful, but WITHOUT ANY WARRANTY;
## without even the implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
## See the GNU Lesser General Public License for more details.
## You should have received a copy of the GNU Lesser General Public License along with this
## source; if not, download it from http://www.gnu.org/licenses/lgpl-2.1.html
##-------------------------------------------------------------------------------------------------
##-------------------------------------------------------------------------------------------------
## Import
##-------------------------------------------------------------------------------------------------
# Import system modules
import sys
sys.path.append("log/")
import time
import os, errno, re, sys, struct
import os.path
import traceback
import glob
import binascii
# Import common modules
from ctypes import *
from ptsexcept import *
from vv_pts import *
from ptsdefine import *
##-------------------------------------------------------------------------------------------------
## main --
##-------------------------------------------------------------------------------------------------
def main(bus,tname,inf,log):
"""
tests : Hardware version
uses : pts.bit and hwvertest.py
"""
HWVERS = 4.0
pel = PTS_ERROR_LOGGER(inf,log)
try:
# Get gateware version and convert it to major-minor float number
hwvers = (bus.vv_read(CSR) & 0x3F00) >> CSR_HWVERS_OFS
maj = float(hwvers >> 2)
min = float(hwvers & 0x03)
min /= 10
hwvers = maj + min
# and now check if appropriate
if (hwvers == HWVERS):
msg = "HW/PCB version correct: %2.*f\n" % (p, hwvers)
inf.write(msg)
else:
msg = "ERROR: HW/PCBe version (%2.*f) incorrect - expected %2.*f" % (p, hwvers, pr, HWVERS)
pel.set(msg)
return pel.get()
except BusException, e:
raise PtsError("SKT Exception: %s" % (e))
except BusWarning, e:
raise PtsError("SKT Warning: %s" % (e))
\ No newline at end of file
...@@ -193,65 +193,99 @@ if __name__ == '__main__': ...@@ -193,65 +193,99 @@ if __name__ == '__main__':
except BusWarning, e: except BusWarning, e:
print "Warning:Bus Exception: %s" % (e) print "Warning:Bus Exception: %s" % (e)
# Start running the tests. # Test version of HW/PCB before running any other tests
for t in tns: tname = "hwvertest"
try:
# First load a firmware and read back a register to confirm correct load.
if bus.vv_load() == 0:
msg = "INFO: Found CONV-TTL-BLO board in slot %d\n" % (lun)
inf.write(msg + '\n')
# The test is passed the test name, the log and info files and the
# bus object. The test program returns the number of errors that
# occured. If no errors occur, the test PASSes, otherwise it FAILs.
cc = run_test(tname,bus,inf,log)
if cc == 0:
msg = "PASS: %s" % (tname)
log.write(msg + '\n')
inf.write(msg + '\n')
print msg
else:
msg = "FAIL: %s->%s" % (tname, lnk_ptr(tname))
log.write(msg + '\n')
inf.write(msg + '\n')
print msg
tname = "test%02d" % t[0] except Exception, e:
pyt = "%s/%s.py" % (dir, tname) if options.debug:
print e
traceback.print_exc()
if path.exists(pyt) and path.isfile(pyt) and access(pyt, R_OK): msg = "FAIL: %s->%s (%s)" % (tname, lnk_ptr(tname), e)
log.write(msg + '\n')
inf.write(msg + '\n')
print msg
for n in range(t[1]): # Start running the tests, only if the HW/PCB version is OK
if cc == 0:
for t in tns:
if n == 10: tname = "test%02d" % t[0]
msg = "Printing suppresses after 10 runs" pyt = "%s/%s.py" % (dir, tname)
print msg
log.write('\n' + msg + '\n')
inf.write('\n' + msg + '\n')
if n < 10: if path.exists(pyt) and path.isfile(pyt) and access(pyt, R_OK):
msg = "Run:%d Begin:%s" % (n+1,tname)
print msg
log.write('\n' + msg + '\n')
inf.write('\n' + msg + '\n')
try: for n in range(t[1]):
# First load a firmware and read back a register to confirm correct load.
if bus.vv_load() == 0:
msg = "INFO: Found CONV-TTL-BLO board in slot %d\n" % (lun)
inf.write(msg + '\n')
# Each test is passed the test name, the log and info files and the if n == 10:
# bus object. The test program is expected to return the number of msg = "Printing suppresses after 10 runs"
# errors that occured. If no errors occur, the test PASSes, otherwise print msg
# it FAILs. log.write('\n' + msg + '\n')
cc = run_test(tname,bus,inf,log) inf.write('\n' + msg + '\n')
if cc == 0:
msg = "PASS: %s" % (tname) if n < 10:
log.write(msg + '\n') msg = "Run:%d Begin:%s" % (n+1,tname)
inf.write(msg + '\n')
print msg print msg
else: log.write('\n' + msg + '\n')
msg = "FAIL: %s->%s" % (tname, lnk_ptr(tname)) inf.write('\n' + msg + '\n')
try:
# First load a firmware and read back a register to confirm correct load.
if bus.vv_load() == 0:
msg = "INFO: Found CONV-TTL-BLO board in slot %d\n" % (lun)
inf.write(msg + '\n')
# Each test is passed the test name, the log and info files and the
# bus object. The test program is expected to return the number of
# errors that occured. If no errors occur, the test PASSes, otherwise
# it FAILs.
cc = run_test(tname,bus,inf,log)
if cc == 0:
msg = "PASS: %s" % (tname)
log.write(msg + '\n')
inf.write(msg + '\n')
print msg
else:
msg = "FAIL: %s->%s" % (tname, lnk_ptr(tname))
log.write(msg + '\n')
inf.write(msg + '\n')
print msg
except Exception, e:
if options.debug:
print e
traceback.print_exc()
msg = "FAIL: %s->%s (%s)" % (tname, lnk_ptr(tname), e)
log.write(msg + '\n') log.write(msg + '\n')
inf.write(msg + '\n') inf.write(msg + '\n')
print msg print msg
except Exception, e: if n < 10:
if options.debug: msg = "Run:%d End:%s\n" % (n+1,tname)
print e print msg
traceback.print_exc() log.write(msg + '\n')
inf.write(msg + '\n')
msg = "FAIL: %s->%s (%s)" % (tname, lnk_ptr(tname), e)
log.write(msg + '\n')
inf.write(msg + '\n')
print msg
if n < 10:
msg = "Run:%d End:%s\n" % (n+1,tname)
print msg
log.write(msg + '\n')
inf.write(msg + '\n')
# Close the bus and the files # Close the bus and the files
bus.vv_close() bus.vv_close()
......
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