Commit a5f734f7 authored by Maciej Lipinski's avatar Maciej Lipinski

[DOC] updated register maps in the gateware guide

- regenerated from *.wb map of PTS control and status regs because
  this one changed
- regenerated from *.wb map of Pulse counter regs, just in case
- I could not find *.wb file for the Clock coutner regs, so I just
  changed the color of the colums to match the newly-generated files
parent c2059237
......@@ -4,7 +4,7 @@
Base address (125-MHz counter): 0x100 \\
Base address (20-MHz counter): 0x120
{
\rowcolors{2}{white}{gray!25}
\rowcolors{2}{white}{RoyalPurple!25}
\begin{longtable}{l l l p{.5\textwidth}}
\hline
\textbf{Offset} & \textbf{Reset} & \textbf{Name}
......@@ -51,7 +51,7 @@ reserved registers is undefined
\hline
7 & 6 & 5 & 4 & 3 & 2 & 1 & 0\\
\hline
\multicolumn{1}{|c}{-} & - & - & - & - & - & - & \multicolumn{1}{|c|}{\cellcolor{gray!25}FULL}\\
\multicolumn{1}{|c}{-} & - & - & - & - & - & - & \multicolumn{1}{|c|}{\cellcolor{RoyalPurple!25}FULL}\\
\hline
\end{tabular}
}
......@@ -78,19 +78,19 @@ FULL
\begin{tabular}{>{\centering\arraybackslash}p{1.5cm} >{\centering\arraybackslash}p{1.5cm} >{\centering\arraybackslash}p{1.5cm} >{\centering\arraybackslash}p{1.5cm} >{\centering\arraybackslash}p{1.5cm} >{\centering\arraybackslash}p{1.5cm} >{\centering\arraybackslash}p{1.5cm} >{\centering\arraybackslash}p{1.5cm} }
31 & 30 & 29 & 28 & 27 & 26 & 25 & 24\\
\hline
\multicolumn{8}{|c|}{\cellcolor{gray!25}CNTMAX[31:24]}\\
\multicolumn{8}{|c|}{\cellcolor{RoyalPurple!25}CNTMAX[31:24]}\\
\hline
23 & 22 & 21 & 20 & 19 & 18 & 17 & 16\\
\hline
\multicolumn{8}{|c|}{\cellcolor{gray!25}CNTMAX[23:16]}\\
\multicolumn{8}{|c|}{\cellcolor{RoyalPurple!25}CNTMAX[23:16]}\\
\hline
15 & 14 & 13 & 12 & 11 & 10 & 9 & 8\\
\hline
\multicolumn{8}{|c|}{\cellcolor{gray!25}CNTMAX[15:8]}\\
\multicolumn{8}{|c|}{\cellcolor{RoyalPurple!25}CNTMAX[15:8]}\\
\hline
7 & 6 & 5 & 4 & 3 & 2 & 1 & 0\\
\hline
\multicolumn{8}{|c|}{\cellcolor{gray!25}CNTMAX[7:0]}\\
\multicolumn{8}{|c|}{\cellcolor{RoyalPurple!25}CNTMAX[7:0]}\\
\hline
\end{tabular}
}
......@@ -116,19 +116,19 @@ When this value is reached, the counter will stop and needs to be reset via the
\begin{tabular}{>{\centering\arraybackslash}p{1.5cm} >{\centering\arraybackslash}p{1.5cm} >{\centering\arraybackslash}p{1.5cm} >{\centering\arraybackslash}p{1.5cm} >{\centering\arraybackslash}p{1.5cm} >{\centering\arraybackslash}p{1.5cm} >{\centering\arraybackslash}p{1.5cm} >{\centering\arraybackslash}p{1.5cm} }
31 & 30 & 29 & 28 & 27 & 26 & 25 & 24\\
\hline
\multicolumn{8}{|c|}{\cellcolor{gray!25}CNTVAL[31:24]}\\
\multicolumn{8}{|c|}{\cellcolor{RoyalPurple!25}CNTVAL[31:24]}\\
\hline
23 & 22 & 21 & 20 & 19 & 18 & 17 & 16\\
\hline
\multicolumn{8}{|c|}{\cellcolor{gray!25}CNTVAL[23:16]}\\
\multicolumn{8}{|c|}{\cellcolor{RoyalPurple!25}CNTVAL[23:16]}\\
\hline
15 & 14 & 13 & 12 & 11 & 10 & 9 & 8\\
\hline
\multicolumn{8}{|c|}{\cellcolor{gray!25}CNTVAL[15:8]}\\
\multicolumn{8}{|c|}{\cellcolor{RoyalPurple!25}CNTVAL[15:8]}\\
\hline
7 & 6 & 5 & 4 & 3 & 2 & 1 & 0\\
\hline
\multicolumn{8}{|c|}{\cellcolor{gray!25}CNTVAL[7:0]}\\
\multicolumn{8}{|c|}{\cellcolor{RoyalPurple!25}CNTVAL[7:0]}\\
\hline
\end{tabular}
}
......@@ -165,7 +165,7 @@ CNTVAL
\hline
7 & 6 & 5 & 4 & 3 & 2 & 1 & 0\\
\hline
\multicolumn{1}{|c}{-} & - & - & - & - & - & - & \multicolumn{1}{|c|}{\cellcolor{gray!25}CNTRST}\\
\multicolumn{1}{|c}{-} & - & - & - & - & - & - & \multicolumn{1}{|c|}{\cellcolor{RoyalPurple!25}CNTRST}\\
\hline
\end{tabular}
}
......@@ -204,7 +204,7 @@ CNTRST
\hline
7 & 6 & 5 & 4 & 3 & 2 & 1 & 0\\
\hline
\multicolumn{1}{|c}{-} & - & - & - & - & - & - & \multicolumn{1}{|c|}{\cellcolor{gray!25}CNTEN}\\
\multicolumn{1}{|c}{-} & - & - & - & - & - & - & \multicolumn{1}{|c|}{\cellcolor{RoyalPurple!25}CNTEN}\\
\hline
\end{tabular}
}
......@@ -231,19 +231,19 @@ CNTEN
\begin{tabular}{>{\centering\arraybackslash}p{1.5cm} >{\centering\arraybackslash}p{1.5cm} >{\centering\arraybackslash}p{1.5cm} >{\centering\arraybackslash}p{1.5cm} >{\centering\arraybackslash}p{1.5cm} >{\centering\arraybackslash}p{1.5cm} >{\centering\arraybackslash}p{1.5cm} >{\centering\arraybackslash}p{1.5cm} }
31 & 30 & 29 & 28 & 27 & 26 & 25 & 24\\
\hline
\multicolumn{8}{|c|}{\cellcolor{gray!25}CNTCHK[31:24]}\\
\multicolumn{8}{|c|}{\cellcolor{RoyalPurple!25}CNTCHK[31:24]}\\
\hline
23 & 22 & 21 & 20 & 19 & 18 & 17 & 16\\
\hline
\multicolumn{8}{|c|}{\cellcolor{gray!25}CNTCHK[23:16]}\\
\multicolumn{8}{|c|}{\cellcolor{RoyalPurple!25}CNTCHK[23:16]}\\
\hline
15 & 14 & 13 & 12 & 11 & 10 & 9 & 8\\
\hline
\multicolumn{8}{|c|}{\cellcolor{gray!25}CNTCHK[15:8]}\\
\multicolumn{8}{|c|}{\cellcolor{RoyalPurple!25}CNTCHK[15:8]}\\
\hline
7 & 6 & 5 & 4 & 3 & 2 & 1 & 0\\
\hline
\multicolumn{8}{|c|}{\cellcolor{gray!25}CNTCHK[7:0]}\\
\multicolumn{8}{|c|}{\cellcolor{RoyalPurple!25}CNTCHK[7:0]}\\
\hline
\end{tabular}
}
......
\subsection{PTS control and status registers}
\label{app:pts-regs}
\label{app:pts-regs-csr}
Base address: 0x000
{
\rowcolors{2}{white}{gray!25}
\begin{longtable}{l l l p{.5\textwidth}}
\hline
\textbf{Offset} & \textbf{Reset} & \textbf{Name}
& \textbf{Description} \\
\hline
\endfirsthead
\hline
\hline
\endhead
\subsubsection{Memory map summary}
\rowcolors{2}{gray!25}{white}
\resizebox{\textwidth}{!}{
\begin{tabular}{|l|l|l|l|l|}
\rowcolor{RoyalPurple}
\color{white} SW Offset & \color{white} Type & \color{white} Name &
\color{white} HW prefix & \color{white} C prefix\\
0x0& REG & BIDR & pts\_bidr & BIDR\\
0x4& REG & CSR & pts\_csr & CSR\\
0x8& REG & LSR & pts\_lsr & LSR\\
\hline
\endfoot
0x0 & 0x54424c4f & BIDR & Board ID Register\\
0x4 & (1) & CSR & Control and Status Register\\
0x8 & (2) & LSR & Line Status Register\\
\end{longtable}
\end{tabular}
}
\noindent Note (1): The reset value of the status bits in the CSR cannot be specified, since it is based on the
the state of the on-board switches and whether an RTM is plugged in or not. Control bits in the CSR default to 0.
\subsubsection{Register description}
\paragraph*{BIDR}\vspace{12pt}
\noindent Note (2): The reset value of the LSR cannot be specified, since it depends on whether a cable
is plugged into the channel or not.
\rowcolors{1}{white}{white}
\begin{tabular}{l l }
{\bf HW prefix:} & pts\_bidr\\
{\bf HW address:} & 0x0\\
{\bf SW prefix:} & BIDR\\
{\bf SW offset:} & 0x0\\
\end{tabular}
\subsubsection{BIDR -- Board ID Register}
\label{app:pts-regs-bidr}
\vspace{12pt}
Board ID Register
\vspace{11pt}
\vspace{12pt}
\noindent
\resizebox{\textwidth}{!}{
\begin{tabular}{>{\centering\arraybackslash}p{1.5cm} >{\centering\arraybackslash}p{1.5cm} >{\centering\arraybackslash}p{1.5cm} >{\centering\arraybackslash}p{1.5cm} >{\centering\arraybackslash}p{1.5cm} >{\centering\arraybackslash}p{1.5cm} >{\centering\arraybackslash}p{1.5cm} >{\centering\arraybackslash}p{1.5cm} }
31 & 30 & 29 & 28 & 27 & 26 & 25 & 24\\
\hline
\multicolumn{8}{|c|}{\cellcolor{gray!25}BIDR[31:24]}\\
\multicolumn{8}{|c|}{\cellcolor{RoyalPurple!25}BIDR[31:24]}\\
\hline
23 & 22 & 21 & 20 & 19 & 18 & 17 & 16\\
\hline
\multicolumn{8}{|c|}{\cellcolor{gray!25}BIDR[23:16]}\\
\multicolumn{8}{|c|}{\cellcolor{RoyalPurple!25}BIDR[23:16]}\\
\hline
15 & 14 & 13 & 12 & 11 & 10 & 9 & 8\\
\hline
\multicolumn{8}{|c|}{\cellcolor{gray!25}BIDR[15:8]}\\
\multicolumn{8}{|c|}{\cellcolor{RoyalPurple!25}BIDR[15:8]}\\
\hline
7 & 6 & 5 & 4 & 3 & 2 & 1 & 0\\
\hline
\multicolumn{8}{|c|}{\cellcolor{gray!25}BIDR[7:0]}\\
\multicolumn{8}{|c|}{\cellcolor{RoyalPurple!25}BIDR[7:0]}\\
\hline
\end{tabular}
}
......@@ -58,36 +57,40 @@ is plugged into the channel or not.
{\bf
BIDR
} [\emph{read-only}]: ID register bits
\\
Reset value: 0x54424c4f
\end{small}
\item \begin{small}
\textbf{Unimplemented bits}: write as '0', read undefined
\end{small}
\end{itemize}
\paragraph*{CSR}\vspace{12pt}
\subsubsection{CSR -- Control and Status Register}
\label{app:pts-regs-csr}
\rowcolors{1}{white}{white}
\begin{tabular}{l l }
{\bf HW prefix:} & pts\_csr\\
{\bf HW address:} & 0x1\\
{\bf SW prefix:} & CSR\\
{\bf SW offset:} & 0x4\\
\end{tabular}
\vspace{11pt}
\vspace{12pt}
Control and Status Register
\vspace{12pt}
\noindent
\resizebox{\textwidth}{!}{
\begin{tabular}{>{\centering\arraybackslash}p{1.5cm} >{\centering\arraybackslash}p{1.5cm} >{\centering\arraybackslash}p{1.5cm} >{\centering\arraybackslash}p{1.5cm} >{\centering\arraybackslash}p{1.5cm} >{\centering\arraybackslash}p{1.5cm} >{\centering\arraybackslash}p{1.5cm} >{\centering\arraybackslash}p{1.5cm} }
31 & 30 & 29 & 28 & 27 & 26 & 25 & 24\\
\hline
\multicolumn{1}{|c|}{\cellcolor{gray!25}I2C\_WDTO} & \multicolumn{1}{|c|}{\cellcolor{gray!25}I2C\_ERR} & \multicolumn{6}{|c|}{\cellcolor{gray!25}RTM[5:0]}\\
\multicolumn{1}{|c|}{\cellcolor{RoyalPurple!25}I2C\_WDTO} & \multicolumn{1}{|c|}{\cellcolor{RoyalPurple!25}I2C\_ERR} & \multicolumn{6}{|c|}{\cellcolor{RoyalPurple!25}RTM[5:0]}\\
\hline
23 & 22 & 21 & 20 & 19 & 18 & 17 & 16\\
\hline
\multicolumn{8}{|c|}{\cellcolor{gray!25}SWITCH[7:0]}\\
\multicolumn{8}{|c|}{\cellcolor{RoyalPurple!25}SWITCH[7:0]}\\
\hline
15 & 14 & 13 & 12 & 11 & 10 & 9 & 8\\
\hline
\multicolumn{1}{|c|}{\cellcolor{gray!25}RST} & \multicolumn{1}{|c|}{\cellcolor{gray!25}RST\_UNLOCK} & - & - & - & - & - & \multicolumn{1}{c|}{-}\\
\multicolumn{1}{|c|}{\cellcolor{RoyalPurple!25}RST} & \multicolumn{1}{|c|}{\cellcolor{RoyalPurple!25}RST\_UNLOCK} & \multicolumn{6}{|c|}{\cellcolor{RoyalPurple!25}HWVERS[5:0]}\\
\hline
7 & 6 & 5 & 4 & 3 & 2 & 1 & 0\\
\hline
\multicolumn{1}{|c}{-} & - & - & \multicolumn{1}{|c|}{\cellcolor{gray!25}REARPT} & \multicolumn{1}{|c|}{\cellcolor{gray!25}TTLPT} & \multicolumn{1}{|c|}{\cellcolor{gray!25}RLEDT} & \multicolumn{1}{|c|}{\cellcolor{gray!25}STLEDT} & \multicolumn{1}{|c|}{\cellcolor{gray!25}CHLEDT}\\
\multicolumn{1}{|c}{-} & - & - & \multicolumn{1}{|c|}{\cellcolor{RoyalPurple!25}REARPT} & \multicolumn{1}{|c|}{\cellcolor{RoyalPurple!25}TTLPT} & \multicolumn{1}{|c|}{\cellcolor{RoyalPurple!25}RLEDT} & \multicolumn{1}{|c|}{\cellcolor{RoyalPurple!25}STLEDT} & \multicolumn{1}{|c|}{\cellcolor{RoyalPurple!25}CHLEDT}\\
\hline
\end{tabular}
}
......@@ -130,6 +133,13 @@ REARPT
\end{small}
\item \begin{small}
{\bf
HWVERS
} [\emph{read-only}]: PCB version number
\\
6 bits representing HW/PCB version number \\ 4 MSB represent HW version number \\ 2 LSB represent number of execution \\ Eg: value 010010 represents PCB version 4.2
\end{small}
\item \begin{small}
{\bf
RST\_UNLOCK
} [\emph{read/write}]: Reset unlock bit
\\
......@@ -170,15 +180,21 @@ I2C\_WDTO
\\
1 -- timeout occured \\ 0 -- no timeout \\ This bit can be cleared by writing a '1' to it
\end{small}
\item \begin{small}
\textbf{Unimplemented bits}: write as '0', read undefined
\end{small}
\end{itemize}
\vspace{11pt}
\subsubsection{LSR -- Line Status Register}
\label{app:pts-regs-lsr}
\paragraph*{LSR}\vspace{12pt}
\rowcolors{1}{white}{white}
\begin{tabular}{l l }
{\bf HW prefix:} & pts\_lsr\\
{\bf HW address:} & 0x2\\
{\bf SW prefix:} & LSR\\
{\bf SW offset:} & 0x8\\
\end{tabular}
\vspace{11pt}
\vspace{12pt}
Line Status Register
\vspace{12pt}
\noindent
\resizebox{\textwidth}{!}{
\begin{tabular}{>{\centering\arraybackslash}p{1.5cm} >{\centering\arraybackslash}p{1.5cm} >{\centering\arraybackslash}p{1.5cm} >{\centering\arraybackslash}p{1.5cm} >{\centering\arraybackslash}p{1.5cm} >{\centering\arraybackslash}p{1.5cm} >{\centering\arraybackslash}p{1.5cm} >{\centering\arraybackslash}p{1.5cm} }
......@@ -192,11 +208,11 @@ I2C\_WDTO
\hline
15 & 14 & 13 & 12 & 11 & 10 & 9 & 8\\
\hline
\multicolumn{6}{|c|}{\cellcolor{gray!25}REAR[5:0]} & \multicolumn{2}{|c|}{\cellcolor{gray!25}FRONTINV[3:2]}\\
\multicolumn{6}{|c|}{\cellcolor{RoyalPurple!25}REAR[5:0]} & \multicolumn{2}{|c|}{\cellcolor{RoyalPurple!25}FRONTINV[3:2]}\\
\hline
7 & 6 & 5 & 4 & 3 & 2 & 1 & 0\\
\hline
\multicolumn{2}{|c|}{\cellcolor{gray!25}FRONTINV[1:0]} & \multicolumn{6}{|c|}{\cellcolor{gray!25}FRONT[5:0]}\\
\multicolumn{2}{|c|}{\cellcolor{RoyalPurple!25}FRONTINV[1:0]} & \multicolumn{6}{|c|}{\cellcolor{RoyalPurple!25}FRONT[5:0]}\\
\hline
\end{tabular}
}
......@@ -223,9 +239,6 @@ REAR
\\
Line state at board input\\ Bit 0 -- channel 1\\ Bit 1 -- channel 2\\ etc.
\end{small}
\item \begin{small}
\textbf{Unimplemented bits}: write as '0', read undefined
\end{small}
\end{itemize}
......
\subsection{Pulse counter registers}
\label{app:pulse-cnt}
Base address: 0xc00
{
\rowcolors{2}{white}{gray!25}
\begin{longtable}{l l l p{.35\textwidth}}
\hline
\textbf{Offset} & \textbf{Reset} & \textbf{Name}
& \textbf{Description} \\
\hline
\endfirsthead
\hline
\textbf{Offset} & \textbf{Reset} & \textbf{Name}
& \textbf{Description} \\
\hline
\endhead
\hline
\endfoot
0x00 & 0x00000000 & TTLCH1OCR & TTL CH1 output counter register\\
0x04 & 0x00000000 & TTLCH1ICR & TTL CH1 input counter register\\
0x08 & 0x00000000 & TTLCH2OCR & TTL CH2 output counter register\\
0x0c & 0x00000000 & TTLCH2ICR & TTL CH2 input counter register\\
0x10 & 0x00000000 & TTLCH3OCR & TTL CH3 output counter register\\
0x14 & 0x00000000 & TTLCH3ICR & TTL CH3 input counter register\\
0x18 & 0x00000000 & TTLCH4OCR & TTL CH4 output counter register\\
0x1c & 0x00000000 & TTLCH4ICR & TTL CH4 input counter register\\
0x20 & 0x00000000 & TTLCH5OCR & TTL CH5 output counter register\\
0x24 & 0x00000000 & TTLCH5ICR & TTL CH5 input counter register\\
0x28 & 0x00000000 & TTLCH6OCR & TTL CH6 output counter register\\
0x2c & 0x00000000 & TTLCH6ICR & TTL CH6 input counter register\\
0x30 & 0x00000000 & INVTTLCHAOCR & INV-TTL CHA output counter register\\
0x34 & 0x00000000 & INVTTLCHAICR & INV-TTL CHA input counter register\\
0x38 & 0x00000000 & INVTTLCHBOCR & INV-TTL CHB output counter register\\
0x3c & 0x00000000 & INVTTLCHBICR & INV-TTL CHB input counter register\\
0x40 & 0x00000000 & INVTTLCHCOCR & INV-TTL CHC output counter register\\
0x44 & 0x00000000 & INVTTLCHCICR & INV-TTL CHC input counter register\\
0x48 & 0x00000000 & INVTTLCHDOCR & INV-TTL CHD output counter register\\
0x4c & 0x00000000 & INVTTLCHDICR & INV-TTL CHD input counter register\\
0x50 & 0x00000000 & REARCH1OCR & Rear CH1 output counter register\\
0x54 & 0x00000000 & REARCH1ICR & Rear CH1 input counter register\\
0x58 & 0x00000000 & REARCH2OCR & Rear CH2 output counter register\\
0x5c & 0x00000000 & REARCH2ICR & Rear CH2 input counter register\\
0x60 & 0x00000000 & REARCH3OCR & Rear CH3 output counter register\\
0x64 & 0x00000000 & REARCH3ICR & Rear CH3 input counter register\\
0x68 & 0x00000000 & REARCH4OCR & Rear CH4 output counter register\\
0x6c & 0x00000000 & REARCH4ICR & Rear CH4 input counter register\\
0x70 & 0x00000000 & REARCH5OCR & Rear CH5 output counter register\\
0x74 & 0x00000000 & REARCH5ICR & Rear CH5 input counter register\\
0x78 & 0x00000000 & REARCH6OCR & Rear CH6 output counter register\\
0x7c & 0x00000000 & REARCH6ICR & Rear CH6 input counter register\\
\end{longtable}
\label{subsec:wbgen:pulse_cnt}
Registers containing the values for input and output generated pulses
\subsubsection{Memory map summary}
\rowcolors{2}{gray!25}{white}
\resizebox{\textwidth}{!}{
\begin{tabular}{|l|l|l|l|l|}
\rowcolor{RoyalPurple}
\color{white} SW Offset & \color{white} Type & \color{white} Name &
\color{white} HW prefix & \color{white} C prefix\\
0x0& REG & TTLCH1OCR & pulse\_cnt\_ttlch1o & TTLCH1O\\
0x4& REG & TTLCH1ICR & pulse\_cnt\_ttlch1i & TTLCH1I\\
0x8& REG & TTLCH2OCR & pulse\_cnt\_ttlch2o & TTLCH2O\\
0xc& REG & TTLCH2ICR & pulse\_cnt\_ttlch2i & TTLCH2I\\
0x10& REG & TTLCH3OCR & pulse\_cnt\_ttlch3o & TTLCH3O\\
0x14& REG & TTLCH3ICR & pulse\_cnt\_ttlch3i & TTLCH3I\\
0x18& REG & TTLCH4OCR & pulse\_cnt\_ttlch4o & TTLCH4O\\
0x1c& REG & TTLCH4ICR & pulse\_cnt\_ttlch4i & TTLCH4I\\
0x20& REG & TTLCH5OCR & pulse\_cnt\_ttlch5o & TTLCH5O\\
0x24& REG & TTLCH5ICR & pulse\_cnt\_ttlch5i & TTLCH5I\\
0x28& REG & TTLCH6OCR & pulse\_cnt\_ttlch6o & TTLCH6O\\
0x2c& REG & TTLCH6ICR & pulse\_cnt\_ttlch6i & TTLCH6I\\
0x30& REG & INVTTLCHAOCR & pulse\_cnt\_invttlchao & INVTTLCHAO\\
0x34& REG & INVTTLCHAICR & pulse\_cnt\_invttlchai & INVTTLCHAI\\
0x38& REG & INVTTLCHBOCR & pulse\_cnt\_invttlchbo & INVTTLCHBO\\
0x3c& REG & INVTTLCHBICR & pulse\_cnt\_invttlchbi & INVTTLCHBI\\
0x40& REG & INVTTLCHCOCR & pulse\_cnt\_invttlchco & INVTTLCHCO\\
0x44& REG & INVTTLCHCICR & pulse\_cnt\_invttlchci & INVTTLCHCI\\
0x48& REG & INVTTLCHDOCR & pulse\_cnt\_invttlchdo & INVTTLCHDO\\
0x4c& REG & INVTTLCHDICR & pulse\_cnt\_invttlchdi & INVTTLCHDI\\
0x50& REG & REARCH1OCR & pulse\_cnt\_rearch1o & REARCH1O\\
0x54& REG & REARCH1ICR & pulse\_cnt\_rearch1i & REARCH1I\\
0x58& REG & REARCH2OCR & pulse\_cnt\_rearch2o & REARCH2O\\
0x5c& REG & REARCH2ICR & pulse\_cnt\_rearch2i & REARCH2I\\
0x60& REG & REARCH3OCR & pulse\_cnt\_rearch3o & REARCH3O\\
0x64& REG & REARCH3ICR & pulse\_cnt\_rearch3i & REARCH3I\\
0x68& REG & REARCH4OCR & pulse\_cnt\_rearch4o & REARCH4O\\
0x6c& REG & REARCH4ICR & pulse\_cnt\_rearch4i & REARCH4I\\
0x70& REG & REARCH5OCR & pulse\_cnt\_rearch5o & REARCH5O\\
0x74& REG & REARCH5ICR & pulse\_cnt\_rearch5i & REARCH5I\\
0x78& REG & REARCH6OCR & pulse\_cnt\_rearch6o & REARCH6O\\
0x7c& REG & REARCH6ICR & pulse\_cnt\_rearch6i & REARCH6I\\
\hline
\end{tabular}
}
\vspace{11pt}
\subsubsection{TTLCH1OCR -- TTL CH1 output counter register}
\subsubsection{Register description}
\paragraph*{TTLCH1OCR}\vspace{12pt}
\rowcolors{1}{white}{white}
\begin{tabular}{l l }
{\bf HW prefix:} & pulse\_cnt\_ttlch1o\\
{\bf HW address:} & 0x0\\
{\bf SW prefix:} & TTLCH1O\\
{\bf SW offset:} & 0x0\\
\end{tabular}
\vspace{11pt}
\vspace{12pt}
TTL CH1 output counter register
\vspace{12pt}
\noindent
\resizebox{\textwidth}{!}{
\begin{tabular}{>{\centering\arraybackslash}p{1.5cm} >{\centering\arraybackslash}p{1.5cm} >{\centering\arraybackslash}p{1.5cm} >{\centering\arraybackslash}p{1.5cm} >{\centering\arraybackslash}p{1.5cm} >{\centering\arraybackslash}p{1.5cm} >{\centering\arraybackslash}p{1.5cm} >{\centering\arraybackslash}p{1.5cm} }
31 & 30 & 29 & 28 & 27 & 26 & 25 & 24\\
\hline
\multicolumn{8}{|c|}{\cellcolor{gray!25}TTLCH1O[31:24]}\\
\multicolumn{8}{|c|}{\cellcolor{RoyalPurple!25}TTLCH1O[31:24]}\\
\hline
23 & 22 & 21 & 20 & 19 & 18 & 17 & 16\\
\hline
\multicolumn{8}{|c|}{\cellcolor{gray!25}TTLCH1O[23:16]}\\
\multicolumn{8}{|c|}{\cellcolor{RoyalPurple!25}TTLCH1O[23:16]}\\
\hline
15 & 14 & 13 & 12 & 11 & 10 & 9 & 8\\
\hline
\multicolumn{8}{|c|}{\cellcolor{gray!25}TTLCH1O[15:8]}\\
\multicolumn{8}{|c|}{\cellcolor{RoyalPurple!25}TTLCH1O[15:8]}\\
\hline
7 & 6 & 5 & 4 & 3 & 2 & 1 & 0\\
\hline
\multicolumn{8}{|c|}{\cellcolor{gray!25}TTLCH1O[7:0]}\\
\multicolumn{8}{|c|}{\cellcolor{RoyalPurple!25}TTLCH1O[7:0]}\\
\hline
\end{tabular}
}
......@@ -83,32 +87,39 @@ Base address: 0xc00
TTLCH1O
} [\emph{read/write}]: Pulse counter value
\end{small}
\item \begin{small}
\textbf{Unimplemented bits}: write as '0', read undefined
\end{small}
\end{itemize}
\vspace{11pt}
\subsubsection{TTLCH1ICR -- TTL CH1 input counter register}
\paragraph*{TTLCH1ICR}\vspace{12pt}
\rowcolors{1}{white}{white}
\begin{tabular}{l l }
{\bf HW prefix:} & pulse\_cnt\_ttlch1i\\
{\bf HW address:} & 0x1\\
{\bf SW prefix:} & TTLCH1I\\
{\bf SW offset:} & 0x4\\
\end{tabular}
\vspace{11pt}
\vspace{12pt}
TTL CH1 input counter register
\vspace{12pt}
\noindent
\resizebox{\textwidth}{!}{
\begin{tabular}{>{\centering\arraybackslash}p{1.5cm} >{\centering\arraybackslash}p{1.5cm} >{\centering\arraybackslash}p{1.5cm} >{\centering\arraybackslash}p{1.5cm} >{\centering\arraybackslash}p{1.5cm} >{\centering\arraybackslash}p{1.5cm} >{\centering\arraybackslash}p{1.5cm} >{\centering\arraybackslash}p{1.5cm} }
31 & 30 & 29 & 28 & 27 & 26 & 25 & 24\\
\hline
\multicolumn{8}{|c|}{\cellcolor{gray!25}TTLCH1I[31:24]}\\
\multicolumn{8}{|c|}{\cellcolor{RoyalPurple!25}TTLCH1I[31:24]}\\
\hline
23 & 22 & 21 & 20 & 19 & 18 & 17 & 16\\
\hline
\multicolumn{8}{|c|}{\cellcolor{gray!25}TTLCH1I[23:16]}\\
\multicolumn{8}{|c|}{\cellcolor{RoyalPurple!25}TTLCH1I[23:16]}\\
\hline
15 & 14 & 13 & 12 & 11 & 10 & 9 & 8\\
\hline
\multicolumn{8}{|c|}{\cellcolor{gray!25}TTLCH1I[15:8]}\\
\multicolumn{8}{|c|}{\cellcolor{RoyalPurple!25}TTLCH1I[15:8]}\\
\hline
7 & 6 & 5 & 4 & 3 & 2 & 1 & 0\\
\hline
\multicolumn{8}{|c|}{\cellcolor{gray!25}TTLCH1I[7:0]}\\
\multicolumn{8}{|c|}{\cellcolor{RoyalPurple!25}TTLCH1I[7:0]}\\
\hline
\end{tabular}
}
......@@ -119,32 +130,39 @@ TTLCH1O
TTLCH1I
} [\emph{read/write}]: Pulse counter value
\end{small}
\item \begin{small}
\textbf{Unimplemented bits}: write as '0', read undefined
\end{small}
\end{itemize}
\vspace{11pt}
\subsubsection{TTLCH2OCR -- TTL CH2 output counter register}
\paragraph*{TTLCH2OCR}\vspace{12pt}
\rowcolors{1}{white}{white}
\begin{tabular}{l l }
{\bf HW prefix:} & pulse\_cnt\_ttlch2o\\
{\bf HW address:} & 0x2\\
{\bf SW prefix:} & TTLCH2O\\
{\bf SW offset:} & 0x8\\
\end{tabular}
\vspace{11pt}
\vspace{12pt}
TTL CH2 output counter register
\vspace{12pt}
\noindent
\resizebox{\textwidth}{!}{
\begin{tabular}{>{\centering\arraybackslash}p{1.5cm} >{\centering\arraybackslash}p{1.5cm} >{\centering\arraybackslash}p{1.5cm} >{\centering\arraybackslash}p{1.5cm} >{\centering\arraybackslash}p{1.5cm} >{\centering\arraybackslash}p{1.5cm} >{\centering\arraybackslash}p{1.5cm} >{\centering\arraybackslash}p{1.5cm} }
31 & 30 & 29 & 28 & 27 & 26 & 25 & 24\\
\hline
\multicolumn{8}{|c|}{\cellcolor{gray!25}TTLCH2O[31:24]}\\
\multicolumn{8}{|c|}{\cellcolor{RoyalPurple!25}TTLCH2O[31:24]}\\
\hline
23 & 22 & 21 & 20 & 19 & 18 & 17 & 16\\
\hline
\multicolumn{8}{|c|}{\cellcolor{gray!25}TTLCH2O[23:16]}\\
\multicolumn{8}{|c|}{\cellcolor{RoyalPurple!25}TTLCH2O[23:16]}\\
\hline
15 & 14 & 13 & 12 & 11 & 10 & 9 & 8\\
\hline
\multicolumn{8}{|c|}{\cellcolor{gray!25}TTLCH2O[15:8]}\\
\multicolumn{8}{|c|}{\cellcolor{RoyalPurple!25}TTLCH2O[15:8]}\\
\hline
7 & 6 & 5 & 4 & 3 & 2 & 1 & 0\\
\hline
\multicolumn{8}{|c|}{\cellcolor{gray!25}TTLCH2O[7:0]}\\
\multicolumn{8}{|c|}{\cellcolor{RoyalPurple!25}TTLCH2O[7:0]}\\
\hline
\end{tabular}
}
......@@ -155,32 +173,39 @@ TTLCH1I
TTLCH2O
} [\emph{read/write}]: Pulse counter value
\end{small}
\item \begin{small}
\textbf{Unimplemented bits}: write as '0', read undefined
\end{small}
\end{itemize}
\vspace{11pt}
\subsubsection{TTLCH2ICR -- TTL CH2 input counter register}
\paragraph*{TTLCH2ICR}\vspace{12pt}
\rowcolors{1}{white}{white}
\begin{tabular}{l l }
{\bf HW prefix:} & pulse\_cnt\_ttlch2i\\
{\bf HW address:} & 0x3\\
{\bf SW prefix:} & TTLCH2I\\
{\bf SW offset:} & 0xc\\
\end{tabular}
\vspace{11pt}
\vspace{12pt}
TTL CH2 input counter register
\vspace{12pt}
\noindent
\resizebox{\textwidth}{!}{
\begin{tabular}{>{\centering\arraybackslash}p{1.5cm} >{\centering\arraybackslash}p{1.5cm} >{\centering\arraybackslash}p{1.5cm} >{\centering\arraybackslash}p{1.5cm} >{\centering\arraybackslash}p{1.5cm} >{\centering\arraybackslash}p{1.5cm} >{\centering\arraybackslash}p{1.5cm} >{\centering\arraybackslash}p{1.5cm} }
31 & 30 & 29 & 28 & 27 & 26 & 25 & 24\\
\hline
\multicolumn{8}{|c|}{\cellcolor{gray!25}TTLCH2I[31:24]}\\
\multicolumn{8}{|c|}{\cellcolor{RoyalPurple!25}TTLCH2I[31:24]}\\
\hline
23 & 22 & 21 & 20 & 19 & 18 & 17 & 16\\
\hline
\multicolumn{8}{|c|}{\cellcolor{gray!25}TTLCH2I[23:16]}\\
\multicolumn{8}{|c|}{\cellcolor{RoyalPurple!25}TTLCH2I[23:16]}\\
\hline
15 & 14 & 13 & 12 & 11 & 10 & 9 & 8\\
\hline
\multicolumn{8}{|c|}{\cellcolor{gray!25}TTLCH2I[15:8]}\\
\multicolumn{8}{|c|}{\cellcolor{RoyalPurple!25}TTLCH2I[15:8]}\\
\hline
7 & 6 & 5 & 4 & 3 & 2 & 1 & 0\\
\hline
\multicolumn{8}{|c|}{\cellcolor{gray!25}TTLCH2I[7:0]}\\
\multicolumn{8}{|c|}{\cellcolor{RoyalPurple!25}TTLCH2I[7:0]}\\
\hline
\end{tabular}
}
......@@ -191,32 +216,39 @@ TTLCH2O
TTLCH2I
} [\emph{read/write}]: Pulse counter value
\end{small}
\item \begin{small}
\textbf{Unimplemented bits}: write as '0', read undefined
\end{small}
\end{itemize}
\vspace{11pt}
\subsubsection{TTLCH3OCR -- TTL CH3 output counter register}
\paragraph*{TTLCH3OCR}\vspace{12pt}
\rowcolors{1}{white}{white}
\begin{tabular}{l l }
{\bf HW prefix:} & pulse\_cnt\_ttlch3o\\
{\bf HW address:} & 0x4\\
{\bf SW prefix:} & TTLCH3O\\
{\bf SW offset:} & 0x10\\
\end{tabular}
\vspace{11pt}
\vspace{12pt}
TTL CH3 output counter register
\vspace{12pt}
\noindent
\resizebox{\textwidth}{!}{
\begin{tabular}{>{\centering\arraybackslash}p{1.5cm} >{\centering\arraybackslash}p{1.5cm} >{\centering\arraybackslash}p{1.5cm} >{\centering\arraybackslash}p{1.5cm} >{\centering\arraybackslash}p{1.5cm} >{\centering\arraybackslash}p{1.5cm} >{\centering\arraybackslash}p{1.5cm} >{\centering\arraybackslash}p{1.5cm} }
31 & 30 & 29 & 28 & 27 & 26 & 25 & 24\\
\hline
\multicolumn{8}{|c|}{\cellcolor{gray!25}TTLCH3O[31:24]}\\
\multicolumn{8}{|c|}{\cellcolor{RoyalPurple!25}TTLCH3O[31:24]}\\
\hline
23 & 22 & 21 & 20 & 19 & 18 & 17 & 16\\
\hline
\multicolumn{8}{|c|}{\cellcolor{gray!25}TTLCH3O[23:16]}\\
\multicolumn{8}{|c|}{\cellcolor{RoyalPurple!25}TTLCH3O[23:16]}\\
\hline
15 & 14 & 13 & 12 & 11 & 10 & 9 & 8\\
\hline
\multicolumn{8}{|c|}{\cellcolor{gray!25}TTLCH3O[15:8]}\\
\multicolumn{8}{|c|}{\cellcolor{RoyalPurple!25}TTLCH3O[15:8]}\\
\hline
7 & 6 & 5 & 4 & 3 & 2 & 1 & 0\\
\hline
\multicolumn{8}{|c|}{\cellcolor{gray!25}TTLCH3O[7:0]}\\
\multicolumn{8}{|c|}{\cellcolor{RoyalPurple!25}TTLCH3O[7:0]}\\
\hline
\end{tabular}
}
......@@ -227,32 +259,39 @@ TTLCH2I
TTLCH3O
} [\emph{read/write}]: Pulse counter value
\end{small}
\item \begin{small}
\textbf{Unimplemented bits}: write as '0', read undefined
\end{small}
\end{itemize}
\vspace{11pt}
\subsubsection{TTLCH3ICR -- TTL CH3 input counter register}
\paragraph*{TTLCH3ICR}\vspace{12pt}
\rowcolors{1}{white}{white}
\begin{tabular}{l l }
{\bf HW prefix:} & pulse\_cnt\_ttlch3i\\
{\bf HW address:} & 0x5\\
{\bf SW prefix:} & TTLCH3I\\
{\bf SW offset:} & 0x14\\
\end{tabular}
\vspace{11pt}
\vspace{12pt}
TTL CH3 input counter register
\vspace{12pt}
\noindent
\resizebox{\textwidth}{!}{
\begin{tabular}{>{\centering\arraybackslash}p{1.5cm} >{\centering\arraybackslash}p{1.5cm} >{\centering\arraybackslash}p{1.5cm} >{\centering\arraybackslash}p{1.5cm} >{\centering\arraybackslash}p{1.5cm} >{\centering\arraybackslash}p{1.5cm} >{\centering\arraybackslash}p{1.5cm} >{\centering\arraybackslash}p{1.5cm} }
31 & 30 & 29 & 28 & 27 & 26 & 25 & 24\\
\hline
\multicolumn{8}{|c|}{\cellcolor{gray!25}TTLCH3I[31:24]}\\
\multicolumn{8}{|c|}{\cellcolor{RoyalPurple!25}TTLCH3I[31:24]}\\
\hline
23 & 22 & 21 & 20 & 19 & 18 & 17 & 16\\
\hline
\multicolumn{8}{|c|}{\cellcolor{gray!25}TTLCH3I[23:16]}\\
\multicolumn{8}{|c|}{\cellcolor{RoyalPurple!25}TTLCH3I[23:16]}\\
\hline
15 & 14 & 13 & 12 & 11 & 10 & 9 & 8\\
\hline
\multicolumn{8}{|c|}{\cellcolor{gray!25}TTLCH3I[15:8]}\\
\multicolumn{8}{|c|}{\cellcolor{RoyalPurple!25}TTLCH3I[15:8]}\\
\hline
7 & 6 & 5 & 4 & 3 & 2 & 1 & 0\\
\hline
\multicolumn{8}{|c|}{\cellcolor{gray!25}TTLCH3I[7:0]}\\
\multicolumn{8}{|c|}{\cellcolor{RoyalPurple!25}TTLCH3I[7:0]}\\
\hline
\end{tabular}
}
......@@ -263,32 +302,39 @@ TTLCH3O
TTLCH3I
} [\emph{read/write}]: Pulse counter value
\end{small}
\item \begin{small}
\textbf{Unimplemented bits}: write as '0', read undefined
\end{small}
\end{itemize}
\vspace{11pt}
\subsubsection{TTLCH4OCR -- TTL CH4 output counter register}
\paragraph*{TTLCH4OCR}\vspace{12pt}
\rowcolors{1}{white}{white}
\begin{tabular}{l l }
{\bf HW prefix:} & pulse\_cnt\_ttlch4o\\
{\bf HW address:} & 0x6\\
{\bf SW prefix:} & TTLCH4O\\
{\bf SW offset:} & 0x18\\
\end{tabular}
\vspace{11pt}
\vspace{12pt}
TTL CH4 output counter register
\vspace{12pt}
\noindent
\resizebox{\textwidth}{!}{
\begin{tabular}{>{\centering\arraybackslash}p{1.5cm} >{\centering\arraybackslash}p{1.5cm} >{\centering\arraybackslash}p{1.5cm} >{\centering\arraybackslash}p{1.5cm} >{\centering\arraybackslash}p{1.5cm} >{\centering\arraybackslash}p{1.5cm} >{\centering\arraybackslash}p{1.5cm} >{\centering\arraybackslash}p{1.5cm} }
31 & 30 & 29 & 28 & 27 & 26 & 25 & 24\\
\hline
\multicolumn{8}{|c|}{\cellcolor{gray!25}TTLCH4O[31:24]}\\
\multicolumn{8}{|c|}{\cellcolor{RoyalPurple!25}TTLCH4O[31:24]}\\
\hline
23 & 22 & 21 & 20 & 19 & 18 & 17 & 16\\
\hline
\multicolumn{8}{|c|}{\cellcolor{gray!25}TTLCH4O[23:16]}\\
\multicolumn{8}{|c|}{\cellcolor{RoyalPurple!25}TTLCH4O[23:16]}\\
\hline
15 & 14 & 13 & 12 & 11 & 10 & 9 & 8\\
\hline
\multicolumn{8}{|c|}{\cellcolor{gray!25}TTLCH4O[15:8]}\\
\multicolumn{8}{|c|}{\cellcolor{RoyalPurple!25}TTLCH4O[15:8]}\\
\hline
7 & 6 & 5 & 4 & 3 & 2 & 1 & 0\\
\hline
\multicolumn{8}{|c|}{\cellcolor{gray!25}TTLCH4O[7:0]}\\
\multicolumn{8}{|c|}{\cellcolor{RoyalPurple!25}TTLCH4O[7:0]}\\
\hline
\end{tabular}
}
......@@ -299,32 +345,39 @@ TTLCH3I
TTLCH4O
} [\emph{read/write}]: Pulse counter value
\end{small}
\item \begin{small}
\textbf{Unimplemented bits}: write as '0', read undefined
\end{small}
\end{itemize}
\vspace{11pt}
\subsubsection{TTLCH4ICR -- TTL CH4 input counter register}
\paragraph*{TTLCH4ICR}\vspace{12pt}
\rowcolors{1}{white}{white}
\begin{tabular}{l l }
{\bf HW prefix:} & pulse\_cnt\_ttlch4i\\
{\bf HW address:} & 0x7\\
{\bf SW prefix:} & TTLCH4I\\
{\bf SW offset:} & 0x1c\\
\end{tabular}
\vspace{11pt}
\vspace{12pt}
TTL CH4 input counter register
\vspace{12pt}
\noindent
\resizebox{\textwidth}{!}{
\begin{tabular}{>{\centering\arraybackslash}p{1.5cm} >{\centering\arraybackslash}p{1.5cm} >{\centering\arraybackslash}p{1.5cm} >{\centering\arraybackslash}p{1.5cm} >{\centering\arraybackslash}p{1.5cm} >{\centering\arraybackslash}p{1.5cm} >{\centering\arraybackslash}p{1.5cm} >{\centering\arraybackslash}p{1.5cm} }
31 & 30 & 29 & 28 & 27 & 26 & 25 & 24\\
\hline
\multicolumn{8}{|c|}{\cellcolor{gray!25}TTLCH4I[31:24]}\\
\multicolumn{8}{|c|}{\cellcolor{RoyalPurple!25}TTLCH4I[31:24]}\\
\hline
23 & 22 & 21 & 20 & 19 & 18 & 17 & 16\\
\hline
\multicolumn{8}{|c|}{\cellcolor{gray!25}TTLCH4I[23:16]}\\
\multicolumn{8}{|c|}{\cellcolor{RoyalPurple!25}TTLCH4I[23:16]}\\
\hline
15 & 14 & 13 & 12 & 11 & 10 & 9 & 8\\
\hline
\multicolumn{8}{|c|}{\cellcolor{gray!25}TTLCH4I[15:8]}\\
\multicolumn{8}{|c|}{\cellcolor{RoyalPurple!25}TTLCH4I[15:8]}\\
\hline
7 & 6 & 5 & 4 & 3 & 2 & 1 & 0\\
\hline
\multicolumn{8}{|c|}{\cellcolor{gray!25}TTLCH4I[7:0]}\\
\multicolumn{8}{|c|}{\cellcolor{RoyalPurple!25}TTLCH4I[7:0]}\\
\hline
\end{tabular}
}
......@@ -335,32 +388,39 @@ TTLCH4O
TTLCH4I
} [\emph{read/write}]: Pulse counter value
\end{small}
\item \begin{small}
\textbf{Unimplemented bits}: write as '0', read undefined
\end{small}
\end{itemize}
\vspace{11pt}
\subsubsection{TTLCH5OCR -- TTL CH5 output counter register}
\paragraph*{TTLCH5OCR}\vspace{12pt}
\rowcolors{1}{white}{white}
\begin{tabular}{l l }
{\bf HW prefix:} & pulse\_cnt\_ttlch5o\\
{\bf HW address:} & 0x8\\
{\bf SW prefix:} & TTLCH5O\\
{\bf SW offset:} & 0x20\\
\end{tabular}
\vspace{12pt}
TTL CH5 output counter register
\vspace{11pt}
\vspace{12pt}
\noindent
\resizebox{\textwidth}{!}{
\begin{tabular}{>{\centering\arraybackslash}p{1.5cm} >{\centering\arraybackslash}p{1.5cm} >{\centering\arraybackslash}p{1.5cm} >{\centering\arraybackslash}p{1.5cm} >{\centering\arraybackslash}p{1.5cm} >{\centering\arraybackslash}p{1.5cm} >{\centering\arraybackslash}p{1.5cm} >{\centering\arraybackslash}p{1.5cm} }
31 & 30 & 29 & 28 & 27 & 26 & 25 & 24\\
\hline
\multicolumn{8}{|c|}{\cellcolor{gray!25}TTLCH5O[31:24]}\\
\multicolumn{8}{|c|}{\cellcolor{RoyalPurple!25}TTLCH5O[31:24]}\\
\hline
23 & 22 & 21 & 20 & 19 & 18 & 17 & 16\\
\hline
\multicolumn{8}{|c|}{\cellcolor{gray!25}TTLCH5O[23:16]}\\
\multicolumn{8}{|c|}{\cellcolor{RoyalPurple!25}TTLCH5O[23:16]}\\
\hline
15 & 14 & 13 & 12 & 11 & 10 & 9 & 8\\
\hline
\multicolumn{8}{|c|}{\cellcolor{gray!25}TTLCH5O[15:8]}\\
\multicolumn{8}{|c|}{\cellcolor{RoyalPurple!25}TTLCH5O[15:8]}\\
\hline
7 & 6 & 5 & 4 & 3 & 2 & 1 & 0\\
\hline
\multicolumn{8}{|c|}{\cellcolor{gray!25}TTLCH5O[7:0]}\\
\multicolumn{8}{|c|}{\cellcolor{RoyalPurple!25}TTLCH5O[7:0]}\\
\hline
\end{tabular}
}
......@@ -371,32 +431,39 @@ TTLCH4I
TTLCH5O
} [\emph{read/write}]: Pulse counter value
\end{small}
\item \begin{small}
\textbf{Unimplemented bits}: write as '0', read undefined
\end{small}
\end{itemize}
\vspace{11pt}
\subsubsection{TTLCH5ICR -- TTL CH5 input counter register}
\paragraph*{TTLCH5ICR}\vspace{12pt}
\rowcolors{1}{white}{white}
\begin{tabular}{l l }
{\bf HW prefix:} & pulse\_cnt\_ttlch5i\\
{\bf HW address:} & 0x9\\
{\bf SW prefix:} & TTLCH5I\\
{\bf SW offset:} & 0x24\\
\end{tabular}
\vspace{12pt}
TTL CH5 input counter register
\vspace{11pt}
\vspace{12pt}
\noindent
\resizebox{\textwidth}{!}{
\begin{tabular}{>{\centering\arraybackslash}p{1.5cm} >{\centering\arraybackslash}p{1.5cm} >{\centering\arraybackslash}p{1.5cm} >{\centering\arraybackslash}p{1.5cm} >{\centering\arraybackslash}p{1.5cm} >{\centering\arraybackslash}p{1.5cm} >{\centering\arraybackslash}p{1.5cm} >{\centering\arraybackslash}p{1.5cm} }
31 & 30 & 29 & 28 & 27 & 26 & 25 & 24\\
\hline
\multicolumn{8}{|c|}{\cellcolor{gray!25}TTLCH5I[31:24]}\\
\multicolumn{8}{|c|}{\cellcolor{RoyalPurple!25}TTLCH5I[31:24]}\\
\hline
23 & 22 & 21 & 20 & 19 & 18 & 17 & 16\\
\hline
\multicolumn{8}{|c|}{\cellcolor{gray!25}TTLCH5I[23:16]}\\
\multicolumn{8}{|c|}{\cellcolor{RoyalPurple!25}TTLCH5I[23:16]}\\
\hline
15 & 14 & 13 & 12 & 11 & 10 & 9 & 8\\
\hline
\multicolumn{8}{|c|}{\cellcolor{gray!25}TTLCH5I[15:8]}\\
\multicolumn{8}{|c|}{\cellcolor{RoyalPurple!25}TTLCH5I[15:8]}\\
\hline
7 & 6 & 5 & 4 & 3 & 2 & 1 & 0\\
\hline
\multicolumn{8}{|c|}{\cellcolor{gray!25}TTLCH5I[7:0]}\\
\multicolumn{8}{|c|}{\cellcolor{RoyalPurple!25}TTLCH5I[7:0]}\\
\hline
\end{tabular}
}
......@@ -407,32 +474,39 @@ TTLCH5O
TTLCH5I
} [\emph{read/write}]: Pulse counter value
\end{small}
\item \begin{small}
\textbf{Unimplemented bits}: write as '0', read undefined
\end{small}
\end{itemize}
\vspace{11pt}
\subsubsection{TTLCH6OCR -- TTL CH6 output counter register}
\paragraph*{TTLCH6OCR}\vspace{12pt}
\rowcolors{1}{white}{white}
\begin{tabular}{l l }
{\bf HW prefix:} & pulse\_cnt\_ttlch6o\\
{\bf HW address:} & 0xa\\
{\bf SW prefix:} & TTLCH6O\\
{\bf SW offset:} & 0x28\\
\end{tabular}
\vspace{12pt}
TTL CH6 output counter register
\vspace{11pt}
\vspace{12pt}
\noindent
\resizebox{\textwidth}{!}{
\begin{tabular}{>{\centering\arraybackslash}p{1.5cm} >{\centering\arraybackslash}p{1.5cm} >{\centering\arraybackslash}p{1.5cm} >{\centering\arraybackslash}p{1.5cm} >{\centering\arraybackslash}p{1.5cm} >{\centering\arraybackslash}p{1.5cm} >{\centering\arraybackslash}p{1.5cm} >{\centering\arraybackslash}p{1.5cm} }
31 & 30 & 29 & 28 & 27 & 26 & 25 & 24\\
\hline
\multicolumn{8}{|c|}{\cellcolor{gray!25}TTLCH6O[31:24]}\\
\multicolumn{8}{|c|}{\cellcolor{RoyalPurple!25}TTLCH6O[31:24]}\\
\hline
23 & 22 & 21 & 20 & 19 & 18 & 17 & 16\\
\hline
\multicolumn{8}{|c|}{\cellcolor{gray!25}TTLCH6O[23:16]}\\
\multicolumn{8}{|c|}{\cellcolor{RoyalPurple!25}TTLCH6O[23:16]}\\
\hline
15 & 14 & 13 & 12 & 11 & 10 & 9 & 8\\
\hline
\multicolumn{8}{|c|}{\cellcolor{gray!25}TTLCH6O[15:8]}\\
\multicolumn{8}{|c|}{\cellcolor{RoyalPurple!25}TTLCH6O[15:8]}\\
\hline
7 & 6 & 5 & 4 & 3 & 2 & 1 & 0\\
\hline
\multicolumn{8}{|c|}{\cellcolor{gray!25}TTLCH6O[7:0]}\\
\multicolumn{8}{|c|}{\cellcolor{RoyalPurple!25}TTLCH6O[7:0]}\\
\hline
\end{tabular}
}
......@@ -443,32 +517,39 @@ TTLCH5I
TTLCH6O
} [\emph{read/write}]: Pulse counter value
\end{small}
\item \begin{small}
\textbf{Unimplemented bits}: write as '0', read undefined
\end{small}
\end{itemize}
\vspace{11pt}
\subsubsection{TTLCH6ICR -- TTL CH6 input counter register}
\paragraph*{TTLCH6ICR}\vspace{12pt}
\rowcolors{1}{white}{white}
\begin{tabular}{l l }
{\bf HW prefix:} & pulse\_cnt\_ttlch6i\\
{\bf HW address:} & 0xb\\
{\bf SW prefix:} & TTLCH6I\\
{\bf SW offset:} & 0x2c\\
\end{tabular}
\vspace{12pt}
TTL CH6 input counter register
\vspace{11pt}
\vspace{12pt}
\noindent
\resizebox{\textwidth}{!}{
\begin{tabular}{>{\centering\arraybackslash}p{1.5cm} >{\centering\arraybackslash}p{1.5cm} >{\centering\arraybackslash}p{1.5cm} >{\centering\arraybackslash}p{1.5cm} >{\centering\arraybackslash}p{1.5cm} >{\centering\arraybackslash}p{1.5cm} >{\centering\arraybackslash}p{1.5cm} >{\centering\arraybackslash}p{1.5cm} }
31 & 30 & 29 & 28 & 27 & 26 & 25 & 24\\
\hline
\multicolumn{8}{|c|}{\cellcolor{gray!25}TTLCH6I[31:24]}\\
\multicolumn{8}{|c|}{\cellcolor{RoyalPurple!25}TTLCH6I[31:24]}\\
\hline
23 & 22 & 21 & 20 & 19 & 18 & 17 & 16\\
\hline
\multicolumn{8}{|c|}{\cellcolor{gray!25}TTLCH6I[23:16]}\\
\multicolumn{8}{|c|}{\cellcolor{RoyalPurple!25}TTLCH6I[23:16]}\\
\hline
15 & 14 & 13 & 12 & 11 & 10 & 9 & 8\\
\hline
\multicolumn{8}{|c|}{\cellcolor{gray!25}TTLCH6I[15:8]}\\
\multicolumn{8}{|c|}{\cellcolor{RoyalPurple!25}TTLCH6I[15:8]}\\
\hline
7 & 6 & 5 & 4 & 3 & 2 & 1 & 0\\
\hline
\multicolumn{8}{|c|}{\cellcolor{gray!25}TTLCH6I[7:0]}\\
\multicolumn{8}{|c|}{\cellcolor{RoyalPurple!25}TTLCH6I[7:0]}\\
\hline
\end{tabular}
}
......@@ -479,32 +560,39 @@ TTLCH6O
TTLCH6I
} [\emph{read/write}]: Pulse counter value
\end{small}
\item \begin{small}
\textbf{Unimplemented bits}: write as '0', read undefined
\end{small}
\end{itemize}
\vspace{11pt}
\subsubsection{INVTTLCHAOCR -- INV-TTL CHA output counter register}
\paragraph*{INVTTLCHAOCR}\vspace{12pt}
\rowcolors{1}{white}{white}
\begin{tabular}{l l }
{\bf HW prefix:} & pulse\_cnt\_invttlchao\\
{\bf HW address:} & 0xc\\
{\bf SW prefix:} & INVTTLCHAO\\
{\bf SW offset:} & 0x30\\
\end{tabular}
\vspace{12pt}
INV-TTL CHA output counter register
\vspace{11pt}
\vspace{12pt}
\noindent
\resizebox{\textwidth}{!}{
\begin{tabular}{>{\centering\arraybackslash}p{1.5cm} >{\centering\arraybackslash}p{1.5cm} >{\centering\arraybackslash}p{1.5cm} >{\centering\arraybackslash}p{1.5cm} >{\centering\arraybackslash}p{1.5cm} >{\centering\arraybackslash}p{1.5cm} >{\centering\arraybackslash}p{1.5cm} >{\centering\arraybackslash}p{1.5cm} }
31 & 30 & 29 & 28 & 27 & 26 & 25 & 24\\
\hline
\multicolumn{8}{|c|}{\cellcolor{gray!25}INVTTLCHAO[31:24]}\\
\multicolumn{8}{|c|}{\cellcolor{RoyalPurple!25}INVTTLCHAO[31:24]}\\
\hline
23 & 22 & 21 & 20 & 19 & 18 & 17 & 16\\
\hline
\multicolumn{8}{|c|}{\cellcolor{gray!25}INVTTLCHAO[23:16]}\\
\multicolumn{8}{|c|}{\cellcolor{RoyalPurple!25}INVTTLCHAO[23:16]}\\
\hline
15 & 14 & 13 & 12 & 11 & 10 & 9 & 8\\
\hline
\multicolumn{8}{|c|}{\cellcolor{gray!25}INVTTLCHAO[15:8]}\\
\multicolumn{8}{|c|}{\cellcolor{RoyalPurple!25}INVTTLCHAO[15:8]}\\
\hline
7 & 6 & 5 & 4 & 3 & 2 & 1 & 0\\
\hline
\multicolumn{8}{|c|}{\cellcolor{gray!25}INVTTLCHAO[7:0]}\\
\multicolumn{8}{|c|}{\cellcolor{RoyalPurple!25}INVTTLCHAO[7:0]}\\
\hline
\end{tabular}
}
......@@ -515,32 +603,39 @@ TTLCH6I
INVTTLCHAO
} [\emph{read/write}]: Pulse counter value
\end{small}
\item \begin{small}
\textbf{Unimplemented bits}: write as '0', read undefined
\end{small}
\end{itemize}
\vspace{11pt}
\subsubsection{INVTTLCHAICR -- INV-TTL CHA input counter register}
\paragraph*{INVTTLCHAICR}\vspace{12pt}
\rowcolors{1}{white}{white}
\begin{tabular}{l l }
{\bf HW prefix:} & pulse\_cnt\_invttlchai\\
{\bf HW address:} & 0xd\\
{\bf SW prefix:} & INVTTLCHAI\\
{\bf SW offset:} & 0x34\\
\end{tabular}
\vspace{12pt}
INV-TTL CHA input counter register
\vspace{11pt}
\vspace{12pt}
\noindent
\resizebox{\textwidth}{!}{
\begin{tabular}{>{\centering\arraybackslash}p{1.5cm} >{\centering\arraybackslash}p{1.5cm} >{\centering\arraybackslash}p{1.5cm} >{\centering\arraybackslash}p{1.5cm} >{\centering\arraybackslash}p{1.5cm} >{\centering\arraybackslash}p{1.5cm} >{\centering\arraybackslash}p{1.5cm} >{\centering\arraybackslash}p{1.5cm} }
31 & 30 & 29 & 28 & 27 & 26 & 25 & 24\\
\hline
\multicolumn{8}{|c|}{\cellcolor{gray!25}INVTTLCHAI[31:24]}\\
\multicolumn{8}{|c|}{\cellcolor{RoyalPurple!25}INVTTLCHAI[31:24]}\\
\hline
23 & 22 & 21 & 20 & 19 & 18 & 17 & 16\\
\hline
\multicolumn{8}{|c|}{\cellcolor{gray!25}INVTTLCHAI[23:16]}\\
\multicolumn{8}{|c|}{\cellcolor{RoyalPurple!25}INVTTLCHAI[23:16]}\\
\hline
15 & 14 & 13 & 12 & 11 & 10 & 9 & 8\\
\hline
\multicolumn{8}{|c|}{\cellcolor{gray!25}INVTTLCHAI[15:8]}\\
\multicolumn{8}{|c|}{\cellcolor{RoyalPurple!25}INVTTLCHAI[15:8]}\\
\hline
7 & 6 & 5 & 4 & 3 & 2 & 1 & 0\\
\hline
\multicolumn{8}{|c|}{\cellcolor{gray!25}INVTTLCHAI[7:0]}\\
\multicolumn{8}{|c|}{\cellcolor{RoyalPurple!25}INVTTLCHAI[7:0]}\\
\hline
\end{tabular}
}
......@@ -551,32 +646,39 @@ INVTTLCHAO
INVTTLCHAI
} [\emph{read/write}]: Pulse counter value
\end{small}
\item \begin{small}
\textbf{Unimplemented bits}: write as '0', read undefined
\end{small}
\end{itemize}
\vspace{11pt}
\subsubsection{INVTTLCHBOCR -- INV-TTL CHB output counter register}
\paragraph*{INVTTLCHBOCR}\vspace{12pt}
\rowcolors{1}{white}{white}
\begin{tabular}{l l }
{\bf HW prefix:} & pulse\_cnt\_invttlchbo\\
{\bf HW address:} & 0xe\\
{\bf SW prefix:} & INVTTLCHBO\\
{\bf SW offset:} & 0x38\\
\end{tabular}
\vspace{12pt}
INV-TTL CHB output counter register
\vspace{11pt}
\vspace{12pt}
\noindent
\resizebox{\textwidth}{!}{
\begin{tabular}{>{\centering\arraybackslash}p{1.5cm} >{\centering\arraybackslash}p{1.5cm} >{\centering\arraybackslash}p{1.5cm} >{\centering\arraybackslash}p{1.5cm} >{\centering\arraybackslash}p{1.5cm} >{\centering\arraybackslash}p{1.5cm} >{\centering\arraybackslash}p{1.5cm} >{\centering\arraybackslash}p{1.5cm} }
31 & 30 & 29 & 28 & 27 & 26 & 25 & 24\\
\hline
\multicolumn{8}{|c|}{\cellcolor{gray!25}INVTTLCHBO[31:24]}\\
\multicolumn{8}{|c|}{\cellcolor{RoyalPurple!25}INVTTLCHBO[31:24]}\\
\hline
23 & 22 & 21 & 20 & 19 & 18 & 17 & 16\\
\hline
\multicolumn{8}{|c|}{\cellcolor{gray!25}INVTTLCHBO[23:16]}\\
\multicolumn{8}{|c|}{\cellcolor{RoyalPurple!25}INVTTLCHBO[23:16]}\\
\hline
15 & 14 & 13 & 12 & 11 & 10 & 9 & 8\\
\hline
\multicolumn{8}{|c|}{\cellcolor{gray!25}INVTTLCHBO[15:8]}\\
\multicolumn{8}{|c|}{\cellcolor{RoyalPurple!25}INVTTLCHBO[15:8]}\\
\hline
7 & 6 & 5 & 4 & 3 & 2 & 1 & 0\\
\hline
\multicolumn{8}{|c|}{\cellcolor{gray!25}INVTTLCHBO[7:0]}\\
\multicolumn{8}{|c|}{\cellcolor{RoyalPurple!25}INVTTLCHBO[7:0]}\\
\hline
\end{tabular}
}
......@@ -587,32 +689,39 @@ INVTTLCHAI
INVTTLCHBO
} [\emph{read/write}]: Pulse counter value
\end{small}
\item \begin{small}
\textbf{Unimplemented bits}: write as '0', read undefined
\end{small}
\end{itemize}
\vspace{11pt}
\subsubsection{INVTTLCHBICR -- INV-TTL CHB input counter register}
\paragraph*{INVTTLCHBICR}\vspace{12pt}
\rowcolors{1}{white}{white}
\begin{tabular}{l l }
{\bf HW prefix:} & pulse\_cnt\_invttlchbi\\
{\bf HW address:} & 0xf\\
{\bf SW prefix:} & INVTTLCHBI\\
{\bf SW offset:} & 0x3c\\
\end{tabular}
\vspace{12pt}
INV-TTL CHB input counter register
\vspace{11pt}
\vspace{12pt}
\noindent
\resizebox{\textwidth}{!}{
\begin{tabular}{>{\centering\arraybackslash}p{1.5cm} >{\centering\arraybackslash}p{1.5cm} >{\centering\arraybackslash}p{1.5cm} >{\centering\arraybackslash}p{1.5cm} >{\centering\arraybackslash}p{1.5cm} >{\centering\arraybackslash}p{1.5cm} >{\centering\arraybackslash}p{1.5cm} >{\centering\arraybackslash}p{1.5cm} }
31 & 30 & 29 & 28 & 27 & 26 & 25 & 24\\
\hline
\multicolumn{8}{|c|}{\cellcolor{gray!25}INVTTLCHBI[31:24]}\\
\multicolumn{8}{|c|}{\cellcolor{RoyalPurple!25}INVTTLCHBI[31:24]}\\
\hline
23 & 22 & 21 & 20 & 19 & 18 & 17 & 16\\
\hline
\multicolumn{8}{|c|}{\cellcolor{gray!25}INVTTLCHBI[23:16]}\\
\multicolumn{8}{|c|}{\cellcolor{RoyalPurple!25}INVTTLCHBI[23:16]}\\
\hline
15 & 14 & 13 & 12 & 11 & 10 & 9 & 8\\
\hline
\multicolumn{8}{|c|}{\cellcolor{gray!25}INVTTLCHBI[15:8]}\\
\multicolumn{8}{|c|}{\cellcolor{RoyalPurple!25}INVTTLCHBI[15:8]}\\
\hline
7 & 6 & 5 & 4 & 3 & 2 & 1 & 0\\
\hline
\multicolumn{8}{|c|}{\cellcolor{gray!25}INVTTLCHBI[7:0]}\\
\multicolumn{8}{|c|}{\cellcolor{RoyalPurple!25}INVTTLCHBI[7:0]}\\
\hline
\end{tabular}
}
......@@ -623,32 +732,39 @@ INVTTLCHBO
INVTTLCHBI
} [\emph{read/write}]: Pulse counter value
\end{small}
\item \begin{small}
\textbf{Unimplemented bits}: write as '0', read undefined
\end{small}
\end{itemize}
\vspace{11pt}
\subsubsection{INVTTLCHCOCR -- INV-TTL CHC output counter register}
\paragraph*{INVTTLCHCOCR}\vspace{12pt}
\rowcolors{1}{white}{white}
\begin{tabular}{l l }
{\bf HW prefix:} & pulse\_cnt\_invttlchco\\
{\bf HW address:} & 0x10\\
{\bf SW prefix:} & INVTTLCHCO\\
{\bf SW offset:} & 0x40\\
\end{tabular}
\vspace{11pt}
\vspace{12pt}
INV-TTL CHC output counter register
\vspace{12pt}
\noindent
\resizebox{\textwidth}{!}{
\begin{tabular}{>{\centering\arraybackslash}p{1.5cm} >{\centering\arraybackslash}p{1.5cm} >{\centering\arraybackslash}p{1.5cm} >{\centering\arraybackslash}p{1.5cm} >{\centering\arraybackslash}p{1.5cm} >{\centering\arraybackslash}p{1.5cm} >{\centering\arraybackslash}p{1.5cm} >{\centering\arraybackslash}p{1.5cm} }
31 & 30 & 29 & 28 & 27 & 26 & 25 & 24\\
\hline
\multicolumn{8}{|c|}{\cellcolor{gray!25}INVTTLCHCO[31:24]}\\
\multicolumn{8}{|c|}{\cellcolor{RoyalPurple!25}INVTTLCHCO[31:24]}\\
\hline
23 & 22 & 21 & 20 & 19 & 18 & 17 & 16\\
\hline
\multicolumn{8}{|c|}{\cellcolor{gray!25}INVTTLCHCO[23:16]}\\
\multicolumn{8}{|c|}{\cellcolor{RoyalPurple!25}INVTTLCHCO[23:16]}\\
\hline
15 & 14 & 13 & 12 & 11 & 10 & 9 & 8\\
\hline
\multicolumn{8}{|c|}{\cellcolor{gray!25}INVTTLCHCO[15:8]}\\
\multicolumn{8}{|c|}{\cellcolor{RoyalPurple!25}INVTTLCHCO[15:8]}\\
\hline
7 & 6 & 5 & 4 & 3 & 2 & 1 & 0\\
\hline
\multicolumn{8}{|c|}{\cellcolor{gray!25}INVTTLCHCO[7:0]}\\
\multicolumn{8}{|c|}{\cellcolor{RoyalPurple!25}INVTTLCHCO[7:0]}\\
\hline
\end{tabular}
}
......@@ -659,32 +775,39 @@ INVTTLCHBI
INVTTLCHCO
} [\emph{read/write}]: Pulse counter value
\end{small}
\item \begin{small}
\textbf{Unimplemented bits}: write as '0', read undefined
\end{small}
\end{itemize}
\vspace{11pt}
\subsubsection{INVTTLCHCICR -- INV-TTL CHC input counter register}
\paragraph*{INVTTLCHCICR}\vspace{12pt}
\rowcolors{1}{white}{white}
\begin{tabular}{l l }
{\bf HW prefix:} & pulse\_cnt\_invttlchci\\
{\bf HW address:} & 0x11\\
{\bf SW prefix:} & INVTTLCHCI\\
{\bf SW offset:} & 0x44\\
\end{tabular}
\vspace{11pt}
\vspace{12pt}
INV-TTL CHC input counter register
\vspace{12pt}
\noindent
\resizebox{\textwidth}{!}{
\begin{tabular}{>{\centering\arraybackslash}p{1.5cm} >{\centering\arraybackslash}p{1.5cm} >{\centering\arraybackslash}p{1.5cm} >{\centering\arraybackslash}p{1.5cm} >{\centering\arraybackslash}p{1.5cm} >{\centering\arraybackslash}p{1.5cm} >{\centering\arraybackslash}p{1.5cm} >{\centering\arraybackslash}p{1.5cm} }
31 & 30 & 29 & 28 & 27 & 26 & 25 & 24\\
\hline
\multicolumn{8}{|c|}{\cellcolor{gray!25}INVTTLCHCI[31:24]}\\
\multicolumn{8}{|c|}{\cellcolor{RoyalPurple!25}INVTTLCHCI[31:24]}\\
\hline
23 & 22 & 21 & 20 & 19 & 18 & 17 & 16\\
\hline
\multicolumn{8}{|c|}{\cellcolor{gray!25}INVTTLCHCI[23:16]}\\
\multicolumn{8}{|c|}{\cellcolor{RoyalPurple!25}INVTTLCHCI[23:16]}\\
\hline
15 & 14 & 13 & 12 & 11 & 10 & 9 & 8\\
\hline
\multicolumn{8}{|c|}{\cellcolor{gray!25}INVTTLCHCI[15:8]}\\
\multicolumn{8}{|c|}{\cellcolor{RoyalPurple!25}INVTTLCHCI[15:8]}\\
\hline
7 & 6 & 5 & 4 & 3 & 2 & 1 & 0\\
\hline
\multicolumn{8}{|c|}{\cellcolor{gray!25}INVTTLCHCI[7:0]}\\
\multicolumn{8}{|c|}{\cellcolor{RoyalPurple!25}INVTTLCHCI[7:0]}\\
\hline
\end{tabular}
}
......@@ -695,32 +818,39 @@ INVTTLCHCO
INVTTLCHCI
} [\emph{read/write}]: Pulse counter value
\end{small}
\item \begin{small}
\textbf{Unimplemented bits}: write as '0', read undefined
\end{small}
\end{itemize}
\vspace{11pt}
\subsubsection{INVTTLCHDOCR -- INV-TTL CHD output counter register}
\paragraph*{INVTTLCHDOCR}\vspace{12pt}
\rowcolors{1}{white}{white}
\begin{tabular}{l l }
{\bf HW prefix:} & pulse\_cnt\_invttlchdo\\
{\bf HW address:} & 0x12\\
{\bf SW prefix:} & INVTTLCHDO\\
{\bf SW offset:} & 0x48\\
\end{tabular}
\vspace{11pt}
\vspace{12pt}
INV-TTL CHD output counter register
\vspace{12pt}
\noindent
\resizebox{\textwidth}{!}{
\begin{tabular}{>{\centering\arraybackslash}p{1.5cm} >{\centering\arraybackslash}p{1.5cm} >{\centering\arraybackslash}p{1.5cm} >{\centering\arraybackslash}p{1.5cm} >{\centering\arraybackslash}p{1.5cm} >{\centering\arraybackslash}p{1.5cm} >{\centering\arraybackslash}p{1.5cm} >{\centering\arraybackslash}p{1.5cm} }
31 & 30 & 29 & 28 & 27 & 26 & 25 & 24\\
\hline
\multicolumn{8}{|c|}{\cellcolor{gray!25}INVTTLCHDO[31:24]}\\
\multicolumn{8}{|c|}{\cellcolor{RoyalPurple!25}INVTTLCHDO[31:24]}\\
\hline
23 & 22 & 21 & 20 & 19 & 18 & 17 & 16\\
\hline
\multicolumn{8}{|c|}{\cellcolor{gray!25}INVTTLCHDO[23:16]}\\
\multicolumn{8}{|c|}{\cellcolor{RoyalPurple!25}INVTTLCHDO[23:16]}\\
\hline
15 & 14 & 13 & 12 & 11 & 10 & 9 & 8\\
\hline
\multicolumn{8}{|c|}{\cellcolor{gray!25}INVTTLCHDO[15:8]}\\
\multicolumn{8}{|c|}{\cellcolor{RoyalPurple!25}INVTTLCHDO[15:8]}\\
\hline
7 & 6 & 5 & 4 & 3 & 2 & 1 & 0\\
\hline
\multicolumn{8}{|c|}{\cellcolor{gray!25}INVTTLCHDO[7:0]}\\
\multicolumn{8}{|c|}{\cellcolor{RoyalPurple!25}INVTTLCHDO[7:0]}\\
\hline
\end{tabular}
}
......@@ -731,32 +861,39 @@ INVTTLCHCI
INVTTLCHDO
} [\emph{read/write}]: Pulse counter value
\end{small}
\item \begin{small}
\textbf{Unimplemented bits}: write as '0', read undefined
\end{small}
\end{itemize}
\vspace{11pt}
\subsubsection{INVTTLCHDICR -- INV-TTL CHD input counter register}
\paragraph*{INVTTLCHDICR}\vspace{12pt}
\rowcolors{1}{white}{white}
\begin{tabular}{l l }
{\bf HW prefix:} & pulse\_cnt\_invttlchdi\\
{\bf HW address:} & 0x13\\
{\bf SW prefix:} & INVTTLCHDI\\
{\bf SW offset:} & 0x4c\\
\end{tabular}
\vspace{11pt}
\vspace{12pt}
INV-TTL CHD input counter register
\vspace{12pt}
\noindent
\resizebox{\textwidth}{!}{
\begin{tabular}{>{\centering\arraybackslash}p{1.5cm} >{\centering\arraybackslash}p{1.5cm} >{\centering\arraybackslash}p{1.5cm} >{\centering\arraybackslash}p{1.5cm} >{\centering\arraybackslash}p{1.5cm} >{\centering\arraybackslash}p{1.5cm} >{\centering\arraybackslash}p{1.5cm} >{\centering\arraybackslash}p{1.5cm} }
31 & 30 & 29 & 28 & 27 & 26 & 25 & 24\\
\hline
\multicolumn{8}{|c|}{\cellcolor{gray!25}INVTTLCHDI[31:24]}\\
\multicolumn{8}{|c|}{\cellcolor{RoyalPurple!25}INVTTLCHDI[31:24]}\\
\hline
23 & 22 & 21 & 20 & 19 & 18 & 17 & 16\\
\hline
\multicolumn{8}{|c|}{\cellcolor{gray!25}INVTTLCHDI[23:16]}\\
\multicolumn{8}{|c|}{\cellcolor{RoyalPurple!25}INVTTLCHDI[23:16]}\\
\hline
15 & 14 & 13 & 12 & 11 & 10 & 9 & 8\\
\hline
\multicolumn{8}{|c|}{\cellcolor{gray!25}INVTTLCHDI[15:8]}\\
\multicolumn{8}{|c|}{\cellcolor{RoyalPurple!25}INVTTLCHDI[15:8]}\\
\hline
7 & 6 & 5 & 4 & 3 & 2 & 1 & 0\\
\hline
\multicolumn{8}{|c|}{\cellcolor{gray!25}INVTTLCHDI[7:0]}\\
\multicolumn{8}{|c|}{\cellcolor{RoyalPurple!25}INVTTLCHDI[7:0]}\\
\hline
\end{tabular}
}
......@@ -767,32 +904,39 @@ INVTTLCHDO
INVTTLCHDI
} [\emph{read/write}]: Pulse counter value
\end{small}
\item \begin{small}
\textbf{Unimplemented bits}: write as '0', read undefined
\end{small}
\end{itemize}
\vspace{11pt}
\subsubsection{REARCH1OCR -- Rear CH1 output counter register}
\paragraph*{REARCH1OCR}\vspace{12pt}
\rowcolors{1}{white}{white}
\begin{tabular}{l l }
{\bf HW prefix:} & pulse\_cnt\_rearch1o\\
{\bf HW address:} & 0x14\\
{\bf SW prefix:} & REARCH1O\\
{\bf SW offset:} & 0x50\\
\end{tabular}
\vspace{11pt}
\vspace{12pt}
Rear CH1 output counter register
\vspace{12pt}
\noindent
\resizebox{\textwidth}{!}{
\begin{tabular}{>{\centering\arraybackslash}p{1.5cm} >{\centering\arraybackslash}p{1.5cm} >{\centering\arraybackslash}p{1.5cm} >{\centering\arraybackslash}p{1.5cm} >{\centering\arraybackslash}p{1.5cm} >{\centering\arraybackslash}p{1.5cm} >{\centering\arraybackslash}p{1.5cm} >{\centering\arraybackslash}p{1.5cm} }
31 & 30 & 29 & 28 & 27 & 26 & 25 & 24\\
\hline
\multicolumn{8}{|c|}{\cellcolor{gray!25}REARCH1O[31:24]}\\
\multicolumn{8}{|c|}{\cellcolor{RoyalPurple!25}REARCH1O[31:24]}\\
\hline
23 & 22 & 21 & 20 & 19 & 18 & 17 & 16\\
\hline
\multicolumn{8}{|c|}{\cellcolor{gray!25}REARCH1O[23:16]}\\
\multicolumn{8}{|c|}{\cellcolor{RoyalPurple!25}REARCH1O[23:16]}\\
\hline
15 & 14 & 13 & 12 & 11 & 10 & 9 & 8\\
\hline
\multicolumn{8}{|c|}{\cellcolor{gray!25}REARCH1O[15:8]}\\
\multicolumn{8}{|c|}{\cellcolor{RoyalPurple!25}REARCH1O[15:8]}\\
\hline
7 & 6 & 5 & 4 & 3 & 2 & 1 & 0\\
\hline
\multicolumn{8}{|c|}{\cellcolor{gray!25}REARCH1O[7:0]}\\
\multicolumn{8}{|c|}{\cellcolor{RoyalPurple!25}REARCH1O[7:0]}\\
\hline
\end{tabular}
}
......@@ -803,32 +947,39 @@ INVTTLCHDI
REARCH1O
} [\emph{read/write}]: Pulse counter value
\end{small}
\item \begin{small}
\textbf{Unimplemented bits}: write as '0', read undefined
\end{small}
\end{itemize}
\vspace{11pt}
\subsubsection{REARCH1ICR -- Rear CH1 input counter register}
\paragraph*{REARCH1ICR}\vspace{12pt}
\rowcolors{1}{white}{white}
\begin{tabular}{l l }
{\bf HW prefix:} & pulse\_cnt\_rearch1i\\
{\bf HW address:} & 0x15\\
{\bf SW prefix:} & REARCH1I\\
{\bf SW offset:} & 0x54\\
\end{tabular}
\vspace{11pt}
\vspace{12pt}
Rear CH1 input counter register
\vspace{12pt}
\noindent
\resizebox{\textwidth}{!}{
\begin{tabular}{>{\centering\arraybackslash}p{1.5cm} >{\centering\arraybackslash}p{1.5cm} >{\centering\arraybackslash}p{1.5cm} >{\centering\arraybackslash}p{1.5cm} >{\centering\arraybackslash}p{1.5cm} >{\centering\arraybackslash}p{1.5cm} >{\centering\arraybackslash}p{1.5cm} >{\centering\arraybackslash}p{1.5cm} }
31 & 30 & 29 & 28 & 27 & 26 & 25 & 24\\
\hline
\multicolumn{8}{|c|}{\cellcolor{gray!25}REARCH1I[31:24]}\\
\multicolumn{8}{|c|}{\cellcolor{RoyalPurple!25}REARCH1I[31:24]}\\
\hline
23 & 22 & 21 & 20 & 19 & 18 & 17 & 16\\
\hline
\multicolumn{8}{|c|}{\cellcolor{gray!25}REARCH1I[23:16]}\\
\multicolumn{8}{|c|}{\cellcolor{RoyalPurple!25}REARCH1I[23:16]}\\
\hline
15 & 14 & 13 & 12 & 11 & 10 & 9 & 8\\
\hline
\multicolumn{8}{|c|}{\cellcolor{gray!25}REARCH1I[15:8]}\\
\multicolumn{8}{|c|}{\cellcolor{RoyalPurple!25}REARCH1I[15:8]}\\
\hline
7 & 6 & 5 & 4 & 3 & 2 & 1 & 0\\
\hline
\multicolumn{8}{|c|}{\cellcolor{gray!25}REARCH1I[7:0]}\\
\multicolumn{8}{|c|}{\cellcolor{RoyalPurple!25}REARCH1I[7:0]}\\
\hline
\end{tabular}
}
......@@ -839,32 +990,39 @@ REARCH1O
REARCH1I
} [\emph{read/write}]: Pulse counter value
\end{small}
\item \begin{small}
\textbf{Unimplemented bits}: write as '0', read undefined
\end{small}
\end{itemize}
\vspace{11pt}
\subsubsection{REARCH2OCR -- Rear CH2 output counter register}
\paragraph*{REARCH2OCR}\vspace{12pt}
\rowcolors{1}{white}{white}
\begin{tabular}{l l }
{\bf HW prefix:} & pulse\_cnt\_rearch2o\\
{\bf HW address:} & 0x16\\
{\bf SW prefix:} & REARCH2O\\
{\bf SW offset:} & 0x58\\
\end{tabular}
\vspace{11pt}
\vspace{12pt}
Rear CH2 output counter register
\vspace{12pt}
\noindent
\resizebox{\textwidth}{!}{
\begin{tabular}{>{\centering\arraybackslash}p{1.5cm} >{\centering\arraybackslash}p{1.5cm} >{\centering\arraybackslash}p{1.5cm} >{\centering\arraybackslash}p{1.5cm} >{\centering\arraybackslash}p{1.5cm} >{\centering\arraybackslash}p{1.5cm} >{\centering\arraybackslash}p{1.5cm} >{\centering\arraybackslash}p{1.5cm} }
31 & 30 & 29 & 28 & 27 & 26 & 25 & 24\\
\hline
\multicolumn{8}{|c|}{\cellcolor{gray!25}REARCH2O[31:24]}\\
\multicolumn{8}{|c|}{\cellcolor{RoyalPurple!25}REARCH2O[31:24]}\\
\hline
23 & 22 & 21 & 20 & 19 & 18 & 17 & 16\\
\hline
\multicolumn{8}{|c|}{\cellcolor{gray!25}REARCH2O[23:16]}\\
\multicolumn{8}{|c|}{\cellcolor{RoyalPurple!25}REARCH2O[23:16]}\\
\hline
15 & 14 & 13 & 12 & 11 & 10 & 9 & 8\\
\hline
\multicolumn{8}{|c|}{\cellcolor{gray!25}REARCH2O[15:8]}\\
\multicolumn{8}{|c|}{\cellcolor{RoyalPurple!25}REARCH2O[15:8]}\\
\hline
7 & 6 & 5 & 4 & 3 & 2 & 1 & 0\\
\hline
\multicolumn{8}{|c|}{\cellcolor{gray!25}REARCH2O[7:0]}\\
\multicolumn{8}{|c|}{\cellcolor{RoyalPurple!25}REARCH2O[7:0]}\\
\hline
\end{tabular}
}
......@@ -875,32 +1033,39 @@ REARCH1I
REARCH2O
} [\emph{read/write}]: Pulse counter value
\end{small}
\item \begin{small}
\textbf{Unimplemented bits}: write as '0', read undefined
\end{small}
\end{itemize}
\vspace{11pt}
\subsubsection{REARCH2ICR -- Rear CH2 input counter register}
\paragraph*{REARCH2ICR}\vspace{12pt}
\rowcolors{1}{white}{white}
\begin{tabular}{l l }
{\bf HW prefix:} & pulse\_cnt\_rearch2i\\
{\bf HW address:} & 0x17\\
{\bf SW prefix:} & REARCH2I\\
{\bf SW offset:} & 0x5c\\
\end{tabular}
\vspace{11pt}
\vspace{12pt}
Rear CH2 input counter register
\vspace{12pt}
\noindent
\resizebox{\textwidth}{!}{
\begin{tabular}{>{\centering\arraybackslash}p{1.5cm} >{\centering\arraybackslash}p{1.5cm} >{\centering\arraybackslash}p{1.5cm} >{\centering\arraybackslash}p{1.5cm} >{\centering\arraybackslash}p{1.5cm} >{\centering\arraybackslash}p{1.5cm} >{\centering\arraybackslash}p{1.5cm} >{\centering\arraybackslash}p{1.5cm} }
31 & 30 & 29 & 28 & 27 & 26 & 25 & 24\\
\hline
\multicolumn{8}{|c|}{\cellcolor{gray!25}REARCH2I[31:24]}\\
\multicolumn{8}{|c|}{\cellcolor{RoyalPurple!25}REARCH2I[31:24]}\\
\hline
23 & 22 & 21 & 20 & 19 & 18 & 17 & 16\\
\hline
\multicolumn{8}{|c|}{\cellcolor{gray!25}REARCH2I[23:16]}\\
\multicolumn{8}{|c|}{\cellcolor{RoyalPurple!25}REARCH2I[23:16]}\\
\hline
15 & 14 & 13 & 12 & 11 & 10 & 9 & 8\\
\hline
\multicolumn{8}{|c|}{\cellcolor{gray!25}REARCH2I[15:8]}\\
\multicolumn{8}{|c|}{\cellcolor{RoyalPurple!25}REARCH2I[15:8]}\\
\hline
7 & 6 & 5 & 4 & 3 & 2 & 1 & 0\\
\hline
\multicolumn{8}{|c|}{\cellcolor{gray!25}REARCH2I[7:0]}\\
\multicolumn{8}{|c|}{\cellcolor{RoyalPurple!25}REARCH2I[7:0]}\\
\hline
\end{tabular}
}
......@@ -911,32 +1076,39 @@ REARCH2O
REARCH2I
} [\emph{read/write}]: Pulse counter value
\end{small}
\item \begin{small}
\textbf{Unimplemented bits}: write as '0', read undefined
\end{small}
\end{itemize}
\vspace{11pt}
\subsubsection{REARCH3OCR -- Rear CH3 output counter register}
\paragraph*{REARCH3OCR}\vspace{12pt}
\rowcolors{1}{white}{white}
\begin{tabular}{l l }
{\bf HW prefix:} & pulse\_cnt\_rearch3o\\
{\bf HW address:} & 0x18\\
{\bf SW prefix:} & REARCH3O\\
{\bf SW offset:} & 0x60\\
\end{tabular}
\vspace{12pt}
Rear CH3 output counter register
\vspace{11pt}
\vspace{12pt}
\noindent
\resizebox{\textwidth}{!}{
\begin{tabular}{>{\centering\arraybackslash}p{1.5cm} >{\centering\arraybackslash}p{1.5cm} >{\centering\arraybackslash}p{1.5cm} >{\centering\arraybackslash}p{1.5cm} >{\centering\arraybackslash}p{1.5cm} >{\centering\arraybackslash}p{1.5cm} >{\centering\arraybackslash}p{1.5cm} >{\centering\arraybackslash}p{1.5cm} }
31 & 30 & 29 & 28 & 27 & 26 & 25 & 24\\
\hline
\multicolumn{8}{|c|}{\cellcolor{gray!25}REARCH3O[31:24]}\\
\multicolumn{8}{|c|}{\cellcolor{RoyalPurple!25}REARCH3O[31:24]}\\
\hline
23 & 22 & 21 & 20 & 19 & 18 & 17 & 16\\
\hline
\multicolumn{8}{|c|}{\cellcolor{gray!25}REARCH3O[23:16]}\\
\multicolumn{8}{|c|}{\cellcolor{RoyalPurple!25}REARCH3O[23:16]}\\
\hline
15 & 14 & 13 & 12 & 11 & 10 & 9 & 8\\
\hline
\multicolumn{8}{|c|}{\cellcolor{gray!25}REARCH3O[15:8]}\\
\multicolumn{8}{|c|}{\cellcolor{RoyalPurple!25}REARCH3O[15:8]}\\
\hline
7 & 6 & 5 & 4 & 3 & 2 & 1 & 0\\
\hline
\multicolumn{8}{|c|}{\cellcolor{gray!25}REARCH3O[7:0]}\\
\multicolumn{8}{|c|}{\cellcolor{RoyalPurple!25}REARCH3O[7:0]}\\
\hline
\end{tabular}
}
......@@ -947,32 +1119,39 @@ REARCH2I
REARCH3O
} [\emph{read/write}]: Pulse counter value
\end{small}
\item \begin{small}
\textbf{Unimplemented bits}: write as '0', read undefined
\end{small}
\end{itemize}
\vspace{11pt}
\subsubsection{REARCH3ICR -- Rear CH3 input counter register}
\paragraph*{REARCH3ICR}\vspace{12pt}
\rowcolors{1}{white}{white}
\begin{tabular}{l l }
{\bf HW prefix:} & pulse\_cnt\_rearch3i\\
{\bf HW address:} & 0x19\\
{\bf SW prefix:} & REARCH3I\\
{\bf SW offset:} & 0x64\\
\end{tabular}
\vspace{12pt}
Rear CH3 input counter register
\vspace{11pt}
\vspace{12pt}
\noindent
\resizebox{\textwidth}{!}{
\begin{tabular}{>{\centering\arraybackslash}p{1.5cm} >{\centering\arraybackslash}p{1.5cm} >{\centering\arraybackslash}p{1.5cm} >{\centering\arraybackslash}p{1.5cm} >{\centering\arraybackslash}p{1.5cm} >{\centering\arraybackslash}p{1.5cm} >{\centering\arraybackslash}p{1.5cm} >{\centering\arraybackslash}p{1.5cm} }
31 & 30 & 29 & 28 & 27 & 26 & 25 & 24\\
\hline
\multicolumn{8}{|c|}{\cellcolor{gray!25}REARCH3I[31:24]}\\
\multicolumn{8}{|c|}{\cellcolor{RoyalPurple!25}REARCH3I[31:24]}\\
\hline
23 & 22 & 21 & 20 & 19 & 18 & 17 & 16\\
\hline
\multicolumn{8}{|c|}{\cellcolor{gray!25}REARCH3I[23:16]}\\
\multicolumn{8}{|c|}{\cellcolor{RoyalPurple!25}REARCH3I[23:16]}\\
\hline
15 & 14 & 13 & 12 & 11 & 10 & 9 & 8\\
\hline
\multicolumn{8}{|c|}{\cellcolor{gray!25}REARCH3I[15:8]}\\
\multicolumn{8}{|c|}{\cellcolor{RoyalPurple!25}REARCH3I[15:8]}\\
\hline
7 & 6 & 5 & 4 & 3 & 2 & 1 & 0\\
\hline
\multicolumn{8}{|c|}{\cellcolor{gray!25}REARCH3I[7:0]}\\
\multicolumn{8}{|c|}{\cellcolor{RoyalPurple!25}REARCH3I[7:0]}\\
\hline
\end{tabular}
}
......@@ -983,32 +1162,39 @@ REARCH3O
REARCH3I
} [\emph{read/write}]: Pulse counter value
\end{small}
\item \begin{small}
\textbf{Unimplemented bits}: write as '0', read undefined
\end{small}
\end{itemize}
\vspace{11pt}
\subsubsection{REARCH4OCR -- Rear CH4 output counter register}
\paragraph*{REARCH4OCR}\vspace{12pt}
\rowcolors{1}{white}{white}
\begin{tabular}{l l }
{\bf HW prefix:} & pulse\_cnt\_rearch4o\\
{\bf HW address:} & 0x1a\\
{\bf SW prefix:} & REARCH4O\\
{\bf SW offset:} & 0x68\\
\end{tabular}
\vspace{12pt}
Rear CH4 output counter register
\vspace{11pt}
\vspace{12pt}
\noindent
\resizebox{\textwidth}{!}{
\begin{tabular}{>{\centering\arraybackslash}p{1.5cm} >{\centering\arraybackslash}p{1.5cm} >{\centering\arraybackslash}p{1.5cm} >{\centering\arraybackslash}p{1.5cm} >{\centering\arraybackslash}p{1.5cm} >{\centering\arraybackslash}p{1.5cm} >{\centering\arraybackslash}p{1.5cm} >{\centering\arraybackslash}p{1.5cm} }
31 & 30 & 29 & 28 & 27 & 26 & 25 & 24\\
\hline
\multicolumn{8}{|c|}{\cellcolor{gray!25}REARCH4O[31:24]}\\
\multicolumn{8}{|c|}{\cellcolor{RoyalPurple!25}REARCH4O[31:24]}\\
\hline
23 & 22 & 21 & 20 & 19 & 18 & 17 & 16\\
\hline
\multicolumn{8}{|c|}{\cellcolor{gray!25}REARCH4O[23:16]}\\
\multicolumn{8}{|c|}{\cellcolor{RoyalPurple!25}REARCH4O[23:16]}\\
\hline
15 & 14 & 13 & 12 & 11 & 10 & 9 & 8\\
\hline
\multicolumn{8}{|c|}{\cellcolor{gray!25}REARCH4O[15:8]}\\
\multicolumn{8}{|c|}{\cellcolor{RoyalPurple!25}REARCH4O[15:8]}\\
\hline
7 & 6 & 5 & 4 & 3 & 2 & 1 & 0\\
\hline
\multicolumn{8}{|c|}{\cellcolor{gray!25}REARCH4O[7:0]}\\
\multicolumn{8}{|c|}{\cellcolor{RoyalPurple!25}REARCH4O[7:0]}\\
\hline
\end{tabular}
}
......@@ -1019,32 +1205,39 @@ REARCH3I
REARCH4O
} [\emph{read/write}]: Pulse counter value
\end{small}
\item \begin{small}
\textbf{Unimplemented bits}: write as '0', read undefined
\end{small}
\end{itemize}
\vspace{11pt}
\subsubsection{REARCH4ICR -- Rear CH4 input counter register}
\paragraph*{REARCH4ICR}\vspace{12pt}
\rowcolors{1}{white}{white}
\begin{tabular}{l l }
{\bf HW prefix:} & pulse\_cnt\_rearch4i\\
{\bf HW address:} & 0x1b\\
{\bf SW prefix:} & REARCH4I\\
{\bf SW offset:} & 0x6c\\
\end{tabular}
\vspace{12pt}
Rear CH4 input counter register
\vspace{11pt}
\vspace{12pt}
\noindent
\resizebox{\textwidth}{!}{
\begin{tabular}{>{\centering\arraybackslash}p{1.5cm} >{\centering\arraybackslash}p{1.5cm} >{\centering\arraybackslash}p{1.5cm} >{\centering\arraybackslash}p{1.5cm} >{\centering\arraybackslash}p{1.5cm} >{\centering\arraybackslash}p{1.5cm} >{\centering\arraybackslash}p{1.5cm} >{\centering\arraybackslash}p{1.5cm} }
31 & 30 & 29 & 28 & 27 & 26 & 25 & 24\\
\hline
\multicolumn{8}{|c|}{\cellcolor{gray!25}REARCH4I[31:24]}\\
\multicolumn{8}{|c|}{\cellcolor{RoyalPurple!25}REARCH4I[31:24]}\\
\hline
23 & 22 & 21 & 20 & 19 & 18 & 17 & 16\\
\hline
\multicolumn{8}{|c|}{\cellcolor{gray!25}REARCH4I[23:16]}\\
\multicolumn{8}{|c|}{\cellcolor{RoyalPurple!25}REARCH4I[23:16]}\\
\hline
15 & 14 & 13 & 12 & 11 & 10 & 9 & 8\\
\hline
\multicolumn{8}{|c|}{\cellcolor{gray!25}REARCH4I[15:8]}\\
\multicolumn{8}{|c|}{\cellcolor{RoyalPurple!25}REARCH4I[15:8]}\\
\hline
7 & 6 & 5 & 4 & 3 & 2 & 1 & 0\\
\hline
\multicolumn{8}{|c|}{\cellcolor{gray!25}REARCH4I[7:0]}\\
\multicolumn{8}{|c|}{\cellcolor{RoyalPurple!25}REARCH4I[7:0]}\\
\hline
\end{tabular}
}
......@@ -1055,32 +1248,39 @@ REARCH4O
REARCH4I
} [\emph{read/write}]: Pulse counter value
\end{small}
\item \begin{small}
\textbf{Unimplemented bits}: write as '0', read undefined
\end{small}
\end{itemize}
\vspace{11pt}
\subsubsection{REARCH5OCR -- Rear CH5 output counter register}
\paragraph*{REARCH5OCR}\vspace{12pt}
\rowcolors{1}{white}{white}
\begin{tabular}{l l }
{\bf HW prefix:} & pulse\_cnt\_rearch5o\\
{\bf HW address:} & 0x1c\\
{\bf SW prefix:} & REARCH5O\\
{\bf SW offset:} & 0x70\\
\end{tabular}
\vspace{12pt}
Rear CH5 output counter register
\vspace{11pt}
\vspace{12pt}
\noindent
\resizebox{\textwidth}{!}{
\begin{tabular}{>{\centering\arraybackslash}p{1.5cm} >{\centering\arraybackslash}p{1.5cm} >{\centering\arraybackslash}p{1.5cm} >{\centering\arraybackslash}p{1.5cm} >{\centering\arraybackslash}p{1.5cm} >{\centering\arraybackslash}p{1.5cm} >{\centering\arraybackslash}p{1.5cm} >{\centering\arraybackslash}p{1.5cm} }
31 & 30 & 29 & 28 & 27 & 26 & 25 & 24\\
\hline
\multicolumn{8}{|c|}{\cellcolor{gray!25}REARCH5O[31:24]}\\
\multicolumn{8}{|c|}{\cellcolor{RoyalPurple!25}REARCH5O[31:24]}\\
\hline
23 & 22 & 21 & 20 & 19 & 18 & 17 & 16\\
\hline
\multicolumn{8}{|c|}{\cellcolor{gray!25}REARCH5O[23:16]}\\
\multicolumn{8}{|c|}{\cellcolor{RoyalPurple!25}REARCH5O[23:16]}\\
\hline
15 & 14 & 13 & 12 & 11 & 10 & 9 & 8\\
\hline
\multicolumn{8}{|c|}{\cellcolor{gray!25}REARCH5O[15:8]}\\
\multicolumn{8}{|c|}{\cellcolor{RoyalPurple!25}REARCH5O[15:8]}\\
\hline
7 & 6 & 5 & 4 & 3 & 2 & 1 & 0\\
\hline
\multicolumn{8}{|c|}{\cellcolor{gray!25}REARCH5O[7:0]}\\
\multicolumn{8}{|c|}{\cellcolor{RoyalPurple!25}REARCH5O[7:0]}\\
\hline
\end{tabular}
}
......@@ -1091,32 +1291,39 @@ REARCH4I
REARCH5O
} [\emph{read/write}]: Pulse counter value
\end{small}
\item \begin{small}
\textbf{Unimplemented bits}: write as '0', read undefined
\end{small}
\end{itemize}
\vspace{11pt}
\subsubsection{REARCH5ICR -- Rear CH5 input counter register}
\paragraph*{REARCH5ICR}\vspace{12pt}
\rowcolors{1}{white}{white}
\begin{tabular}{l l }
{\bf HW prefix:} & pulse\_cnt\_rearch5i\\
{\bf HW address:} & 0x1d\\
{\bf SW prefix:} & REARCH5I\\
{\bf SW offset:} & 0x74\\
\end{tabular}
\vspace{12pt}
Rear CH5 input counter register
\vspace{11pt}
\vspace{12pt}
\noindent
\resizebox{\textwidth}{!}{
\begin{tabular}{>{\centering\arraybackslash}p{1.5cm} >{\centering\arraybackslash}p{1.5cm} >{\centering\arraybackslash}p{1.5cm} >{\centering\arraybackslash}p{1.5cm} >{\centering\arraybackslash}p{1.5cm} >{\centering\arraybackslash}p{1.5cm} >{\centering\arraybackslash}p{1.5cm} >{\centering\arraybackslash}p{1.5cm} }
31 & 30 & 29 & 28 & 27 & 26 & 25 & 24\\
\hline
\multicolumn{8}{|c|}{\cellcolor{gray!25}REARCH5I[31:24]}\\
\multicolumn{8}{|c|}{\cellcolor{RoyalPurple!25}REARCH5I[31:24]}\\
\hline
23 & 22 & 21 & 20 & 19 & 18 & 17 & 16\\
\hline
\multicolumn{8}{|c|}{\cellcolor{gray!25}REARCH5I[23:16]}\\
\multicolumn{8}{|c|}{\cellcolor{RoyalPurple!25}REARCH5I[23:16]}\\
\hline
15 & 14 & 13 & 12 & 11 & 10 & 9 & 8\\
\hline
\multicolumn{8}{|c|}{\cellcolor{gray!25}REARCH5I[15:8]}\\
\multicolumn{8}{|c|}{\cellcolor{RoyalPurple!25}REARCH5I[15:8]}\\
\hline
7 & 6 & 5 & 4 & 3 & 2 & 1 & 0\\
\hline
\multicolumn{8}{|c|}{\cellcolor{gray!25}REARCH5I[7:0]}\\
\multicolumn{8}{|c|}{\cellcolor{RoyalPurple!25}REARCH5I[7:0]}\\
\hline
\end{tabular}
}
......@@ -1127,32 +1334,39 @@ REARCH5O
REARCH5I
} [\emph{read/write}]: Pulse counter value
\end{small}
\item \begin{small}
\textbf{Unimplemented bits}: write as '0', read undefined
\end{small}
\end{itemize}
\vspace{11pt}
\subsubsection{REARCH6OCR -- Rear CH6 output counter register}
\paragraph*{REARCH6OCR}\vspace{12pt}
\rowcolors{1}{white}{white}
\begin{tabular}{l l }
{\bf HW prefix:} & pulse\_cnt\_rearch6o\\
{\bf HW address:} & 0x1e\\
{\bf SW prefix:} & REARCH6O\\
{\bf SW offset:} & 0x78\\
\end{tabular}
\vspace{12pt}
Rear CH6 output counter register
\vspace{11pt}
\vspace{12pt}
\noindent
\resizebox{\textwidth}{!}{
\begin{tabular}{>{\centering\arraybackslash}p{1.5cm} >{\centering\arraybackslash}p{1.5cm} >{\centering\arraybackslash}p{1.5cm} >{\centering\arraybackslash}p{1.5cm} >{\centering\arraybackslash}p{1.5cm} >{\centering\arraybackslash}p{1.5cm} >{\centering\arraybackslash}p{1.5cm} >{\centering\arraybackslash}p{1.5cm} }
31 & 30 & 29 & 28 & 27 & 26 & 25 & 24\\
\hline
\multicolumn{8}{|c|}{\cellcolor{gray!25}REARCH6O[31:24]}\\
\multicolumn{8}{|c|}{\cellcolor{RoyalPurple!25}REARCH6O[31:24]}\\
\hline
23 & 22 & 21 & 20 & 19 & 18 & 17 & 16\\
\hline
\multicolumn{8}{|c|}{\cellcolor{gray!25}REARCH6O[23:16]}\\
\multicolumn{8}{|c|}{\cellcolor{RoyalPurple!25}REARCH6O[23:16]}\\
\hline
15 & 14 & 13 & 12 & 11 & 10 & 9 & 8\\
\hline
\multicolumn{8}{|c|}{\cellcolor{gray!25}REARCH6O[15:8]}\\
\multicolumn{8}{|c|}{\cellcolor{RoyalPurple!25}REARCH6O[15:8]}\\
\hline
7 & 6 & 5 & 4 & 3 & 2 & 1 & 0\\
\hline
\multicolumn{8}{|c|}{\cellcolor{gray!25}REARCH6O[7:0]}\\
\multicolumn{8}{|c|}{\cellcolor{RoyalPurple!25}REARCH6O[7:0]}\\
\hline
\end{tabular}
}
......@@ -1163,32 +1377,39 @@ REARCH5I
REARCH6O
} [\emph{read/write}]: Pulse counter value
\end{small}
\item \begin{small}
\textbf{Unimplemented bits}: write as '0', read undefined
\end{small}
\end{itemize}
\vspace{11pt}
\subsubsection{REARCH6ICR -- Rear CH6 input counter register}
\paragraph*{REARCH6ICR}\vspace{12pt}
\rowcolors{1}{white}{white}
\begin{tabular}{l l }
{\bf HW prefix:} & pulse\_cnt\_rearch6i\\
{\bf HW address:} & 0x1f\\
{\bf SW prefix:} & REARCH6I\\
{\bf SW offset:} & 0x7c\\
\end{tabular}
\vspace{12pt}
Rear CH6 input counter register
\vspace{11pt}
\vspace{12pt}
\noindent
\resizebox{\textwidth}{!}{
\begin{tabular}{>{\centering\arraybackslash}p{1.5cm} >{\centering\arraybackslash}p{1.5cm} >{\centering\arraybackslash}p{1.5cm} >{\centering\arraybackslash}p{1.5cm} >{\centering\arraybackslash}p{1.5cm} >{\centering\arraybackslash}p{1.5cm} >{\centering\arraybackslash}p{1.5cm} >{\centering\arraybackslash}p{1.5cm} }
31 & 30 & 29 & 28 & 27 & 26 & 25 & 24\\
\hline
\multicolumn{8}{|c|}{\cellcolor{gray!25}REARCH6I[31:24]}\\
\multicolumn{8}{|c|}{\cellcolor{RoyalPurple!25}REARCH6I[31:24]}\\
\hline
23 & 22 & 21 & 20 & 19 & 18 & 17 & 16\\
\hline
\multicolumn{8}{|c|}{\cellcolor{gray!25}REARCH6I[23:16]}\\
\multicolumn{8}{|c|}{\cellcolor{RoyalPurple!25}REARCH6I[23:16]}\\
\hline
15 & 14 & 13 & 12 & 11 & 10 & 9 & 8\\
\hline
\multicolumn{8}{|c|}{\cellcolor{gray!25}REARCH6I[15:8]}\\
\multicolumn{8}{|c|}{\cellcolor{RoyalPurple!25}REARCH6I[15:8]}\\
\hline
7 & 6 & 5 & 4 & 3 & 2 & 1 & 0\\
\hline
\multicolumn{8}{|c|}{\cellcolor{gray!25}REARCH6I[7:0]}\\
\multicolumn{8}{|c|}{\cellcolor{RoyalPurple!25}REARCH6I[7:0]}\\
\hline
\end{tabular}
}
......@@ -1199,9 +1420,6 @@ REARCH6O
REARCH6I
} [\emph{read/write}]: Pulse counter value
\end{small}
\item \begin{small}
\textbf{Unimplemented bits}: write as '0', read undefined
\end{small}
\end{itemize}
......
Markdown is supported
0% or
You are about to add 0 people to the discussion. Proceed with caution.
Finish editing this message first!
Please register or to comment