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Conv TTL Blocking - Testing
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Conv TTL Blocking - Testing
Commits
f433d41d
Commit
f433d41d
authored
Jul 12, 2018
by
unknown
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minor changes, no effect on function
parent
00bd6cd1
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4 changed files
with
9 additions
and
150 deletions
+9
-150
pts_regs.vhd
fm/hdl/modules/pts_regs.vhd
+1
-1
pts.vhd
fm/hdl/top/pts.vhd
+7
-6
hw-gwver.py
fm/pts/python/hw-gwver.py
+0
-142
ttl_pulse_switch.py
fm/pts/python/ttl_pulse_switch.py
+1
-1
No files found.
fm/hdl/modules/pts_regs.vhd
View file @
f433d41d
...
@@ -3,7 +3,7 @@
...
@@ -3,7 +3,7 @@
---------------------------------------------------------------------------------------
---------------------------------------------------------------------------------------
-- File : .\pts_regs.vhd
-- File : .\pts_regs.vhd
-- Author : auto-generated by wbgen2 from .\pts_regs.wb
-- Author : auto-generated by wbgen2 from .\pts_regs.wb
-- Created :
06/19/17 17:23:25
-- Created :
10/27/17 10:49:32
-- Standard : VHDL'87
-- Standard : VHDL'87
---------------------------------------------------------------------------------------
---------------------------------------------------------------------------------------
-- THIS FILE WAS GENERATED BY wbgen2 FROM SOURCE FILE .\pts_regs.wb
-- THIS FILE WAS GENERATED BY wbgen2 FROM SOURCE FILE .\pts_regs.wb
...
...
fm/hdl/top/pts.vhd
View file @
f433d41d
...
@@ -154,10 +154,9 @@ entity pts is
...
@@ -154,10 +154,9 @@ entity pts is
-- Switches
-- Switches
sw_gp_n_i
:
in
std_logic_vector
(
7
downto
0
);
sw_gp_n_i
:
in
std_logic_vector
(
7
downto
0
);
sw_multicast_n_i
:
in
std_logic_vector
(
3
downto
0
);
sw_multicast_n_i
:
in
std_logic_vector
(
3
downto
0
);
-- PCB version recognition
-- PCB version recognition
pcbrev_i
:
in
std_logic_vector
(
5
downto
0
);
pcbrev_i
:
in
std_logic_vector
(
5
downto
0
);
-- RTM lines
-- RTM lines
rtmm_i
:
in
std_logic_vector
(
2
downto
0
);
rtmm_i
:
in
std_logic_vector
(
2
downto
0
);
...
@@ -1900,9 +1899,11 @@ end generate gen_rear_test_logic;
...
@@ -1900,9 +1899,11 @@ end generate gen_rear_test_logic;
end
if
;
end
if
;
end
if
;
end
if
;
end
process
p_led_seq
;
end
process
p_led_seq
;
max_led_seq
<=
to_unsigned
(
30
,
5
)
when
pulse_led_en
=
'1'
else
to_unsigned
(
24
,
5
);
-- cycle 24 times for status leds
-- cycle 24 times for status leds
-- 30 times for pulse leds
-- 30 times for pulse leds
max_led_seq
<=
to_unsigned
(
30
,
5
)
when
pulse_led_en
=
'1'
else
to_unsigned
(
24
,
5
);
-- Sequence the front-panel LEDs based on the sequence counter
-- Sequence the front-panel LEDs based on the sequence counter
front_led_seq
<=
"0000000001"
when
(
pulse_led_en
=
'1'
)
and
(
led_seq
=
1
)
else
front_led_seq
<=
"0000000001"
when
(
pulse_led_en
=
'1'
)
and
(
led_seq
=
1
)
else
"0000000010"
when
(
pulse_led_en
=
'1'
)
and
(
led_seq
=
2
)
else
"0000000010"
when
(
pulse_led_en
=
'1'
)
and
(
led_seq
=
2
)
else
...
...
fm/pts/python/hw-gwver.py
deleted
100644 → 0
View file @
00bd6cd1
##_______________________________________________________________________________________________
##
## CONV-TTL-BLO PTS
##
## CERN,BE/CO-HT
##_______________________________________________________________________________________________
##
##-----------------------------------------------------------------------------------------------
##
## CONV-TTL-BLO pcb version
##
##-----------------------------------------------------------------------------------------------
##
## Description Test whether the version of PCB is the expected one
##
##
## Authors Maciej Lipinski (maciej.lipinski@cern.ch)
## Website http://www.ohwr.org/projects/pts
## Date 17/08/2017
##-----------------------------------------------------------------------------------------------
##
##------------------------------------------------------------------------------------------------
## GNU LESSER GENERAL PUBLIC LICENSE
## ------------------------------------
## This source file is free software; you can redistribute it and/or modify it under the terms of
## the GNU Lesser General Public License as published by the Free Software Foundation; either
## version 2.1 of the License, or (at your option) any later version.
## This source is distributed in the hope that it will be useful, but WITHOUT ANY WARRANTY;
## without even the implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
## See the GNU Lesser General Public License for more details.
## You should have received a copy of the GNU Lesser General Public License along with this
## source; if not, download it from http://www.gnu.org/licenses/lgpl-2.1.html
##-------------------------------------------------------------------------------------------------
##-------------------------------------------------------------------------------------------------
## Import
##-------------------------------------------------------------------------------------------------
# Import system modules
import
sys
sys
.
path
.
append
(
"log/"
)
import
time
import
os
,
errno
,
re
,
sys
,
struct
import
os.path
import
traceback
import
glob
import
binascii
# Import common modules
from
ctypes
import
*
from
ptsexcept
import
*
from
vv_pts
import
*
from
ptsdefine
import
*
##-------------------------------------------------------------------------------------------------
## main --
##-------------------------------------------------------------------------------------------------
def
main
(
bus
,
tname
,
inf
,
log
):
"""
tests : Hardware version
uses : pts.bit and hwvertest.py
"""
HWVERS
=
0.0
GWVERS
=
4.1
# Control and Status Register
CSR
=
0x004
CSR_GWVERS_OFS
=
0
CSR_HWVERS_OFS
=
22
pel
=
PTS_ERROR_LOGGER
(
inf
,
log
)
try
:
# Read PCB version: a 6 bits representing HW/PCB version number
# 4 MSB represent HW version number (major)
# 2 LSB represent number of execution (minor)
# Eg: value 010010 represents PCB version 4.2
hwvers
=
(
bus
.
vv_read
(
CSR
)
&
0xFC00000
)
>>
CSR_HWVERS_OFS
maj
=
int
(
hwvers
>>
2
)
min
=
float
(
hwvers
&
0x03
)
min
/=
10
hwvers
=
maj
+
min
# and now check if appropriate
if
(
hwvers
==
HWVERS
):
if
(
HWVERS
==
0.0
)
msg
=
"HW/PCB version is version 3 or earlier
\n
"
inf
.
write
(
msg
)
else
:
msg
=
"HW/PCB version is version
%2.1
f
\n
"
%
(
HWVERS
)
inf
.
write
(
msg
)
else
:
msg
=
"ERROR: HW/PCBe version (
%2.1
f) incorrect - expected
%2.1
f"
%
(
hwvers
,
HWVERS
)
pel
.
set
(
msg
)
print
"-->
%
s"
%
msg
return
pel
.
get
()
except
BusException
,
e
:
raise
PtsError
(
"SKT Exception:
%
s"
%
(
e
))
except
BusWarning
,
e
:
raise
PtsError
(
"SKT Warning:
%
s"
%
(
e
))
try
:
# Read GW release version: a 8 bits representing HW/PCB version number
# 4 MSB represent HW version number (major)
# 4 LSB represent number of execution (minor)
# Eg: value 01000010 represents PCB version 4.2
hwvers
=
(
bus
.
vv_read
(
CSR
)
&
0xFF
)
>>
CSR_GWVERS_OFS
maj
=
int
(
gwvers
>>
4
)
min
=
float
(
hwvers
&
0x0F
)
min
/=
10
gwvers
=
maj
+
min
# and now check if appropriate
if
(
gwvers
==
GWVERS
):
msg
=
"GW version is version
%2.1
f or earlier
\n
"
%
(
GWVERS
)
inf
.
write
(
msg
)
else
:
msg
=
"ERROR: GW version (
%2.1
f) incorrect - expected
%2.1
f
\n
"
%
(
gwvers
,
GWVERS
)
pel
.
set
(
msg
)
print
"-->
%
s"
%
msg
return
pel
.
get
()
except
BusException
,
e
:
raise
PtsError
(
"SKT Exception:
%
s"
%
(
e
))
except
BusWarning
,
e
:
raise
PtsError
(
"SKT Warning:
%
s"
%
(
e
))
fm/pts/python/ttl_pulse_switch.py
View file @
f433d41d
...
@@ -161,7 +161,7 @@ def main(bus, tname, inf, log):
...
@@ -161,7 +161,7 @@ def main(bus, tname, inf, log):
if
"yes"
in
reply
.
lower
():
if
"yes"
in
reply
.
lower
():
break
break
if
"no"
in
reply
.
lower
():
if
"no"
in
reply
.
lower
():
msg
=
"ERROR:
Daisy-chain on front panel not made
"
msg
=
"ERROR:
No daisy-chain on front panel
"
pel
.
set
(
msg
)
pel
.
set
(
msg
)
return
pel
.
get
()
return
pel
.
get
()
else
:
else
:
...
...
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