\BOOKMARK [1][-]{section.1}{General schema}{}
\BOOKMARK [1][-]{section.2}{Panels}{}
\BOOKMARK [2][-]{subsection.2.1}{Front Panel}{section.2}
\BOOKMARK [2][-]{subsection.2.2}{Rear Panel}{section.2}
\BOOKMARK [1][-]{section.3}{Power-up and System Monitoring}{}
\BOOKMARK [2][-]{subsection.3.1}{Power Supplies}{section.3}
\BOOKMARK [2][-]{subsection.3.2}{Board Temperature}{section.3}
\BOOKMARK [2][-]{subsection.3.3}{Daisy-chain detection}{section.3}
\BOOKMARK [1][-]{section.4}{FPGA Control and Pulse Converter Unit}{}
\BOOKMARK [2][-]{subsection.4.1}{Board ID}{section.4}
\BOOKMARK [2][-]{subsection.4.2}{HDL control}{section.4}
\BOOKMARK [2][-]{subsection.4.3}{Pulse Converter Unit}{section.4}
\BOOKMARK [3][-]{subsubsection.4.3.1}{Input}{subsection.4.3}
\BOOKMARK [3][-]{subsubsection.4.3.2}{Output}{subsection.4.3}
\BOOKMARK [1][-]{section.5}{On board memory and FPGA reprogramming}{}
\BOOKMARK [1][-]{section.6}{Testing methodologies}{}
