Device Usage Page (usage_statistics_webtalk.html)

This HTML page displays the device usage statistics that will be sent to Xilinx.
 

 
Software Version and Target Device
Product Version: ISE:13.3 (WebPack) - O.76xd Target Family: Spartan6
OS Platform: LIN Target Device: xc6slx45t
Project ID (random number) e6c503a70d5145719aa3e959e38e46a8.EF41633B9B530BE50A9AA6E385725EA0.3 Target Package: fgg484
Registration ID 205164259_0_0_654 Target Speed: -3
Date Generated 2012-11-21T11:51:36 Tool Flow ISE
 
User Environment
OS Name Ubuntu OS Release Ubuntu 11.10
CPU Name Intel(R) Core(TM) i5 CPU M 540 @ 2.53GHz CPU Speed 1199.000 MHz
OS Name Ubuntu OS Release Ubuntu 11.10
CPU Name Intel(R) Core(TM) i5 CPU M 540 @ 2.53GHz CPU Speed 1199.000 MHz
 
Device Usage Statistics
Macro StatisticsMiscellaneous StatisticsNet StatisticsSite Usage
Adders/Subtractors=12
  • 64-bit adder=12
Comparators=12
  • 64-bit comparator greater=12
Multiplexers=50
  • 1-bit 2-to-1 multiplexer=24
  • 6-bit 2-to-1 multiplexer=2
  • 64-bit 2-to-1 multiplexer=24
Registers=1086
  • Flip-Flops=1086
MiscellaneousStatistics
  • AGG_BONDED_IO=59
  • AGG_IO=59
  • AGG_LOCED_IO=59
  • AGG_SLICE=199
  • NUM_BONDED_IOB=59
  • NUM_BSFULL=219
  • NUM_BSLUTONLY=377
  • NUM_BSREGONLY=22
  • NUM_BSUSED=618
  • NUM_BUFG=3
  • NUM_LOCED_IOB=59
  • NUM_LOGIC_O5ANDO6=72
  • NUM_LOGIC_O5ONLY=180
  • NUM_LOGIC_O6ONLY=320
  • NUM_LUT_RT_DRIVES_CARRY4=12
  • NUM_LUT_RT_DRIVES_FLOP=4
  • NUM_LUT_RT_EXO5=4
  • NUM_LUT_RT_EXO6=12
  • NUM_LUT_RT_O5=1
  • NUM_LUT_RT_O6=180
  • NUM_PLL_ADV=1
  • NUM_SLICEL=96
  • NUM_SLICEM=2
  • NUM_SLICEX=101
  • NUM_SLICE_CARRY4=96
  • NUM_SLICE_CONTROLSET=17
  • NUM_SLICE_CYINIT=873
  • NUM_SLICE_FF=249
  • NUM_SLICE_UNUSEDCTRL=94
  • NUM_SRL_O6ONLY=8
  • NUM_UNUSABLE_FF_BELS=23
NetStatistics
  • NumNets_Active=637
  • NumNets_Gnd=1
  • NumNets_Vcc=1
  • NumNodesOfType_Active_BOUNCEACROSS=1
  • NumNodesOfType_Active_BOUNCEIN=72
  • NumNodesOfType_Active_BUFGOUT=3
  • NumNodesOfType_Active_BUFHINP2OUT=10
  • NumNodesOfType_Active_CLKPIN=107
  • NumNodesOfType_Active_CLKPINFEED=16
  • NumNodesOfType_Active_CNTRLPIN=95
  • NumNodesOfType_Active_DOUBLE=431
  • NumNodesOfType_Active_GENERIC=73
  • NumNodesOfType_Active_GLOBAL=96
  • NumNodesOfType_Active_INPUT=75
  • NumNodesOfType_Active_IOBIN2OUT=53
  • NumNodesOfType_Active_IOBOUTPUT=53
  • NumNodesOfType_Active_LUTINPUT=1255
  • NumNodesOfType_Active_OUTBOUND=525
  • NumNodesOfType_Active_OUTPUT=572
  • NumNodesOfType_Active_PADINPUT=36
  • NumNodesOfType_Active_PADOUTPUT=20
  • NumNodesOfType_Active_PINBOUNCE=172
  • NumNodesOfType_Active_PINFEED=1498
  • NumNodesOfType_Active_QUAD=585
  • NumNodesOfType_Active_REGINPUT=30
  • NumNodesOfType_Active_SINGLE=602
  • NumNodesOfType_Vcc_CNTRLPIN=2
  • NumNodesOfType_Vcc_GENERIC=3
  • NumNodesOfType_Vcc_HVCCOUT=87
  • NumNodesOfType_Vcc_IOBIN2OUT=3
  • NumNodesOfType_Vcc_IOBOUTPUT=3
  • NumNodesOfType_Vcc_KVCCOUT=3
  • NumNodesOfType_Vcc_LUTINPUT=300
  • NumNodesOfType_Vcc_PADINPUT=3
  • NumNodesOfType_Vcc_PINBOUNCE=3
  • NumNodesOfType_Vcc_PINFEED=303
  • NumNodesOfType_Vcc_REGINPUT=1
SiteStatistics
  • BUFG-BUFGMUX=3
  • IOB-IOBM=27
  • IOB-IOBS=32
  • SLICEL-SLICEM=42
  • SLICEX-SLICEL=10
  • SLICEX-SLICEM=18
SiteSummary
  • BUFG=3
  • BUFG_BUFG=3
  • CARRY4=96
  • FF_SR=14
  • HARD0=24
  • INVERTER=1
  • IOB=59
  • IOB_IMUX=19
  • IOB_INBUF=19
  • IOB_OUTBUF=39
  • LUT5=257
  • LUT6=584
  • LUT_OR_MEM6=8
  • NULLMUX=1
  • PAD=59
  • PLL_ADV=1
  • PLL_ADV_PLL_ADV=1
  • REG_SR=235
  • SLICEL=96
  • SLICEM=2
  • SLICEX=101
 
Configuration Data
FF_SR
  • CK=[CK:14] [CK_INV:0]
  • SRINIT=[SRINIT0:14]
  • SYNC_ATTR=[SYNC:14]
IOB_INBUF
  • DIFF_TERM=[TRUE:1]
IOB_OUTBUF
  • DRIVEATTRBOX=[4:26] [12:13]
  • SLEW=[SLOW:1] [QUIETIO:22] [FAST:16]
  • SUSPEND=[3STATE:39]
LUT_OR_MEM6
  • CLK=[CLK:8] [CLK_INV:0]
  • LUT_OR_MEM=[RAM:8]
  • RAMMODE=[SRL32:8]
PLL_ADV
  • RST=[RST:1] [RST_INV:0]
PLL_ADV_PLL_ADV
  • BANDWIDTH=[OPTIMIZED:1]
  • CLK_FEEDBACK=[CLKFBOUT:1]
  • COMPENSATION=[SYSTEM_SYNCHRONOUS:1]
  • PLL_ADD_LEAKAGE=[2:1]
  • PLL_AVDD_COMP_SET=[2:1]
  • PLL_CLAMP_BYPASS=[FALSE:1]
  • PLL_CLAMP_REF_SEL=[1:1]
  • PLL_CLK0MX=[0:1]
  • PLL_CLK1MX=[0:1]
  • PLL_CLK2MX=[0:1]
  • PLL_CLK3MX=[0:1]
  • PLL_CLK4MX=[0:1]
  • PLL_CLK5MX=[0:1]
  • PLL_CLKBURST_CNT=[0:1]
  • PLL_CLKBURST_ENABLE=[TRUE:1]
  • PLL_CLKCNTRL=[0:1]
  • PLL_CLKFBMX=[0:1]
  • PLL_CLKFBOUT2_EDGE=[TRUE:1]
  • PLL_CLKFBOUT2_NOCOUNT=[TRUE:1]
  • PLL_CLKFBOUT_EDGE=[TRUE:1]
  • PLL_CLKFBOUT_EN=[FALSE:1]
  • PLL_CLKFBOUT_NOCOUNT=[TRUE:1]
  • PLL_CLKOUT0_EDGE=[TRUE:1]
  • PLL_CLKOUT0_EN=[FALSE:1]
  • PLL_CLKOUT0_NOCOUNT=[TRUE:1]
  • PLL_CLKOUT1_EDGE=[TRUE:1]
  • PLL_CLKOUT1_EN=[FALSE:1]
  • PLL_CLKOUT1_NOCOUNT=[TRUE:1]
  • PLL_CLKOUT2_EDGE=[TRUE:1]
  • PLL_CLKOUT2_EN=[FALSE:1]
  • PLL_CLKOUT2_NOCOUNT=[TRUE:1]
  • PLL_CLKOUT3_EDGE=[TRUE:1]
  • PLL_CLKOUT3_EN=[FALSE:1]
  • PLL_CLKOUT3_NOCOUNT=[TRUE:1]
  • PLL_CLKOUT4_EDGE=[TRUE:1]
  • PLL_CLKOUT4_EN=[FALSE:1]
  • PLL_CLKOUT4_NOCOUNT=[TRUE:1]
  • PLL_CLKOUT5_EDGE=[TRUE:1]
  • PLL_CLKOUT5_EN=[FALSE:1]
  • PLL_CLKOUT5_NOCOUNT=[TRUE:1]
  • PLL_CLK_LOST_DETECT=[FALSE:1]
  • PLL_CP=[1:1]
  • PLL_CP_BIAS_TRIP_SHIFT=[TRUE:1]
  • PLL_CP_REPL=[1:1]
  • PLL_CP_RES=[0:1]
  • PLL_DIRECT_PATH_CNTRL=[TRUE:1]
  • PLL_DIVCLK_EDGE=[TRUE:1]
  • PLL_DIVCLK_NOCOUNT=[TRUE:1]
  • PLL_DVDD_COMP_SET=[2:1]
  • PLL_EN=[FALSE:1]
  • PLL_EN_DLY=[TRUE:1]
  • PLL_EN_LEAKAGE=[2:1]
  • PLL_EN_TCLK0=[TRUE:1]
  • PLL_EN_TCLK1=[TRUE:1]
  • PLL_EN_TCLK2=[TRUE:1]
  • PLL_EN_TCLK3=[TRUE:1]
  • PLL_EN_VCO0=[FALSE:1]
  • PLL_EN_VCO1=[FALSE:1]
  • PLL_EN_VCO2=[FALSE:1]
  • PLL_EN_VCO3=[FALSE:1]
  • PLL_EN_VCO4=[FALSE:1]
  • PLL_EN_VCO5=[FALSE:1]
  • PLL_EN_VCO6=[FALSE:1]
  • PLL_EN_VCO7=[FALSE:1]
  • PLL_EN_VCO_DIV1=[FALSE:1]
  • PLL_EN_VCO_DIV6=[TRUE:1]
  • PLL_INTFB=[0:1]
  • PLL_IO_CLKSRC=[0:1]
  • PLL_LFHF=[3:1]
  • PLL_LOCK_FB_DLY=[3:1]
  • PLL_LOCK_REF_DLY=[5:1]
  • PLL_MAN_LF_EN=[TRUE:1]
  • PLL_NBTI_EN=[TRUE:1]
  • PLL_PFD_CNTRL=[8:1]
  • PLL_PFD_DLY=[1:1]
  • PLL_PWRD_CFG=[FALSE:1]
  • PLL_REG_INPUT=[TRUE:1]
  • PLL_RES=[1:1]
  • PLL_SEL_SLIPD=[FALSE:1]
  • PLL_SKEW_CNTRL=[0:1]
  • PLL_TEST_IN_WINDOW=[FALSE:1]
  • PLL_VDD_SEL=[0:1]
  • PLL_VLFHIGH_DIS=[TRUE:1]
  • RST=[RST:1] [RST_INV:0]
REG_SR
  • CK=[CK:235] [CK_INV:0]
  • LATCH_OR_FF=[FF:235]
  • SRINIT=[SRINIT0:234] [SRINIT1:1]
  • SYNC_ATTR=[ASYNC:13] [SYNC:222]
SLICEL
  • CLK=[CLK:12] [CLK_INV:0]
SLICEM
  • CLK=[CLK:2] [CLK_INV:0]
SLICEX
  • CLK=[CLK:91] [CLK_INV:0]
 
Pin Data
BUFG
  • I0=3
  • O=3
BUFG_BUFG
  • I0=3
  • O=3
CARRY4
  • CIN=72
  • CO0=6
  • CO1=6
  • CO2=6
  • CO3=72
  • CYINIT=24
  • DI0=66
  • DI1=72
  • DI2=60
  • DI3=42
  • O0=48
  • O1=48
  • O2=48
  • O3=48
  • S0=96
  • S1=96
  • S2=90
  • S3=84
FF_SR
  • CK=14
  • D=14
  • Q=14
  • SR=14
HARD0
  • 0=24
INVERTER
  • IN=1
  • OUT=1
IOB
  • DIFFI_IN=1
  • I=19
  • O=39
  • PAD=59
  • PADOUT=1
IOB_IMUX
  • I=18
  • I_B=1
  • OUT=19
IOB_INBUF
  • DIFFI_IN=1
  • OUT=19
  • PAD=19
IOB_OUTBUF
  • IN=39
  • OUT=39
LUT5
  • A1=36
  • A2=30
  • A3=40
  • A4=39
  • A5=28
  • O5=257
LUT6
  • A1=24
  • A2=25
  • A3=246
  • A4=259
  • A5=450
  • A6=470
  • O6=584
LUT_OR_MEM6
  • A1=8
  • A2=8
  • A3=8
  • A4=8
  • A5=8
  • A6=8
  • CLK=8
  • DI1=8
  • MC31=7
  • O6=1
  • WE=8
NULLMUX
  • 0=1
  • OUT=1
PAD
  • PAD=59
PLL_ADV
  • CLKFBIN=1
  • CLKFBOUT=1
  • CLKIN1=1
  • CLKOUT1=1
  • LOCKED=1
  • RST=1
PLL_ADV_PLL_ADV
  • CLKFBIN=1
  • CLKFBOUT=1
  • CLKIN1=1
  • CLKOUT1=1
  • LOCKED=1
  • RST=1
REG_SR
  • CK=235
  • D=235
  • Q=235
  • SR=222
SLICEL
  • A1=12
  • A2=12
  • A3=12
  • A4=12
  • A5=66
  • A6=66
  • AMUX=54
  • B1=6
  • B2=6
  • B3=18
  • B4=18
  • B5=72
  • B6=72
  • BMUX=48
  • BQ=6
  • C1=6
  • C2=6
  • C3=12
  • C4=12
  • C5=60
  • C6=60
  • CIN=72
  • CLK=12
  • CMUX=48
  • COUT=72
  • CQ=6
  • D=1
  • D3=1
  • D4=7
  • D5=43
  • D6=55
  • DMUX=48
  • SR=12
SLICEM
  • A1=2
  • A2=2
  • A3=2
  • A4=2
  • A5=2
  • A6=2
  • AQ=1
  • B1=2
  • B2=2
  • B3=2
  • B4=2
  • B5=2
  • B6=2
  • C1=2
  • C2=2
  • C3=2
  • C4=2
  • C5=2
  • C6=2
  • CE=2
  • CLK=2
  • D1=2
  • D2=2
  • D3=2
  • D4=2
  • D5=2
  • D6=2
  • DMUX=1
  • DX=2
SLICEX
  • A=15
  • A1=7
  • A2=7
  • A3=63
  • A4=64
  • A5=67
  • A6=68
  • AMUX=11
  • AQ=78
  • AX=24
  • B=4
  • B1=1
  • B2=2
  • B3=51
  • B4=51
  • B5=51
  • B6=53
  • BMUX=2
  • BQ=49
  • C3=48
  • C4=48
  • C5=48
  • C6=48
  • CLK=91
  • CQ=49
  • CX=1
  • D=9
  • D1=4
  • D2=4
  • D3=47
  • D4=47
  • D5=47
  • D6=48
  • DMUX=4
  • DQ=46
  • DX=5
  • SR=82
 
Tool Usage
Command Line History
  • xst -intstyle ise -ifn <ise_file>
  • ngdbuild -intstyle ise -dd _ngo -nt timestamp -uc <fname>.ucf -p xc6slx45t-fgg484-3 <fname>.ngc <fname>.ngd
  • map -intstyle ise -p xc6slx45t-fgg484-3 -w -logic_opt off -ol high -t 1 -xt 0 -register_duplication off -r 4 -global_opt off -mt off -ir off -pr off -lc off -power off -o <fname>.ncd <fname>.ngd <fname>.pcf
  • par -w -intstyle ise -ol high -mt off <fname>.ncd <fname>.ncd <fname>.pcf
  • trce -intstyle ise -v 3 -s 3 -n 3 -fastpaths -xml <fname>.twx <fname>.ncd -o <fname>.twr <fname>.pcf
  • bitgen -intstyle ise -f <fname>.ut <fname>.ncd
  • xst -intstyle ise -ifn <ise_file>
  • xst -intstyle ise -ifn <ise_file>
  • ngdbuild -intstyle ise -dd _ngo -nt timestamp -uc <fname>.ucf -p xc6slx45t-fgg484-3 <fname>.ngc <fname>.ngd
  • map -intstyle ise -p xc6slx45t-fgg484-3 -w -logic_opt off -ol high -t 1 -xt 0 -register_duplication off -r 4 -global_opt off -mt off -ir off -pr off -lc off -power off -o <fname>.ncd <fname>.ngd <fname>.pcf
  • par -w -intstyle ise -ol high -mt off <fname>.ncd <fname>.ncd <fname>.pcf
  • trce -intstyle ise -v 3 -s 3 -n 3 -fastpaths -xml <fname>.twx <fname>.ncd -o <fname>.twr <fname>.pcf
  • bitgen -intstyle ise -f <fname>.ut <fname>.ncd
  • bitgen -intstyle ise -f <fname>.ut <fname>.ncd
  • xst -intstyle ise -ifn <ise_file>
  • ngdbuild -intstyle ise -dd _ngo -nt timestamp -uc <fname>.ucf -p xc6slx45t-fgg484-3 <fname>.ngc <fname>.ngd
  • map -intstyle ise -p xc6slx45t-fgg484-3 -w -logic_opt off -ol high -t 1 -xt 0 -register_duplication off -r 4 -global_opt off -mt off -ir off -pr off -lc off -power off -o <fname>.ncd <fname>.ngd <fname>.pcf
  • par -w -intstyle ise -ol high -mt off <fname>.ncd <fname>.ncd <fname>.pcf
  • trce -intstyle ise -v 3 -s 3 -n 3 -fastpaths -xml <fname>.twx <fname>.ncd -o <fname>.twr <fname>.pcf
  • bitgen -intstyle ise -f <fname>.ut <fname>.ncd
  • bitgen -intstyle ise -f <fname>.ut <fname>.ncd
 
Software Quality
Run Statistics
Program NameRuns StartedRuns FinishedErrorsFatal ErrorsInternal ErrorsExceptionsCore Dumps
_impact 130 124 0 0 0 0 0
bitgen 99 95 0 0 0 0 0
compxlib 2 2 0 0 0 0 0
map 99 89 0 0 0 0 0
netgen 3 3 0 0 0 0 0
ngc2edif 1 1 0 0 0 0 0
ngdbuild 106 106 0 0 0 0 0
par 89 89 0 0 0 0 0
trce 83 83 0 0 0 0 0
xst 758 746 0 0 0 0 0
 
Project Statistics
PROP_Enable_Message_Filtering=false PROP_FitterReportFormat=HTML
PROP_LastAppliedGoal=Balanced PROP_LastAppliedStrategy=Xilinx Default (unlocked)
PROP_ManualCompileOrderImp=false PROP_PropSpecInProjFile=Store all values
PROP_SelectedInstanceHierarchicalPath=/trigger_top_tb PROP_Simulator=Modelsim-SE VHDL
PROP_SynthTopFile=changed PROP_Top_Level_Module_Type=HDL
PROP_UseSmartGuide=false PROP_UserConstraintEditorPreference=Text Editor
PROP_intProjectCreationTimestamp=2012-10-08T16:26:30 PROP_intWbtProjectID=EF41633B9B530BE50A9AA6E385725EA0
PROP_intWbtProjectIteration=3 PROP_intWorkingDirLocWRTProjDir=Same
PROP_intWorkingDirUsed=No PROP_selectedSimRootSourceNode_behav=work.trigger_top_tb
PROP_xilxBitgCfg_GenOpt_ASCIIFile=true PROP_xilxBitgCfg_PlaceMultiBoot_spartan6=true
PROP_xilxBitgCfg_Rate_spartan6=10 PROP_xilxBitgCfg_Unused=Pull Up
PROP_AutoTop=true PROP_DevFamily=Spartan6
PROP_xilxBitgCfg_MultiBootStartAddress_spartan6=0x00100000 PROP_xilxBitgCfg_MultiBootStartingAddrForGoldenConfig_spartan6=0x00200000
PROP_xilxBitgCfg_MultiBootUseNewMode_spartan6=false PROP_DevDevice=xc6slx45t
PROP_DevFamilyPMName=spartan6 PROP_DevPackage=fgg484
PROP_Synthesis_Tool=XST (VHDL/Verilog) PROP_DevSpeed=-3
PROP_PreferredLanguage=VHDL FILE_UCF=1
FILE_VHDL=7
 
Unisim Statistics
XST_UNISIM_SUMMARY
XST_NUM_BUFG=1 XST_NUM_IBUFGDS=1
NGDBUILD_PRE_UNISIM_SUMMARY
NGDBUILD_NUM_BUFG=4 NGDBUILD_NUM_FD=12 NGDBUILD_NUM_FDE=1 NGDBUILD_NUM_FDR=236
NGDBUILD_NUM_GND=1 NGDBUILD_NUM_IBUF=18 NGDBUILD_NUM_IBUFGDS=1 NGDBUILD_NUM_INV=20
NGDBUILD_NUM_LUT1=192 NGDBUILD_NUM_LUT2=19 NGDBUILD_NUM_LUT3=42 NGDBUILD_NUM_LUT4=216
NGDBUILD_NUM_LUT5=30 NGDBUILD_NUM_MUXCY=354 NGDBUILD_NUM_OBUF=39 NGDBUILD_NUM_SRLC32E=8
NGDBUILD_NUM_VCC=1 NGDBUILD_NUM_XORCY=192
NGDBUILD_POST_UNISIM_SUMMARY
NGDBUILD_NUM_BUFG=4 NGDBUILD_NUM_FD=12 NGDBUILD_NUM_FDE=1 NGDBUILD_NUM_FDR=236
NGDBUILD_NUM_GND=1 NGDBUILD_NUM_IBUF=18 NGDBUILD_NUM_IBUFGDS=1 NGDBUILD_NUM_INV=20
NGDBUILD_NUM_LUT1=192 NGDBUILD_NUM_LUT2=19 NGDBUILD_NUM_LUT3=42 NGDBUILD_NUM_LUT4=216
NGDBUILD_NUM_LUT5=30 NGDBUILD_NUM_MUXCY=354 NGDBUILD_NUM_OBUF=39 NGDBUILD_NUM_PLL_ADV=1
NGDBUILD_NUM_SRLC32E=8 NGDBUILD_NUM_VCC=1 NGDBUILD_NUM_XORCY=192
 
XST Command Line Options
XST_OPTION_SUMMARY
-ifn=<fname>.prj -ofn=<design_top> -ofmt=NGC -p=xc6slx45t-3-fgg484
-top=<design_top> -opt_mode=Speed -opt_level=1 -power=NO
-iuc=NO -keep_hierarchy=No -netlist_hierarchy=As_Optimized -rtlview=Yes
-glob_opt=AllClockNets -read_cores=YES -write_timing_constraints=NO -cross_clock_analysis=NO
-bus_delimiter=<> -slice_utilization_ratio=100 -bram_utilization_ratio=100 -dsp_utilization_ratio=100
-reduce_control_sets=Auto -fsm_extract=YES -fsm_encoding=Auto -safe_implementation=No
-fsm_style=LUT -ram_extract=Yes -ram_style=Auto -rom_extract=Yes
-shreg_extract=YES -rom_style=Auto -auto_bram_packing=NO -resource_sharing=YES
-async_to_sync=NO -use_dsp48=Auto -iobuf=YES -max_fanout=100000
-bufg=16 -register_duplication=YES -register_balancing=No -optimize_primitives=NO
-use_clock_enable=Auto -use_sync_set=Auto -use_sync_reset=Auto -iob=Auto
-equivalent_register_removal=YES -slice_utilization_ratio_maxmargin=5