Commit 096c8c58 authored by Theodor-Adrian Stana's avatar Theodor-Adrian Stana

working on pts hwguide

parent b2a72e79
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......@@ -75,33 +75,49 @@ SysMon & (ELMA) System Monitor \\
%======================================================================================
\section{Introduction}
\label{sec:intro}
Production Test Suite (PTS) is the environment designed for the functionality tests of
boards at the manufacturing site, right after production. It assures that boards comply
with a minimum set of quality rules in terms of soldering, mounting and PCB fabrication
process.
This document presents a high-level view of the firmware implemented on the FPGA for the
Production Test Suite (PTS) project for the CONV-TTL-BLO board. More involved details can
be found by consulting the PTS HDL, which can be obtained by cloning the OHWR git repository
for the CONV-TTL-BLO PTS project \textcolor{red}{REFERENCE}.
PTS project for the CONV-TTL-BLO board. More involved details can be found by consulting
the PTS HDL, which can be obtained by cloning the OHWR git repository for the CONV-TTL-BLO
PTS project \textcolor{red}{REFERENCE}.
%------------------------------------------------------------------------------
% SUBSEC: Additional docs
%------------------------------------------------------------------------------
\subsection*{Additional documentation}
\textcolor{red}{REFERENCE THE OTHER DOCUMENTS}
\textcolor{red}{\textbf{!!!}}
%======================================================================================
% SEC: Memory map
% SEC: PTS system
%======================================================================================
\section{PTS system}
\label{sec:pts-sys}
The PTS system is contained within a rack containing an ELMA crate, the laptop with the
PTS software installed on it and all other accessories necessary for running tests. More
information about the PTS system can be found in \cite{ctb-ug}.
The PTS system (Figure~\ref{fig:pts-sys}) is contained within a rack containing an ELMA
crate, the laptop with the PTS software installed on it and all other accessories necessary
for running tests. More information about the PTS system can be found in \cite{ctb-ug}.
\begin{figure}[h]
\centerline{\includegraphics[width=\textwidth]{fig/pts-sys}}
\caption{PTS System}
\label{fig:pts-sys}
\end{figure}
The ELMA crate within the PTS contains a system monitor (SysMon) board that monitors
voltage levels, temperatures and controls fan speeds for the crate fans. The crate
can be accessed via SNMP to send commands to the VME boards inside the crate.
This is relevant in the case of the PTS system in that the CONV-TTL-BLO board can be
accessed through the serial (I$^2$C) interface on the VME P1 connector. The PTS software on the
PTS laptop connects to the crate through \textit{telnet} and sends \textit{readreg} and
\textit{writereg} commands to the crate; the commands are translated by the SysMon to
I$^2$C transfers to the CONV-TTL-BLO. More information about this can be found in
\cite{ctb-ug} and \cite{sysmon-i2c}.
can be accessed via Telnet to send commands to the VME boards inside the crate.
Using these commands, the CONV-TTL-BLO board can be accessed through the serial
(I$^2$C) interface on the VME P1 connector. The PTS software on the PTS laptop connects
to the crate through Telnet and sends \textit{readreg} and \textit{writereg}
commands to the crate; the commands are translated by the SysMon to I$^2$C transfers
to the CONV-TTL-BLO. More information about this can be found in \cite{ctb-ug} and
\cite{sysmon-i2c}.
%======================================================================================
% SEC: Memory map
......
FILE=hw-pts-conv-ttl-blo
all:
pdflatex -synctex=1 -interaction=nonstopmode $(FILE).tex *.tex
bibtex $(FILE).aux
pdflatex -synctex=1 -interaction=nonstopmode $(FILE).tex *.tex
pdflatex -synctex=1 -interaction=nonstopmode $(FILE).tex *.tex
evince $(FILE).pdf &
clean:
rm -rf *.aux *.dvi *.log $(FILE).pdf *.lof *.lot *.out *.toc *.bbl *.blg *.gz
\begin{titlepage}
\vspace*{3cm}
%---------------------------------------------------------------
% name
%---------------------------------------------------------------
\noindent{\LARGE \textbf{CONV-TTL-BLO PTS Hardware Guide}}
\noindent \rule{\textwidth}{.1cm}
\hfill\today
\vspace*{3cm}
\begin{figure}[h]
\includegraphics[height=3cm]{fig/cern-logo}
\hfill
\includegraphics[height=3cm]{fig/ohwr-logo}
\end{figure}
\vfill
%---------------------------------------------------------------
% name
%---------------------------------------------------------------
\noindent {\Large \textbf{Theodor-Adrian Stana (CERN/BE-CO-HT)}}
\noindent \rule{\textwidth}{.05cm}
\end{titlepage}
@misc{onewire,
author = {Iztok Jeras},
title = {{sockit\_owm, 1-wire (onewire) master}},
year = 2011,
note = {\url{http://opencores.org/websvn,filedetails?repname=sockit_owm&path=%2Fsockit_owm%2Ftrunk%2Fdoc%2Fsockit_owr.pdf}}
}
@misc{spi,
author = {Simon Srot},
title = {{SPI Master Core Specification}},
year = 2004,
note = {\url{http://opencores.org/websvn,filedetails?repname=spi&path=%2Fspi%2Ftrunk%2Fdoc%2Fspi.pdf}}
}
@misc{i2c-master,
author = {Richard Herveille},
title = {{I$2$C Master Core Specification}},
year = 2003,
note = {\url{http://opencores.org/websvn,filedetails?repname=i2c&path=%2Fi2c%2Ftrunk%2Fdoc%2Fi2c_specs.pdf}}
}
@misc{coding-guidelines,
author = "Patrick Loschmidt and Nata{\v s}a Simani\'c and C\'esar Prados and Pablo Alvarez and Javier Serrano",
title = {{Guidelines for VHDL Coding}},
month = 04,
year = 2011,
note = {\url{http://www.ohwr.org/documents/24}}
}
@misc{ctb-ug,
author = "Theodor-Adrian Stana",
title = {{CONV-TTL-BLO User Guide}},
day = 25,
month = 06,
year = 2013,
howpublished = {\url{http://www.ohwr.org/documents/263}}
}
@misc{sysmon-i2c,
author = "{ELMA}",
title = {{Access to board data using SNMP and I2C}},
howpublished = {\url{http://www.ohwr.org/documents/227}}
}
%==============================================================================
% Document header
%==============================================================================
\documentclass[a4paper,11pt]{article}
\usepackage[pdfborder= 0 0 0 1]{hyperref}
\usepackage{graphicx}
\usepackage{multirow}
\usepackage{color}
\usepackage[toc,page]{appendix}
% Header and footer customization
\usepackage{fancyhdr}
\setlength{\headheight}{15.2pt}
\pagestyle{fancy}
\fancyhead[L]{\nouppercase{\leftmark}}
\fancyhead[R]{}
\renewcommand{\footrulewidth}{0.4pt}
%==============================================================================
% Start of document
%==============================================================================
\begin{document}
%------------------------------------------------------------------------------
% Title
%------------------------------------------------------------------------------
\include{cern-title}
%------------------------------------------------------------------------------
% Revision history
%------------------------------------------------------------------------------
\thispagestyle{empty}
\section*{Revision history}
\centerline
{
\begin{tabular}{l c p{.6\textwidth}}
\hline
\multicolumn{1}{c}{\textbf{Date}} & \multicolumn{1}{c}{\textbf{Version}} & \multicolumn{1}{c}{\textbf{Change}} \\
\hline
28-06-2013 & 0.1 & First draft \\
\hline
\end{tabular}
}
\pagebreak
\pagenumbering{roman}
\setcounter{page}{1}
\tableofcontents
%------------------------------------------------------------------------------
% List of figs, tables, abbrevs
%------------------------------------------------------------------------------
\pagebreak
\listoffigures
\listoftables
\section*{List of Abbreviations}
\begin{tabular}{l l}
PTS & Production Test Suite \\
\end{tabular}
\pagebreak
\pagenumbering{arabic}
\setcounter{page}{1}
%==============================================================================
% SEC: Intro
%==============================================================================
\section{Introduction}
\label{sec:intro}
Production Test Suite (PTS) is the environment designed for the functionality tests of
boards at the manufacturing site, right after production. It assures that boards comply
with a minimum set of quality rules in terms of soldering, mounting and PCB fabrication
process.
This document contains information about the hardware of the CONV-TTL-BLO PTS.
%------------------------------------------------------------------------------
% SUBSEC: Additional docs
%------------------------------------------------------------------------------
\subsection*{Additional documentation}
\textcolor{red}{\textbf{!!!}}
%======================================================================================
% SEC: PTS system
%======================================================================================
\section{PTS system}
\label{sec:pts-sys}
The PTS system (Figure~\ref{fig:pts-sys}) is contained within a rack containing an ELMA
crate, the laptop with the PTS software installed on it and all other accessories necessary
for running tests. More information about the PTS system can be found in \cite{ctb-ug}.
\begin{figure}[h]
\centerline{\includegraphics[width=\textwidth]{fig/pts-sys}}
\caption{PTS System}
\label{fig:pts-sys}
\end{figure}
The ELMA crate within the PTS contains a system monitor (SysMon) board that monitors
voltage levels, temperatures and controls fan speeds for the crate fans. The crate
can be accessed via Telnet to send commands to the VME boards inside the crate.
The CONV-TTL-BLO is placed on a VME slot within the ELMA crate; the SysMon will control
it via the I$^2$C lines on the VME P1 connector to run the tests. An RTM Interface
Tester board is placed on the P2 connector in the VME back-plane. This tester board
loops back signals relevant for the blocking pulse and RTM interface test.
%==============================================================================
% Bibliography
%==============================================================================
\pagebreak
\bibliographystyle{ieeetr}
\bibliography{hw-pts-conv-ttl-blo}
\end{document}
\ No newline at end of file
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