Version 2.1 and earlier of the CONV-TTL-BOARD supports continuous pulse repetition, restricting output
pulse width to 1.2us and a maximum repetition frequency of 4.15 kHz.\\
For boards v4 and later\footnote{Note that version 3 of the boards is a prototyping version with only 3 prototypes available. Although the hardware can support higher frequencies, the gateware release will not offer this feature on this version. This is due to these boards do not pffer the FPGA with the possibility of PCB version recognition (hardwaired on V4 boards and later).}, the user is able to select the desired pulse width via a a dip switch as explained in section \cite{sec:switches}. This ability to select between long $1.2\mu s$ pulses and short $250 ns$ pulses means that the board will be able to deliver higher repetition frequencies, but for a limited amount of time. This mode of operation is known as \textbf{Burst mode}. In this mode, the board allows the user to increase repetition frequencies but will start missing pulses once the pre-defined (Embedded in the FPGA) time has ellapsed. Table\cite{table:freq-table} below summaries the frequency ranges available. Figure \cite gives a graph of the supported frequencies in burst mode Vs the amount of time for which repetition is guaranteed. After this time has elapsed the board will start missing some pulses, by lowering its repetition frequency dynamically in order to protect the output circuitry from irreversible damage.
The PCB version is necessary to the operation of the burst mode. Indeed the FPGA reads out the hardware version,
and depending on whether the board is v4 and later or v3 earlier, will enable or disable this functionality accordingly.
The PCB version is provided to the FPGA via a resistor network offering, 4 bits for the version number
and 2 bits for potential revisions. The value is available in the SR register (SR -- see Appendix~\ref{app:conv-regs-sr})
in two bytes.
So for instance a v4.1 board will be given as "01000001", with the Least significant byte LSB providing the revision number,
and the most significant byte MSB providing the version number. Note that the revision number is only 2 bits so the two most significant bits in the corresponding byte are just padding.\\
Note also that PCB identification is not available in boards v3 and earlier, and therefore the HWVERS field in the SR register will read as all zeroes.
