m25p32 module pass all the simulation tests. Moving to onboard check.

23ca8a8f · Carlos Gil Soriano · 514754e8 · 23ca8a8f · 23ca8a8f
Commit 23ca8a8f authored Oct 25, 2012 by Carlos Gil Soriano
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m25p32_top_tb.log hdl/m25p32/test/log/m25p32_top_tb.log +29 -0

m25p32.pdf hdl/spi_master_multifield/doc/m25p32.pdf +8164 -0

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--- a/hdl/m25p32/test/log/m25p32_top_tb.log
+++ b/hdl/m25p32/test/log/m25p32_top_tb.log
+[Test]	[Check]	[OP]	[Stat]								[Message]
+0	 -- 	    	WREN	                                      Start of TX: WREN received
+0	  OK	WRSR	INST	                 WRSR instruction received matches with expected
+0	  OK	WRSR	DATA	                      SR register received matches with expected
+0	 -- 	    	WRDI	                                        End of TX: WRDI received
+1	 -- 	    	WREN	                                      Start of TX: WREN received
+1	  OK	  PP	INST	                   PP instruction received matches with expected
+1	  OK	  PP	ADDR	                          Address received matches with expected
+1	 -- 	    	WRDI	                                        End of TX: WRDI received
+2	 -- 	    	WREN	                                      Start of TX: WREN received
+2	  OK	  SE	INST	                   SE instruction received matches with expected
+2	  OK	  SE	ADDR	                          Address received matches with expected
+2	 -- 	    	WRDI	                                        End of TX: WRDI received
+3	 -- 	    	WREN	                                      Start of TX: WREN received
+3	  OK	  BE	INST	                   BE instruction received matches with expected
+3	 -- 	    	WRDI	                                        End of TX: WRDI received
+4	 -- 	    	WREN	                                      Start of TX: WREN received
+4	  OK	RDSR	INST	                 RDSR instruction received matches with expected
+4	 -- 	    	WRDI	                                        End of TX: WRDI received
+4	  OK	RDSR	READ	                                 SR_m25p32 matches with expected
+5	 -- 	    	WREN	                                      Start of TX: WREN received
+5	  OK	RDID	INST	                 RDID instruction received matches with expected
+5	 -- 	    	WRDI	                                        End of TX: WRDI received
+5	  OK	RDID	READ	                                      RDID matches with expected
+6	 -- 	    	WREN	                                      Start of TX: WREN received
+6	  OK	READ	INST	                 READ instruction received matches with expected
+6	  OK	READ	ADDR	                          Address received matches with expected
+6	 -- 	    	WRDI	                                        End of TX: WRDI received
+6	  OK	READ	READ	                                      READ matches with expected
--- a/hdl/spi_master_multifield/doc/m25p32.pdf
+++ b/hdl/spi_master_multifield/doc/m25p32.pdf