Commit 2b8f54e4 authored by Theodor-Adrian Stana's avatar Theodor-Adrian Stana

Made changes to intro section of ug-conv-ttl-blo

parent 320710bf
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......@@ -30,3 +30,8 @@
title = {{Under the Hood of Flyback SMPS Designs}},
howpublished = {\url{http://focus.ti.com/asia/download/Topic_1_Picard_42pages.pdf}}
}
@misc{white-rabbit,
title = {{White Rabbit}},
howpublished = {\url{http://www.ohwr.org/projects/white-rabbit}}
}
......@@ -73,49 +73,42 @@ BE-CO-HT\\
\section{Introduction}
\label{sec:intro}
CONV-TTL-BLO is a board intended for replicating blocking and TTL pulses, providing six
totally independent replication channels. The shape of the pulses is defined in
Sec.~\ref{sec:pulse-def}. CONV-TTL-BLO works together with two more boards:
CONV-TTL-RTM and CONV-TTL-RTM-BLO (see Table~\ref{tbl:boards}).
CONV-TTL-BLO is a board intended for replicating TTL and blocking pulses. The main
features of the board are:
\begin{itemize}
\item VME64x form-factor
\item Six independent pulse replication channels
\begin{itemize}
\item TTL to TTL
\item TTL to blocking
\item Blocking to TTL
\item Blocking to blocking
\end{itemize}
\item Pulse LEDs for each replication channel
\item Four general-purpose inverter channels
\item SFP connector for White Rabbit \cite{white-rabbit}
\item Can use I$^2$C lines on VME P1 connector for remote monitoring
\item Status LEDs
\end{itemize}
\begin{figure}[h]
\centerline{\includegraphics[width=.75\textwidth]{fig/conv-ttl-blo-bd}}
\caption{Block diagram of the CONV-TTL-BLO board}
\label{fig:conv-ttl-blo-bd}
\centerline{\includegraphics[width=\textwidth, keepaspectratio]{fig/conv-sys-bd}}
\caption{Symplified block diagram of a TTL to blocking conversion system}
\label{fig:conv-sys-bd}
\end{figure}
CONV-TTL-BLO contains all the active circuitry and is connected as a front module
to a VME64x backplane. CONV-TTL-RTM and CONV-TTL-RTM-BLO are both connected to the rear
part of the crate and provide, in the rear panel, the connectivity of the I/O blocking
lines. Every channel offers, in the rear panel, three blocking pulse outputs and one
blocking pulse input.
\begin{table}[h]
\caption{Boards for blocking repetition}
\label{tbl:boards}
\centerline
{
%\begin{turn}{90}
\begin{tabular}{l l p{.37\textwidth}}
\hline
\multicolumn{1}{c}{\textbf{Board}} & \multicolumn{1}{c}{\textbf{Location}} & \multicolumn{1}{c}{\textbf{Panel ports}} \\
\hline
CONV-TTL-BLO & Front & TTL and INV-TTL triggers and outputs, SFP \\
CONV-TTL-RTM & Back & - \\
CONV-TTL-RTM-BLO & Back & blocking pulse inputs and outputs\\
\hline
\end{tabular}
}
%\end{turn}
\end{table}
CONV-TTL-RTM is a motherboard attached to the rear transition module (RTM) of the P2
VME64x connector. It connects CONV-TTL-BLO to CONV-TTL-RTM-BLO and
provides over-voltage protection for all the I/Os of all the channels.
CONV-TTL-RTM-BLO is an RTM piggyback (RTMP) board mounted on CONV-TTL-RTM. It contains all the
LEMO 00 connectors and pulse LEDs provided on the rear panel.
CONV-TTL-BLO is a VME64x front-module that can be used standalone as a TTL or
TTL-BAR pulse repeater using the six replication channels, or as a TTL to TTL-BAR
converter using the four general-purpose inverter channels.
By combining the CONV-TTL-BLO with the CONV-TTL-RTM rear-transition module (RTM) and the associated
CONV-TTL-BLO-RTM piggyback board in the rear part of the VME crate, a flexible six-channel pulse
conversion system can be obtained. Such a system is shown in Fig.~\ref{fig:conv-sys-bd}.
TTL pulses arriving on an input TTL channel are regenerated in the FPGA and sent on the channel's
TTL output, as well as on the three blocking outputs on the RTM. Similarly, blocking
pulses arriving on a blocking input channel are regenerated in the FPGA and replicated
on both the TTL and blocking outputs of the channel.
%======================================================================================
% SEC: Getting started
......@@ -963,6 +956,9 @@ password:USER
%======================================================================================
% Bibliography
%======================================================================================
\pagebreak
\bibliographystyle{ieeetr}
\bibliography{ug-conv-ttl-blo}
......
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