Commit 6f5584ab authored by Denia Bouhired-Ferrag's avatar Denia Bouhired-Ferrag

Added line to last modified table

parent 1b488a25
......@@ -94,6 +94,8 @@ work, see \\
\textbf{Note: this version changes the memory mapping of various modules} \\
30-09-2014 & 3.01 & Added licensing information, made LSR.FRONTINV bits clearer (Appendix~\ref{app:conv-regs-lsr}),
added fallback to golden bitstream as system error (Section~\ref{sec:diag-syserr}) \\
??-01-2017 & 4.00 & FEDERICO EDITS \\
06-02-2017 & 4.00 & Added description of pulse-width select functionality, burst mode frequencies and PCB version read-out\\
\hline
\end{tabular}
}
......@@ -532,7 +534,7 @@ before plugging the board into a crate.
\label{sec:pulse-rep-freq}
Version 2.1 and earlier of the CONV-TTL-BOARD supports continuous pulse repetition, restricting output
pulse width to 1.2us and a maximum repetition frequency of 4.15 kHz.\\
For boards v4 and later\footnote{Note that version 3 of the boards is a prototyping version with only 3 prototypes available. Although the hardware can support higher frequencies, the gateware release will not offer this feature on this version. This is due to these boards do not pffer the FPGA with the possibility of PCB version recognition (hardwaired on V4 boards and later).}, the user is able to select the desired pulse width via a a dip switch as explained in section \cite{sec:switches}. This ability to select between long $1.2 \mu s$ pulses and short $250 ns$ pulses means that the board will be able to deliver higher repetition frequencies, but for a limited amount of time. This mode of operation is known as \textbf{Burst mode}. In this mode, the board allows the user to increase repetition frequencies but will start missing pulses once the pre-defined (Embedded in the FPGA) time has ellapsed. Table\cite{table:freq-table} below summaries the frequency ranges available. Figure \cite gives a graph of the supported frequencies in burst mode Vs the amount of time for which repetition is guaranteed. After this time has elapsed the board will start missing some pulses, by lowering its repetition frequency dynamically in order to protect the output circuitry from irreversible damage.
For boards v4 and later\footnote{Note that version 3 of the boards is a prototyping version with only 3 prototypes available. Although the hardware can support higher frequencies, the gateware release will not offer this feature on this version. This is due to these boards do not pffer the FPGA with the possibility of PCB version recognition (hardwired on V4 boards and later).}, the user is able to select the desired pulse width via a a dip switch as explained in section \cite{sec:switches}. This ability to select between long $1.2 \mu s$ pulses and short $250 ns$ pulses means that the board will be able to deliver higher repetition frequencies, but for a limited amount of time. This mode of operation is known as \textbf{Burst mode}. In this mode, the board allows the user to increase repetition frequencies but will start missing pulses once the pre-defined (Embedded in the FPGA) time has ellapsed. Table\cite{table:freq-table} below summaries the frequency ranges available. Figure \cite gives a graph of the supported frequencies in burst mode Vs the amount of time for which repetition is guaranteed. After this time has elapsed the board will start missing some pulses, by lowering its repetition frequency dynamically in order to protect the output circuitry from irreversible damage.
\begin{table}[h]
\caption{Maximum pulse repetition frequency}
......
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