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Commit b3d8cf93 authored by Theodor-Adrian Stana's avatar Theodor-Adrian Stana
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Add project outputs to PTS RTM tester board folder

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pcb/PTS_P2_Board/Project Logs for PTS_P2_Board/PTS_P2_Board PCB ECO 4-26-2013 10-21-53 AM.LOG 0 → 100644
View file @ b3d8cf93
Change Component DesignItemId : Designator=P2 Old DesignItemId=HARTING_02 01 160 2101 New DesignItemId=HARTING_02 04 160 1101
Change Component Footprint: Designator=P2 Old Footprint=HARTING_02 01 160 2101 New Footprint=HARTING_02 04 160 1101
Added Member To Class: ClassName=PTS_P2_Board Member=Component D1 SMBJ30CA
Added Member To Class: ClassName=PTS_P2_Board Member=Component D2 SMBJ30CA
Added Member To Class: ClassName=PTS_P2_Board Member=Component D3 SMBJ30CA
Added Member To Class: ClassName=PTS_P2_Board Member=Component P2 HAR-BUS 64
Added Member To Class: ClassName=PTS_P2_Board Member=Component R1 51
Added Member To Class: ClassName=PTS_P2_Board Member=Component R2 51
Added Member To Class: ClassName=PTS_P2_Board Member=Component R3 51
Added Member To Class: ClassName=PTS_P2_Board Member=Component R4 51
Added Member To Class: ClassName=PTS_P2_Board Member=Component R5 51
Added Member To Class: ClassName=PTS_P2_Board Member=Component R6 51
Added Member To Class: ClassName=PTS_P2_Board Member=Component R7 51
Added Member To Class: ClassName=PTS_P2_Board Member=Component R8 51
Added Member To Class: ClassName=PTS_P2_Board Member=Component R9 51
pcb/PTS_P2_Board/Project Outputs for PTS_P2_Board/PTS_P2_Board.DRL 0 → 100644
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TT#v 2 s k #v 2 sk #v 2 sk #v 2 sk # 7 8 7 8 7 7 7 8 7 7 7 7 8 7 # 7 8 7 7 7 7  7 7 7 7 7 7 7 7 7 7 7 7 7 7 7 7 7  7 7  7 7 7 7  7 7 7 7  8 8 8  8 7 7 7 8  7 7 8 7 7 8 7 7 7  8 8  8 7 7 8  7 8 7 8 7 7 8 8  8 7  7 7  7 8  7  7 7  8 7 7  7 8 7  7 7  7 8 8  8 7 7 7 7 7 7 8  7 7 7 7 7 8 7 7 7 7 7 8 7 7 7 7 7 7 7 8 7 8  7 8 7 7 7 7  7 7 7 7 7 7 8  7 7 7 7 7 7  7 7 8 7 7  7 7 7 7 7 7 8 7 7 7 7 7 7  7 7 7 8 8  8 7 8  8 8 # 7 8 7 # 7 8 7 7 T
\ No newline at end of file
pcb/PTS_P2_Board/Project Outputs for PTS_P2_Board/PTS_P2_Board.DRR 0 → 100644
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---------------------------------------------------------------------------
NCDrill File Report For: PTS_P2_Board.PcbDoc 26/04/2013 16:13:42
---------------------------------------------------------------------------
Layer Pair : Top Layer to Bottom Layer
ASCII RoundHoles File : PTS_P2_Board.TXT
EIA File : PTS_P2_Board.DRL
Tool Hole Size Hole Type Hole Count Plated Tool Travel
---------------------------------------------------------------------------
T1 0.5mm (19.685mil) Round 10 148.01 mm (5.83 Inch)
T2 1mm (39.37mil) Round 160 485.14 mm (19.10 Inch)
T3 2.8mm (110.236mil) Round 2 88.90 mm (3.50 Inch)
T4 3mm (118.11mil) Round 3 94.00 mm (3.70 Inch)
---------------------------------------------------------------------------
Totals 175 816.05 mm (32.13 Inch)
Total Processing Time (hh:mm:ss) : 00:00:00
pcb/PTS_P2_Board/Project Outputs for PTS_P2_Board/PTS_P2_Board.EXTREP 0 → 100644
View file @ b3d8cf93
------------------------------------------------------------------------------------------
Gerber File Extension Report For: PTS_P2_Board.GBR 26/04/2013 16:12:29
------------------------------------------------------------------------------------------
------------------------------------------------------------------------------------------
Layer Extension Layer Description
------------------------------------------------------------------------------------------
.GTL Top Layer
.GBL Bottom Layer
.GTO Top Overlay
.GTS Top Solder
.GBS Bottom Solder
.GM1 Mechanical 1
------------------------------------------------------------------------------------------
pcb/PTS_P2_Board/Project Outputs for PTS_P2_Board/PTS_P2_Board.GBL 0 → 100644
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pcb/PTS_P2_Board/Project Outputs for PTS_P2_Board/PTS_P2_Board.GBS 0 → 100644
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pcb/PTS_P2_Board/Project Outputs for PTS_P2_Board/PTS_P2_Board.GM1 0 → 100644
View file @ b3d8cf93
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pcb/PTS_P2_Board/Project Outputs for PTS_P2_Board/PTS_P2_Board.GTL 0 → 100644
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pcb/PTS_P2_Board/Project Outputs for PTS_P2_Board/PTS_P2_Board.GTO 0 → 100644
View file @ b3d8cf93
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pcb/PTS_P2_Board/Project Outputs for PTS_P2_Board/PTS_P2_Board.GTS 0 → 100644
View file @ b3d8cf93
%FSLAX25Y25*%
%MOIN*%
G70*
G01*
G75*
G04 Layer_Color=8388736*
%ADD10R,0.08465X0.09055*%
%ADD11R,0.07087X0.04528*%
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%ADD13C,0.01000*%
%ADD14C,0.11811*%
%ADD15C,0.05906*%
%ADD16C,0.13780*%
%ADD17C,0.03937*%
%ADD18C,0.20079*%
%ADD19C,0.00787*%
%ADD20C,0.00984*%
%ADD21R,0.09265X0.09855*%
%ADD22R,0.07887X0.05328*%
%ADD23C,0.12611*%
%ADD24C,0.06706*%
%ADD25C,0.14579*%
%ADD26C,0.04737*%
D21*
X322835Y78150D02*
D03*
Y95079D02*
D03*
X271654Y78150D02*
D03*
Y95079D02*
D03*
X220472Y78150D02*
D03*
Y95079D02*
D03*
X173228D02*
D03*
Y78150D02*
D03*
X118110Y95079D02*
D03*
Y78150D02*
D03*
X70866Y95079D02*
D03*
Y78150D02*
D03*
D22*
X90551Y120276D02*
D03*
Y131693D02*
D03*
X137795Y120276D02*
D03*
Y131693D02*
D03*
X192913Y120276D02*
D03*
Y131693D02*
D03*
X240158D02*
D03*
Y120276D02*
D03*
X291338Y131693D02*
D03*
Y120276D02*
D03*
X342520Y131693D02*
D03*
Y120276D02*
D03*
X90551Y96654D02*
D03*
Y108071D02*
D03*
X137795Y96654D02*
D03*
Y108071D02*
D03*
X192913Y96654D02*
D03*
Y108071D02*
D03*
X240158D02*
D03*
Y96654D02*
D03*
X291338Y108071D02*
D03*
Y96654D02*
D03*
X342520Y108071D02*
D03*
Y96654D02*
D03*
X90551Y73032D02*
D03*
Y84449D02*
D03*
X137795Y73032D02*
D03*
Y84449D02*
D03*
X192913Y73032D02*
D03*
Y84449D02*
D03*
X240158D02*
D03*
Y73032D02*
D03*
X291338Y84449D02*
D03*
Y73032D02*
D03*
X342520Y84449D02*
D03*
Y73032D02*
D03*
D23*
X196850Y157480D02*
D03*
X381890D02*
D03*
X11811D02*
D03*
D24*
X281811Y50906D02*
D03*
X291811D02*
D03*
X301811D02*
D03*
X311811D02*
D03*
X321811D02*
D03*
X331811D02*
D03*
X341811D02*
D03*
X351811D02*
D03*
X201811D02*
D03*
X211811D02*
D03*
X221811D02*
D03*
X231811D02*
D03*
X241811D02*
D03*
X251811D02*
D03*
X261811D02*
D03*
X271811D02*
D03*
X121811D02*
D03*
X131811D02*
D03*
X141811D02*
D03*
X151811D02*
D03*
X161811D02*
D03*
X171811D02*
D03*
X181811D02*
D03*
X191811D02*
D03*
X111811D02*
D03*
X101811D02*
D03*
X91811D02*
D03*
X81811D02*
D03*
X71811D02*
D03*
X61811D02*
D03*
X51811D02*
D03*
X41811D02*
D03*
X281811Y10906D02*
D03*
X291811D02*
D03*
X301811D02*
D03*
X311811D02*
D03*
X321811D02*
D03*
X331811D02*
D03*
X341811D02*
D03*
X351811D02*
D03*
X201811D02*
D03*
X211811D02*
D03*
X221811D02*
D03*
X231811D02*
D03*
X241811D02*
D03*
X251811D02*
D03*
X261811D02*
D03*
X271811D02*
D03*
X121811D02*
D03*
X131811D02*
D03*
X141811D02*
D03*
X151811D02*
D03*
X161811D02*
D03*
X171811D02*
D03*
X181811D02*
D03*
X191811D02*
D03*
X111811D02*
D03*
X101811D02*
D03*
X91811D02*
D03*
X81811D02*
D03*
X71811D02*
D03*
X61811D02*
D03*
X51811D02*
D03*
X41811D02*
D03*
Y40906D02*
D03*
X51811D02*
D03*
X61811D02*
D03*
X71811D02*
D03*
X81811D02*
D03*
X91811D02*
D03*
X101811D02*
D03*
X111811D02*
D03*
X191811D02*
D03*
X181811D02*
D03*
X171811D02*
D03*
X161811D02*
D03*
X151811D02*
D03*
X141811D02*
D03*
X131811D02*
D03*
X121811D02*
D03*
X271811D02*
D03*
X261811D02*
D03*
X251811D02*
D03*
X241811D02*
D03*
X231811D02*
D03*
X221811D02*
D03*
X211811D02*
D03*
X201811D02*
D03*
X351811D02*
D03*
X341811D02*
D03*
X331811D02*
D03*
X321811D02*
D03*
X311811D02*
D03*
X301811D02*
D03*
X291811D02*
D03*
X281811D02*
D03*
X41811Y30906D02*
D03*
X51811D02*
D03*
X61811D02*
D03*
X71811D02*
D03*
X81811D02*
D03*
X91811D02*
D03*
X101811D02*
D03*
X111811D02*
D03*
X191811D02*
D03*
X181811D02*
D03*
X171811D02*
D03*
X161811D02*
D03*
X151811D02*
D03*
X141811D02*
D03*
X131811D02*
D03*
X121811D02*
D03*
X271811D02*
D03*
X261811D02*
D03*
X251811D02*
D03*
X241811D02*
D03*
X231811D02*
D03*
X221811D02*
D03*
X211811D02*
D03*
X201811D02*
D03*
X351811D02*
D03*
X341811D02*
D03*
X331811D02*
D03*
X321811D02*
D03*
X311811D02*
D03*
X301811D02*
D03*
X291811D02*
D03*
X281811D02*
D03*
Y20906D02*
D03*
X291811D02*
D03*
X301811D02*
D03*
X311811D02*
D03*
X321811D02*
D03*
X331811D02*
D03*
X341811D02*
D03*
X351811D02*
D03*
X201811D02*
D03*
X211811D02*
D03*
X221811D02*
D03*
X231811D02*
D03*
X241811D02*
D03*
X251811D02*
D03*
X261811D02*
D03*
X271811D02*
D03*
X121811D02*
D03*
X131811D02*
D03*
X141811D02*
D03*
X151811D02*
D03*
X161811D02*
D03*
X171811D02*
D03*
X181811D02*
D03*
X191811D02*
D03*
X111811D02*
D03*
X101811D02*
D03*
X91811D02*
D03*
X81811D02*
D03*
X71811D02*
D03*
X61811D02*
D03*
X51811D02*
D03*
X41811D02*
D03*
D25*
X371811Y10906D02*
D03*
X21811D02*
D03*
D26*
X257087Y66929D02*
D03*
X311417D02*
D03*
X156693D02*
D03*
X107087D02*
D03*
X322835Y114173D02*
D03*
X271654D02*
D03*
X220473D02*
D03*
X173228D02*
D03*
X118110D02*
D03*
X70866Y113779D02*
D03*
M02*
pcb/PTS_P2_Board/Project Outputs for PTS_P2_Board/PTS_P2_Board.LDP 0 → 100644
View file @ b3d8cf93
Layer Pairs Export File for PCB: \\cern.ch\dfs\Users\t\tstana\Desktop\PTS_P2_Board\PTS_P2_Board.PcbDoc
LayersSetName=Top_Bot_Thru_Holes|DrillFile=pts_p2_board.txt|LayerPairs=gtl,gbl
pcb/PTS_P2_Board/Project Outputs for PTS_P2_Board/PTS_P2_Board.REP 0 → 100644
View file @ b3d8cf93
*************************************************************
FileName = PTS_P2_Board.GBR
AutoAperture = True
*************************************************************
Generating : Top Layer
File : PTS_P2_Board.GTL
Adding Layer : Top Layer
Adding Layer : Multi-Layer
Used DCodes :
D10
D11
D12
D13
D14
D15
D16
D17
*************************************************************
*************************************************************
Generating : Bottom Layer
File : PTS_P2_Board.GBL
Adding Layer : Bottom Layer
Adding Layer : Multi-Layer
Used DCodes :
D12
D13
D14
D15
D17
D18
*************************************************************
*************************************************************
Generating : Top Overlay
File : PTS_P2_Board.GTO
Adding Layer : Top Overlay
Used DCodes :
D13
D19
D20
*************************************************************
*************************************************************
Generating : Top Solder
File : PTS_P2_Board.GTS
Adding Layer : Top Solder
Adding Layer : Top Layer
Adding Layer : Multi-Layer
Used DCodes :
D21
D22
D23
D24
D25
D26
*************************************************************
*************************************************************
Generating : Bottom Solder
File : PTS_P2_Board.GBS
Adding Layer : Bottom Solder
Adding Layer : Bottom Layer
Adding Layer : Multi-Layer
Used DCodes :
D23
D24
D26
D27
*************************************************************
*************************************************************
Generating : Mechanical 1
File : PTS_P2_Board.GM1
Adding Layer : Mechanical 1
Used DCodes :
D19
*************************************************************
pcb/PTS_P2_Board/Project Outputs for PTS_P2_Board/PTS_P2_Board.RUL 0 → 100644
View file @ b3d8cf93
DRC Rules Export File for PCB: \\cern.ch\dfs\Users\t\tstana\Desktop\PTS_P2_Board\PTS_P2_Board.PcbDoc
RuleKind=Width|RuleName=Width_GND|Scope=Board|Minimum=10.00
RuleKind=ShortCircuit|RuleName=ShortCircuit|Scope=Board|Allowed=0
RuleKind=SolderMaskExpansion|RuleName=SolderMaskExpansion|Scope=Board|Minimum=4.00
RuleKind=Width|RuleName=Width_Normal|Scope=Board|Minimum=7.87
RuleKind=Clearance|RuleName=Clearance|Scope=Board|Minimum=5.00
pcb/PTS_P2_Board/Project Outputs for PTS_P2_Board/PTS_P2_Board.TXT 0 → 100644
View file @ b3d8cf93
M48
;Layer_Color=9474304
;FILE_FORMAT=4:2
METRIC,LZ
;TYPE=PLATED
T1F00S00C0.50
T2F00S00C1.00
T3F00S00C2.80
T4F00S00C3.00
%
T01
X0018Y00289
X003Y0029
X0044
X0056
X00398Y0017
X00272
X00653
X00791
X0082Y0029
X0069
T02
X005888Y000277
X006142
X006396
X00665
X006904
X007158
X007412
X007666
X00792
X008174
X008428
X008682
X008936
X005634
X00538
X005126
X004872
X004618
X004364
X00411
X003856
X003602
X003348
X003094
X00284
X002586
X002332
X002078
X001824
X00157
X001316
X001062
Y000531
Y000785
Y001039
Y001293
X001316
X00157
X001824
Y001039
X00157
X001316
Y000785
X00157
X001824
Y000531
X00157
X001316
X002078
Y000785
Y001039
Y001293
X002332
X002586
Y001039
X002332
Y000785
X002586
Y000531
X002332
X00284
Y000785
Y001039
Y001293
X003094
X003348
X003602
X003856
Y001039
X003602
X003348
X003094
Y000785
X003348
X003602
X003856
Y000531
X003602
X003348
X003094
X00411
Y000785
Y001039
Y001293
X004364
X004618
X004872
X005126
X00538
X005634
Y001039
X00538
X005126
X004872
X004618
X004364
Y000785
X004618
X004872
X005126
X00538
X005634
Y000531
X00538
X005126
X004872
X004618
X004364
X005888
X006142
Y000785
X005888
Y001039
X006142
Y001293
X005888
X006396
X00665
X006904
X007158
X007412
X007666
X00792
X008174
X008428
Y001039
X008174
X00792
X007666
X007412
X007158
X006904
X00665
X006396
Y000785
X00665
X006904
X007158
X007412
X007666
X00792
X008174
X008428
Y000531
X008174
X00792
X007666
X007412
X007158
X006904
X00665
X006396
X008682
Y000785
Y001039
Y001293
X008936
Y001039
Y000785
Y000531
T03
X009444Y000277
X000554
T04
X0003Y004
X005
X0097
M30
pcb/PTS_P2_Board/Project Outputs for PTS_P2_Board/PTS_P2_Board.apr 0 → 100644
View file @ b3d8cf93
D10 RECTANGULAR 90.551 84.646 0.000 FLASH 90.000
D11 RECTANGULAR 45.276 70.866 0.000 FLASH 270.000
D12 ROUNDED 39.370 39.370 0.000 LINE 0.000
D13 ROUNDED 10.000 10.000 0.000 LINE 0.000
D14 ROUNDED 118.110 118.110 0.000 FLASH 0.000
D15 ROUNDED 59.055 59.055 0.000 FLASH 0.000
D16 ROUNDED 137.795 137.795 0.000 FLASH 0.000
D17 ROUNDED 39.370 39.370 0.000 FLASH 0.000
D18 ROUNDED 200.787 200.787 0.000 FLASH 0.000
D19 ROUNDED 7.874 7.874 0.000 LINE 0.000
D20 ROUNDED 9.842 9.842 0.000 LINE 0.000
D21 RECTANGULAR 98.551 92.646 0.000 FLASH 90.000
D22 RECTANGULAR 53.276 78.866 0.000 FLASH 270.000
D23 ROUNDED 126.110 126.110 0.000 FLASH 0.000
D24 ROUNDED 67.055 67.055 0.000 FLASH 0.000
D25 ROUNDED 145.795 145.795 0.000 FLASH 0.000
D26 ROUNDED 47.370 47.370 0.000 FLASH 0.000
D27 ROUNDED 208.787 208.787 0.000 FLASH 0.000
pcb/PTS_P2_Board/Project Outputs for PTS_P2_Board/Status Report.Txt 0 → 100644
View file @ b3d8cf93
Output: NC Drill Files
Type : NC Drill
From : Project [PTS_P2_Board.PrjPCB]
Generated File[PTS_P2_Board.TXT]
Generated File[PTS_P2_Board.DRL]
Generated File[PTS_P2_Board.LDP]
Generated File[PTS_P2_Board.DRR]
Files Generated : 4
Documents Printed : 0
Finished Output Generation At 16:13:42 On 26/04/2013
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