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ceebd503
Commit
ceebd503
authored
Sep 30, 2012
by
gilsoriano
Browse files
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Plain Diff
Core passes all the write operations. Reads to be checked.
parent
35ae1a29
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7 changed files
with
561 additions
and
98 deletions
+561
-98
wave.do
hdl/m25p32/project/waveform/wave.do
+69
-58
m25p32_core.vhd
hdl/m25p32/rtl/m25p32_core.vhd
+15
-1
m25p32_pkg.vhd
hdl/m25p32/rtl/m25p32_pkg.vhd
+4
-4
m25p32_top.vhd
hdl/m25p32/rtl/m25p32_top.vhd
+33
-0
m25p32_top_tb.vhd
hdl/m25p32/test/m25p32_top_tb.vhd
+421
-33
m25p32_top_tb_pkg.vhd
hdl/m25p32/test/m25p32_top_tb_pkg.vhd
+9
-0
spi_analyser.vhd
hdl/spi_master_multifield/test/spi_analyser.vhd
+10
-2
No files found.
hdl/m25p32/project/waveform/wave.do
View file @
ceebd503
This diff is collapsed.
Click to expand it.
hdl/m25p32/rtl/m25p32_core.vhd
View file @
ceebd503
...
@@ -41,6 +41,8 @@ use IEEE.NUMERIC_STD.ALL;
...
@@ -41,6 +41,8 @@ use IEEE.NUMERIC_STD.ALL;
use
work
.
m25p32_pkg
.
ALL
;
use
work
.
m25p32_pkg
.
ALL
;
use
work
.
spi_master_pkg
.
ALL
;
use
work
.
spi_master_pkg
.
ALL
;
entity
m25p32_core
is
entity
m25p32_core
is
generic
(
g_INST_LENGTH
:
NATURAL
:
=
c_INST_LENGTH
;
generic
(
g_INST_LENGTH
:
NATURAL
:
=
c_INST_LENGTH
;
g_ADDR_LENGTH
:
NATURAL
:
=
c_ADDR_LENGTH
;
g_ADDR_LENGTH
:
NATURAL
:
=
c_ADDR_LENGTH
;
...
@@ -59,6 +61,11 @@ entity m25p32_core is
...
@@ -59,6 +61,11 @@ entity m25p32_core is
rd_data_o
:
out
STD_LOGIC_VECTOR
(
g_READ_LENGTH
*
8
-
1
downto
0
);
rd_data_o
:
out
STD_LOGIC_VECTOR
(
g_READ_LENGTH
*
8
-
1
downto
0
);
SR_m25p32_i
:
in
STD_LOGIC_VECTOR
(
r_SR_m25p32
'a_length
-
1
downto
0
);
SR_m25p32_i
:
in
STD_LOGIC_VECTOR
(
r_SR_m25p32
'a_length
-
1
downto
0
);
SPI0_o
:
out
r_SPI0
;
SPI1_o
:
out
r_SPI1
;
SPI2_o
:
out
r_SPI2
;
SPI3_o
:
out
r_SPI3
;
OP_o
:
out
STD_LOGIC_VECTOR
(
r_OP
'a_length
-
1
downto
0
);
OP_o
:
out
STD_LOGIC_VECTOR
(
r_OP
'a_length
-
1
downto
0
);
FMI_i
:
in
STD_LOGIC_VECTOR
(
r_FMI
'a_length
-
1
downto
0
)
FMI_i
:
in
STD_LOGIC_VECTOR
(
r_FMI
'a_length
-
1
downto
0
)
);
);
...
@@ -114,6 +121,11 @@ begin
...
@@ -114,6 +121,11 @@ begin
s_SPI2
<=
f_SPI2
(
s_SPI2_slv
);
s_SPI2
<=
f_SPI2
(
s_SPI2_slv
);
s_SPI3
<=
f_SPI3
(
s_SPI3_slv
);
s_SPI3
<=
f_SPI3
(
s_SPI3_slv
);
SPI0_o
<=
s_SPI0
;
SPI1_o
<=
s_SPI1
;
SPI2_o
<=
s_SPI2
;
SPI3_o
<=
s_SPI3
;
s_wr_data_i
<=
f_page
(
wr_data_i
);
s_wr_data_i
<=
f_page
(
wr_data_i
);
inst_spi_master_core
:
spi_master_core
inst_spi_master_core
:
spi_master_core
...
@@ -344,7 +356,7 @@ begin
...
@@ -344,7 +356,7 @@ begin
--! operation.
--! operation.
when
S2_SPI_INST
=>
when
S2_SPI_INST
=>
if
s_SPI2
.
SENT_OP
=
'1'
then
if
s_SPI2
.
SENT_OP
=
'1'
then
s_MEM_fsm
<=
Q0_END
;
s_MEM_fsm
<=
S3B_WRDI
;
end
if
;
end
if
;
when
S3B_WRDI
=>
when
S3B_WRDI
=>
s_MEM_fsm
<=
S3_WRDI
;
s_MEM_fsm
<=
S3_WRDI
;
...
@@ -365,3 +377,5 @@ begin
...
@@ -365,3 +377,5 @@ begin
end
process
p_m25p32_fsm
;
end
process
p_m25p32_fsm
;
end
Behavioral
;
end
Behavioral
;
hdl/m25p32/rtl/m25p32_pkg.vhd
View file @
ceebd503
...
@@ -79,7 +79,7 @@ package m25p32_pkg is
...
@@ -79,7 +79,7 @@ package m25p32_pkg is
constant
c_BYTES_PER_PAGE_BITS
:
NATURAL
:
=
8
;
constant
c_BYTES_PER_PAGE_BITS
:
NATURAL
:
=
8
;
constant
c_WORDS_PER_PAGE_BITS
:
NATURAL
:
=
c_BYTES_PER_PAGE_BITS
-
2
;
constant
c_WORDS_PER_PAGE_BITS
:
NATURAL
:
=
c_BYTES_PER_PAGE_BITS
-
2
;
constant
c_PAGE_SIZE
:
NATURAL
:
=
2
56
;
--! Bytes in a page
constant
c_PAGE_SIZE
:
NATURAL
:
=
2
**
c_BYTES_PER_PAGE_BITS
;
--! The four constant below autoadjust to user modifications
--! The four constant below autoadjust to user modifications
constant
c_M25P32_ADDR_SIZE
:
NATURAL
:
=
3
;
constant
c_M25P32_ADDR_SIZE
:
NATURAL
:
=
3
;
...
@@ -416,7 +416,7 @@ package m25p32_pkg is
...
@@ -416,7 +416,7 @@ package m25p32_pkg is
BADDR
=>
to_unsigned
(
3
,
9
),
BADDR
=>
to_unsigned
(
3
,
9
),
BINST
=>
to_unsigned
(
1
,
9
));
BINST
=>
to_unsigned
(
1
,
9
));
constant
c_SPI1_PP
:
r_SPI1
:
=
(
PUSH_DATA
=>
'1'
,
PUSH_ADDR
=>
'
0
'
,
constant
c_SPI1_PP
:
r_SPI1
:
=
(
PUSH_DATA
=>
'1'
,
PUSH_ADDR
=>
'
1
'
,
PUSH_INST
=>
'1'
,
x
=>
(
others
=>
'0'
),
PUSH_INST
=>
'1'
,
x
=>
(
others
=>
'0'
),
READ_MISO
=>
'0'
,
READ_MISO
=>
'0'
,
SEND_DATA
=>
'1'
,
SEND_DATA
=>
'1'
,
...
@@ -591,8 +591,8 @@ package body m25p32_pkg is
...
@@ -591,8 +591,8 @@ package body m25p32_pkg is
function
f_STD_LOGIC_VECTOR
(
r_register
:
r_OP
)
return
STD_LOGIC_VECTOR
is
function
f_STD_LOGIC_VECTOR
(
r_register
:
r_OP
)
return
STD_LOGIC_VECTOR
is
begin
begin
return
r_register
.
OP
A
return
r_register
.
OP
F
&
r_register
.
OP
F
;
&
r_register
.
OP
A
;
end
f_STD_LOGIC_VECTOR
;
end
f_STD_LOGIC_VECTOR
;
function
f_OP
(
r_register
:
STD_LOGIC_VECTOR
(
1
downto
0
))
return
r_OP
is
function
f_OP
(
r_register
:
STD_LOGIC_VECTOR
(
1
downto
0
))
return
r_OP
is
...
...
hdl/m25p32/rtl/m25p32_top.vhd
View file @
ceebd503
...
@@ -39,6 +39,7 @@ use IEEE.STD_LOGIC_1164.ALL;
...
@@ -39,6 +39,7 @@ use IEEE.STD_LOGIC_1164.ALL;
use
work
.
m25p32_pkg
.
ALL
;
use
work
.
m25p32_pkg
.
ALL
;
use
work
.
spi_master_pkg
.
ALL
;
use
work
.
spi_master_pkg
.
ALL
;
entity
m25p32_top
is
entity
m25p32_top
is
generic
(
generic
(
g_WB_ADDR_LENGTH
:
NATURAL
:
=
c_WORDS_PER_PAGE_BITS
+
1
);
g_WB_ADDR_LENGTH
:
NATURAL
:
=
c_WORDS_PER_PAGE_BITS
+
1
);
...
@@ -57,6 +58,13 @@ entity m25p32_top is
...
@@ -57,6 +58,13 @@ entity m25p32_top is
wb_rty_o
:
out
STD_LOGIC
;
wb_rty_o
:
out
STD_LOGIC
;
wb_err_o
:
out
STD_LOGIC
;
wb_err_o
:
out
STD_LOGIC
;
SPI0_o
:
out
r_SPI0
;
SPI1_o
:
out
r_SPI1
;
SPI2_o
:
out
r_SPI2
;
SPI3_o
:
out
r_SPI3
;
op_finished_o
:
out
STD_LOGIC
;
prom_mosi_o
:
out
STD_LOGIC
;
prom_mosi_o
:
out
STD_LOGIC
;
prom_cclk_o
:
out
STD_LOGIC
;
prom_cclk_o
:
out
STD_LOGIC
;
prom_cs0_b_n_o
:
out
STD_LOGIC
;
prom_cs0_b_n_o
:
out
STD_LOGIC
;
...
@@ -73,6 +81,12 @@ architecture Behavioral of m25p32_top is
...
@@ -73,6 +81,12 @@ architecture Behavioral of m25p32_top is
signal
s_OP
:
STD_LOGIC_VECTOR
(
r_OP
'a_length
-
1
downto
0
);
signal
s_OP
:
STD_LOGIC_VECTOR
(
r_OP
'a_length
-
1
downto
0
);
signal
s_FMI
:
STD_LOGIC_VECTOR
(
r_FMI
'a_length
-
1
downto
0
);
signal
s_FMI
:
STD_LOGIC_VECTOR
(
r_FMI
'a_length
-
1
downto
0
);
signal
s_SPI0
:
r_SPI0
;
signal
s_SPI1
:
r_SPI1
;
signal
s_SPI2
:
r_SPI2
;
signal
s_SPI3
:
r_SPI3
;
component
m25p32_core
is
component
m25p32_core
is
generic
(
generic
(
g_INST_LENGTH
:
NATURAL
:
=
c_INST_LENGTH
;
g_INST_LENGTH
:
NATURAL
:
=
c_INST_LENGTH
;
...
@@ -92,6 +106,13 @@ architecture Behavioral of m25p32_top is
...
@@ -92,6 +106,13 @@ architecture Behavioral of m25p32_top is
rd_data_o
:
out
STD_LOGIC_VECTOR
(
g_READ_LENGTH
*
8
-
1
downto
0
);
rd_data_o
:
out
STD_LOGIC_VECTOR
(
g_READ_LENGTH
*
8
-
1
downto
0
);
SR_m25p32_i
:
in
STD_LOGIC_VECTOR
(
r_SR_m25p32
'a_length
-
1
downto
0
);
SR_m25p32_i
:
in
STD_LOGIC_VECTOR
(
r_SR_m25p32
'a_length
-
1
downto
0
);
SPI0_o
:
out
r_SPI0
;
SPI1_o
:
out
r_SPI1
;
SPI2_o
:
out
r_SPI2
;
SPI3_o
:
out
r_SPI3
;
OP_o
:
out
STD_LOGIC_VECTOR
(
r_OP
'a_length
-
1
downto
0
);
OP_o
:
out
STD_LOGIC_VECTOR
(
r_OP
'a_length
-
1
downto
0
);
FMI_i
:
in
STD_LOGIC_VECTOR
(
r_FMI
'a_length
-
1
downto
0
)
FMI_i
:
in
STD_LOGIC_VECTOR
(
r_FMI
'a_length
-
1
downto
0
)
);
);
...
@@ -131,6 +152,12 @@ architecture Behavioral of m25p32_top is
...
@@ -131,6 +152,12 @@ architecture Behavioral of m25p32_top is
begin
begin
op_finished_o
<=
f_OP
(
s_OP
)
.
OPF
;
SPI0_o
<=
s_SPI0
;
SPI1_o
<=
s_SPI1
;
SPI2_o
<=
s_SPI2
;
SPI3_o
<=
s_SPI3
;
inst_m25p32_core
:
m25p32_core
inst_m25p32_core
:
m25p32_core
port
map
(
port
map
(
...
@@ -146,6 +173,10 @@ begin
...
@@ -146,6 +173,10 @@ begin
rd_data_o
=>
s_rd_data
,
rd_data_o
=>
s_rd_data
,
SR_m25p32_i
=>
s_SR_m25p32
,
SR_m25p32_i
=>
s_SR_m25p32
,
SPI0_o
=>
s_SPI0
,
SPI1_o
=>
s_SPI1
,
SPI2_o
=>
s_SPI2
,
SPI3_o
=>
s_SPI3
,
OP_o
=>
s_OP
,
OP_o
=>
s_OP
,
FMI_i
=>
s_FMI
FMI_i
=>
s_FMI
);
);
...
@@ -175,3 +206,5 @@ begin
...
@@ -175,3 +206,5 @@ begin
);
);
end
Behavioral
;
end
Behavioral
;
hdl/m25p32/test/m25p32_top_tb.vhd
View file @
ceebd503
This diff is collapsed.
Click to expand it.
hdl/m25p32/test/m25p32_top_tb_pkg.vhd
View file @
ceebd503
...
@@ -56,6 +56,15 @@ package m25p32_top_tb_pkg is
...
@@ -56,6 +56,15 @@ package m25p32_top_tb_pkg is
wb_rty_o
:
out
STD_LOGIC
;
wb_rty_o
:
out
STD_LOGIC
;
wb_err_o
:
out
STD_LOGIC
;
wb_err_o
:
out
STD_LOGIC
;
--! These lines are offer in top after vpp (VHDL preprocessor) is
--! run with SIMULATION label on.
SPI0_o
:
out
r_SPI0
;
SPI1_o
:
out
r_SPI1
;
SPI2_o
:
out
r_SPI2
;
SPI3_o
:
out
r_SPI3
;
op_finished_o
:
out
STD_LOGIC
;
prom_mosi_o
:
out
STD_LOGIC
;
prom_mosi_o
:
out
STD_LOGIC
;
prom_cclk_o
:
out
STD_LOGIC
;
prom_cclk_o
:
out
STD_LOGIC
;
prom_cs0_b_n_o
:
out
STD_LOGIC
;
prom_cs0_b_n_o
:
out
STD_LOGIC
;
...
...
hdl/spi_master_multifield/test/spi_analyser.vhd
View file @
ceebd503
...
@@ -58,6 +58,7 @@ architecture Behavioral of spi_analyser is
...
@@ -58,6 +58,7 @@ architecture Behavioral of spi_analyser is
signal
s_SPI0
:
r_SPI0
;
signal
s_SPI0
:
r_SPI0
;
signal
s_SPI1
:
r_SPI1
;
signal
s_SPI1
:
r_SPI1
;
signal
s_SPI1_tmp
:
r_SPI1
;
signal
s_spi_mosi
:
STD_LOGIC
;
signal
s_spi_mosi
:
STD_LOGIC
;
signal
s_spi_clk
:
STD_LOGIC
;
signal
s_spi_clk
:
STD_LOGIC
;
...
@@ -73,8 +74,6 @@ architecture Behavioral of spi_analyser is
...
@@ -73,8 +74,6 @@ architecture Behavioral of spi_analyser is
begin
begin
s_SPI0
<=
SPI0_i
;
s_SPI1
<=
SPI1_i
;
s_spi_mosi
<=
spi_mosi_o
;
s_spi_mosi
<=
spi_mosi_o
;
s_spi_clk
<=
spi_clk_o
;
s_spi_clk
<=
spi_clk_o
;
...
@@ -87,6 +86,15 @@ begin
...
@@ -87,6 +86,15 @@ begin
end_addr_flag_o
<=
s_end_addr_flag
;
end_addr_flag_o
<=
s_end_addr_flag
;
end_data_flag_o
<=
s_end_data_flag
;
end_data_flag_o
<=
s_end_data_flag
;
s_SPI1_tmp
<=
SPI1_i
;
p_latch
:
process
(
s_SPI1_tmp
.
SEND_OP
)
begin
if
rising_edge
(
s_SPI1_tmp
.
SEND_OP
)
then
s_SPI0
<=
SPI0_i
;
s_SPI1
<=
SPI1_i
;
end
if
;
end
process
;
p_spi_analyser
:
process
(
spi_clk_o
,
rst_i
)
p_spi_analyser
:
process
(
spi_clk_o
,
rst_i
)
variable
v_inst_length
:
NATURAL
;
variable
v_inst_length
:
NATURAL
;
...
...
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