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Conv TTL Blocking
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f39b8d2c
Commit
f39b8d2c
authored
Feb 24, 2015
by
Theodor-Adrian Stana
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sw: Added SDBFS folder structure for download to on-board flash
parent
9c367c7f
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--SDB-CONFIG--
software/wr/sdbfs-flash/--SDB-CONFIG--
+27
-0
bitstream
software/wr/sdbfs-flash/bitstream
+0
-0
calibration
software/wr/sdbfs-flash/calibration
+0
-0
mac-address
software/wr/sdbfs-flash/mac-address
+0
-0
sfp-database
software/wr/sdbfs-flash/sfp-database
+0
-0
wr-init
software/wr/sdbfs-flash/wr-init
+0
-0
No files found.
software/wr/sdbfs-flash/--SDB-CONFIG--
0 → 100644
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f39b8d2c
#
# We want to store WRPC parameters but also the FPGA bitstream in the same
# FLASH. That is why our default position for various parameters is right after
# the bitstream.
.
position = 0
# Allocation granularity is 64 bytes
# We start with bitstream file at position 0, later the same set of files as for
# EEPROM image is used.
mac-address
write = 1
maxsize = 6
wr-init
write = 1
maxsize = 256
# each sfp takes 29 bytes, 4 of them fit in 128 bytes
sfp-database
write = 1
maxsize = 128
calibration
write = 1
maxsize = 128
software/wr/sdbfs-flash/bitstream
0 → 100644
View file @
f39b8d2c
software/wr/sdbfs-flash/calibration
0 → 100644
View file @
f39b8d2c
software/wr/sdbfs-flash/mac-address
0 → 100644
View file @
f39b8d2c
software/wr/sdbfs-flash/sfp-database
0 → 100644
View file @
f39b8d2c
software/wr/sdbfs-flash/wr-init
0 → 100644
View file @
f39b8d2c
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