Power line filter to be added
In CONV-TLL-BLO v1 no power supply filters are mounted.
A basic one-stage pi filter will be added in next v2. Differing from previous designs which are using well-proven but discontinued products, this stage will be modified to use easy-to stock and reliable components.
NEED OF FILTERING*
Due to the logic families used in the design, noise in the vicinity of
60MHz to 150MHz was expected. Spectral measurements in the power rails
and FFT null-magnetic tests checked the presence of this noise.
Thus, a filter schema for this band in needed. The following simple solution consisting of a one-stage pi filter is shown below.
SELECTION OF THE FERRITE*
The inductor chosen is BLM41PG181SN1L, which is easy
available from
different suppliers. The datasheet is attached at the bottom of this
issue report. The main characteristics of this chip ferrite bead are:
- Low DCR (max 10mOhm)
- High rated current
- Low Q, centered around 200MHz
For the design of a one-stage pi filter two parameters were targeted for better performance. First, as the board could be using the power rails directly from the VME backplane, small DCR is important. The design idea is having less than 100 mV voltage drop in the ferrite when 3A are running through it, consideration meet in BLM41PG181SN1L. Secondly, the ferrite should be able to supress noise in the band of interest. However, even though BLM41PG181SN1L SRF is not centered in 100MHz, due to the relatively low Q, the noise-supression goal is achieved. BLM41PG181SN1L was the best component in terms of being able to handle these two paramenters.
Normally, in one-stage pi filters, the value of the ferrite it is not specifically expressed in terms of inductance but insertion loss or impedance at a given frequency. Just out of curiosity (and for knowing the simulation values), by graph inspection and taking into account the SRF point:
- resonant frequency = 1 / (2*PI*sqrt(L*C))
- where C is the parasitic capacitance of the package. Typically, for a 1206 package we can assume an approximation of 8 pF.
In that case we can have a rough approximation of the inductance, which yields 0.26 uH, value in accordance with invidual values of inductors in multistage pi filters.
CAPACITORS*
Considering that the filter will be used in 5V and 3V3 rails (the ones
affected by the noise), the rating of the capacitors is not going to be
too demanding. A bigger capacitance capacitor must be placed towards the
board for better voltage stabilization and a lower valued one can be put
towards the backplane. This design decision is due to the fact that
OSCON capacitors are only needed in the most demanding side. Besides,
they are bulky and costly.
In the case of an OSCON capacitor, a value of 150uF is used. ESL should be reduced to further improve the response from the OSCON to the board in the frequencies that are being supressed by the ferrite. Just by placing an extra via in the longest via path (either GND or VCC) the objective will be meet.
A 1206 ceramic capacitor around 22uF should be more than enough as the one that interfaces with the backplane.
SIMULATION*
A schematic document is attached with the simulation of the pi-filter.
Parasitics have been added, as well as a parametric sweep in the load.
The filter simulates correctly in the band of interest.