Commit 3173b753 authored by Denia Bouhired-Ferrag's avatar Denia Bouhired-Ferrag

DOC: wip unfinished modifications of gateware guide

parent 4d40bcc3
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......@@ -268,6 +268,21 @@ OSWR (see Appendix~\ref{app:memmap}), as shown in Figure~\ref{fig:switches}.
\caption{\label{fig:switches} Switch input logic}
\end{figure}
%==============================================================================
% SEC: PCB Version
%==============================================================================
\subsection{PCB Version}
\label{sec:pcb-ver}
CONV-TTL-RS485 boards from version 4 onwards, offer the possibility for the FPGA to receive
information on the hardware version. This information is hardwired on the board in the form of
pulled-up or pulled-down resistors for each of the 6 lines~\cite{conv-ttl-RS485-hwguide}
(4 bits for the PCB version number, and 2 bits for the execution).
The PCB version is stored as 6 bits inside the Status Register of the memory map~\ref{app:memmap} for diagnotics.
Since the hardware version is not available on older boards and since the I/O pins now assigned to it were by default pulled-
down, boards v3 and earlier will show the PCB version as 000000.
%==============================================================================
\pagebreak
\section{Output logic}
......@@ -294,6 +309,8 @@ when it is OFF.
%==============================================================================
\subsection{Pulse LED output logic}
\label{sec:pulse-led}
\textit {Note that this very same logic has been moved inside conv-common-gw submodule
for inverted channels.}\\
Since in the CONV-TTL-RS485 schematics the rear-panel pulse LEDs are driven from inverting
Schmitt triggers to ground, the active-high pulse LED output from \textit{conv\_common\_gw}
......
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