Commit 3afb5319 authored by Evangelia Gousiou's avatar Evangelia Gousiou

wip; changed i2c prescaler to speed-up simulation

parent 954c8112
......@@ -109,7 +109,7 @@ begin
nReset => rst_n_i,
ena => '1',
clk_cnt => x"0027",
clk_cnt => x"0005", -------------x"0027",
-- input signals
start => mst_sta,
......
......@@ -123,7 +123,7 @@ architecture behav of testbench is
i2c_m_in.i2c_master_slv_addr <= "1011110";
i2c_m_in.i2c_master_reg_addr <= (others => '0');
i2c_m_in.i2c_master_send_val <= (others => '1');
wait for 50us;
wait for 1us;
i2c_m_in.i2c_master_slv_addr <= slv_addr;
i2c_m_in.i2c_master_reg_addr <= reg_addr;
i2c_m_in.i2c_master_start <= '1';
......@@ -344,10 +344,12 @@ begin
report "started stimulus";
wait for 1us;
generate_pulses (ttl_n_in, 256);
generate_pulses (ttl_n_in, 250);
read_i2c (i2c_m_in, i2c_m_out, "1011110",x"0000_0000", i2c_master_rcvd_val );
read_i2c (i2c_m_in, i2c_m_out, "1011110",x"0000_000C", i2c_master_rcvd_val );
read_i2c (i2c_m_in, i2c_m_out, "1011110",x"0000_0010", i2c_master_rcvd_val );
read_i2c (i2c_m_in, i2c_m_out, "1011110",x"0000_0014", i2c_master_rcvd_val );
read_i2c (i2c_m_in, i2c_m_out, "1011110",x"0000_0018", i2c_master_rcvd_val ); --11 difference
read_i2c (i2c_m_in, i2c_m_out, "1011110",x"0000_0000", i2c_master_rcvd_val ); --11 difference
end process p_stim_i2c;
......
......@@ -205,7 +205,7 @@ package body testbench_pkg is
signal pcbrev : out std_logic_vector(5 downto 0);
signal rtmm_in : out std_logic_vector(2 downto 0)) is
begin
wait for 2 us; -- does not work without this wait, no idea way ???
--wait for 2 us; -- does not work without this wait, no idea way ???
sw_gp_n_in(0) <= '1'; -- disable glitch filter ?
sw_gp_n_in(1) <= '1';
sw_gp_n_in(7 downto 2) <= (others => '0');
......
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