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Conv TTL RS485 - Gateware
Commit 8301a504 authored by Evangelia Gousiou's avatar Evangelia Gousiou
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added glitch filter test

parent 1351d6b2
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Showing with 119 additions and 72 deletions
sim/testbench.vhd
View file @ 8301a504
......@@ -77,6 +77,7 @@ architecture behav of testbench is
signal pcbrev : std_logic_vector(5 downto 0);
signal rtm_in : std_logic_vector(5 downto 0);
signal i2c_master_rcvd_val : std_logic_vector(31 downto 0);
signal i2c_master_rcvd_val1 : std_logic_vector(31 downto 0);
signal mscl, msda : std_logic_vector(C_NR_MASTERS-1 downto 0);
signal sscl, ssda : std_logic_vector(C_NR_SLAVES-1 downto 0);
......@@ -276,9 +277,9 @@ begin
--============================================================================
-- Check if ttl_out matches rs485_out
--============================================================================
compare_front_rear_pulses: process (clk_20)
compare_front_rear_pulses: process (clk_125)
begin
if rising_edge (clk_20) then
if rising_edge (clk_125) then
if vme_sysreset_n = '0' then
fp_rp_same <= (others=> (0));
fp_rp_oppos <= (others=> (0));
......@@ -380,14 +381,17 @@ begin
--i2c access
p_stim : process
variable i : integer := 0;
variable nb_pulses_to_send_fp : integer := 150;
variable nb_pulses_to_send_fp : integer := 17;
variable nb_pulses_to_send_fp_slv : std_logic_vector(31 downto 0);
variable nb_pulses_to_send_rp : integer := 5;
variable nb_pulses_to_send_inv : integer := 5;
variable nb_pulses_to_send_rp_slv : std_logic_vector(31 downto 0);
variable glitch_filter_en : std_logic := '0';
variable ttl_out_bar_en : std_logic := '0';
variable glitch_filter_en : std_logic := '0'; -- glitch filter disabled
variable ttl_out_bar_en : std_logic := '0'; -- TTLbar disabled
variable err_cnt, err : integer := 0;
variable time_intrvl, rst_timetag : integer := 0;
variable pulse_timetag : integer := 0;
constant K : time := 1 nS;
begin
print("*****************************************************************************");
......@@ -408,20 +412,22 @@ begin
wait until vme_sysreset_n = '1';
print_now("VME reset completed");
wait for 6500 ns; -- for resets and inhibit_pulse to have finished
rst_timetag := now/K;
---------------------------------------------------------------------------
---------------------------------------------------------------------------
-- I2C readings
print_now("----------------------------------------------------------------");
print_now("---> Test 01: I2C regs reading");
print_now("----------------------------------------------------------------");
-- I2C reading of the board ID register
print_now_s("I2C reading of the register ", c_REG_MAP(0).reg_name);
read_i2c (i2c_m_in, i2c_m_out, C_I2C_MASTER_SLV_ADDR, c_REG_MAP(0).reg_addr, c_REG_MAP(0).reg_name, i2c_master_rcvd_val, C_BOARD_ID, err);
read_i2c (i2c_m_in, i2c_m_out, C_I2C_MASTER_SLV_ADDR, c_REG_MAP(0).reg_addr, c_REG_MAP(0).reg_name, i2c_master_rcvd_val, C_BOARD_ID, TRUE, err);
err_cnt := err_cnt +err;
-- I2C reading of the board ID register
print_now_s("I2C reading of the register ", c_REG_MAP(1).reg_name);
read_i2c (i2c_m_in, i2c_m_out, C_I2C_MASTER_SLV_ADDR, c_REG_MAP(1).reg_addr, c_REG_MAP(1).reg_name, i2c_master_rcvd_val, x"EF2AFF10", err);
read_i2c (i2c_m_in, i2c_m_out, C_I2C_MASTER_SLV_ADDR, c_REG_MAP(1).reg_addr, c_REG_MAP(1).reg_name, i2c_master_rcvd_val, x"EF2AFF10", TRUE, err);
err_cnt := err_cnt +err;
---------------------------------------------------------------------------
......@@ -431,6 +437,7 @@ begin
-- I2C writing
print_now("----------------------------------------------------------------");
print_now("---> Test 02: I2C reg writing");
print_now("----------------------------------------------------------------");
-- I2C writing of a big value to Front Panel Counter 1
print_now_s("I2C writing to the register ", c_REG_MAP(4).reg_name);
......@@ -443,7 +450,8 @@ begin
---------------------------------------------------------------------------
-- Pulses to the front TTL input
print_now("----------------------------------------------------------------");
print_now("---> Test 03: Sending TTL pulses and checking the outputs");
print_now("---> Test 03: Sending TTL pulses and checking the outputs");
print_now("----------------------------------------------------------------");
-- Sending pulses to Front Panel Channel 1
nb_pulses_to_send_fp_slv := std_logic_vector(to_unsigned(nb_pulses_to_send_fp, nb_pulses_to_send_fp_slv'length));
......@@ -475,18 +483,19 @@ begin
-- Counters reading
print_now("----------------------------------------------------------------");
print_now("---> Test 04: Reading of the pulse counters through I2C");
print_now("----------------------------------------------------------------");
-- Reading from the I2C Front Panel regs; read only two counters to speed up testbench
while not(i = 3) loop
if i = 0 then
-- Front Panel Channel 1 register should roll over and read
print_now_s("I2C reading of the register ", c_REG_MAP(i+4).reg_name);
read_i2c (i2c_m_in, i2c_m_out, C_I2C_MASTER_SLV_ADDR, c_REG_MAP(i+4).reg_addr, c_REG_MAP(i+4).reg_name , i2c_master_rcvd_val, std_logic_vector(unsigned(C_INITIAL_TST_VALUE)+unsigned(nb_pulses_to_send_fp_slv)), err);
read_i2c (i2c_m_in, i2c_m_out, C_I2C_MASTER_SLV_ADDR, c_REG_MAP(i+4).reg_addr, c_REG_MAP(i+4).reg_name , i2c_master_rcvd_val, std_logic_vector(unsigned(C_INITIAL_TST_VALUE)+unsigned(nb_pulses_to_send_fp_slv)), TRUE, err);
err_cnt := err_cnt + err;
elsif i = 1 then
-- Front Panel Channel 2 register should have not counted any pulses
print_now_s("I2C reading of the register ", c_REG_MAP(i+4).reg_name);
read_i2c (i2c_m_in, i2c_m_out, C_I2C_MASTER_SLV_ADDR, c_REG_MAP(i+4).reg_addr, c_REG_MAP(i+4).reg_name, i2c_master_rcvd_val, (others =>'0'), err);
read_i2c (i2c_m_in, i2c_m_out, C_I2C_MASTER_SLV_ADDR, c_REG_MAP(i+4).reg_addr, c_REG_MAP(i+4).reg_name, i2c_master_rcvd_val, (others =>'0'), TRUE, err);
err_cnt := err_cnt + err;
end if;
i := i + 1;
......@@ -500,12 +509,12 @@ begin
if i = 0 then
-- Check Rear Panel Channel 1 counter has not counted any pulses
print_now_s("I2C reading of the register ", c_REG_MAP(i+10).reg_name);
read_i2c (i2c_m_in, i2c_m_out, C_I2C_MASTER_SLV_ADDR, c_REG_MAP(i+10).reg_addr, c_REG_MAP(i+10).reg_name , i2c_master_rcvd_val, (others =>'0'), err);
read_i2c (i2c_m_in, i2c_m_out, C_I2C_MASTER_SLV_ADDR, c_REG_MAP(i+10).reg_addr, c_REG_MAP(i+10).reg_name , i2c_master_rcvd_val, (others =>'0'), TRUE, err);
err_cnt := err_cnt + err;
elsif i = 1 then
-- Check Rear Panel Channel 1 counter has not counted any pulses
print_now_s("I2C reading of the register ", c_REG_MAP(i+10).reg_name);
read_i2c (i2c_m_in, i2c_m_out, C_I2C_MASTER_SLV_ADDR, c_REG_MAP(i+10).reg_addr, c_REG_MAP(i+10).reg_name, i2c_master_rcvd_val, (others =>'0'), err);
read_i2c (i2c_m_in, i2c_m_out, C_I2C_MASTER_SLV_ADDR, c_REG_MAP(i+10).reg_addr, c_REG_MAP(i+10).reg_name, i2c_master_rcvd_val, (others =>'0'), TRUE, err);
err_cnt := err_cnt + err;
end if;
i := i + 1;
......@@ -517,13 +526,16 @@ begin
---------------------------------------------------------------------------
-- Pulses to the rear RS485 input
print_now("----------------------------------------------------------------");
print_now("---> Test 05: Sending pulses to the RS485 and checking the outputs");
print_now("---> Test 05: Sending pulses to the RS485 and checking the outputs");
print_now("----------------------------------------------------------------");
-- Sending pulses to Rear Panel Channel 1
nb_pulses_to_send_rp := 5;
nb_pulses_to_send_rp_slv := std_logic_vector(to_unsigned(nb_pulses_to_send_rp, nb_pulses_to_send_rp_slv'length));
print_now_s_i("Sending pulses to RS485_N_I(0): ", nb_pulses_to_send_rp);
generate_pulse (rs485_n_in(0), nb_pulses_to_send_rp, "rp", rs485_fs_n_in(0), 200ns, 200ns);
pulse_timetag := (now/K);
print_now_s_i("**************Time: ",pulse_timetag);
-- Checking if the number of RS485 output pulses matches the sent ones
print_now("Check that the pulses arrived to the RS485_O(0)");
......@@ -550,18 +562,18 @@ begin
-- Counters reading
print_now("----------------------------------------------------------------");
print_now("---> Test 06: Reading of the pulse counters through I2C");
print_now("----------------------------------------------------------------");
---------------------------------------------------------------------------
-- Reading from the I2C Rear Panel regs; read two reg to speed up testbench
i := 0;
while not(i = 2) loop
if i = 0 then
-- Check Rear Panel Channel 1 counter has correctly counted the pulses
read_i2c (i2c_m_in, i2c_m_out, C_I2C_MASTER_SLV_ADDR, c_REG_MAP(i+10).reg_addr, c_REG_MAP(i+10).reg_name , i2c_master_rcvd_val, nb_pulses_to_send_rp_slv, err);
read_i2c (i2c_m_in, i2c_m_out, C_I2C_MASTER_SLV_ADDR, c_REG_MAP(i+10).reg_addr, c_REG_MAP(i+10).reg_name , i2c_master_rcvd_val, nb_pulses_to_send_rp_slv, TRUE, err);
err_cnt := err_cnt + err;
elsif i = 1 then
-- Check Rear Panel Channel 2 has not counted any pulses
read_i2c (i2c_m_in, i2c_m_out, C_I2C_MASTER_SLV_ADDR, c_REG_MAP(i+10).reg_addr, c_REG_MAP(i+10).reg_name, i2c_master_rcvd_val, (others =>'0'), err);
read_i2c (i2c_m_in, i2c_m_out, C_I2C_MASTER_SLV_ADDR, c_REG_MAP(i+10).reg_addr, c_REG_MAP(i+10).reg_name, i2c_master_rcvd_val, (others =>'0'), TRUE, err);
err_cnt := err_cnt + err;
end if;
i := i + 1;
......@@ -574,11 +586,22 @@ begin
-- Timetag reading
print_now("----------------------------------------------------------------");
print_now("---> Test 07: Reading of the timetag register through I2C");
read_i2c (i2c_m_in, i2c_m_out, C_I2C_MASTER_SLV_ADDR, CH1LTSCYR, "CH1LTSCY", i2c_master_rcvd_val, x"F001F177", err);
print_now("----------------------------------------------------------------");
read_i2c (i2c_m_in, i2c_m_out, C_I2C_MASTER_SLV_ADDR, CH1LTSCYR, "CH1LTSCY", i2c_master_rcvd_val1, (others =>'0'), FALSE, err);
time_intrvl := (pulse_timetag - rst_timetag)/8;
print_now_s_i("Estimated timetag cycles: ",time_intrvl);
if to_integer(unsigned(i2c_master_rcvd_val1(27 downto 0))) > time_intrvl+1000 or to_integer(unsigned(i2c_master_rcvd_val1(27 downto 0))) < time_intrvl-1000 then
print_now_s_std_s_std("[ERR] Registered cycles: ", i2c_master_rcvd_val1, " is far from the estimated: ", std_logic_vector(to_unsigned(time_intrvl,28)));
else
print_now_s_std_s_std("[OK] Registered cycles: ", i2c_master_rcvd_val1(27 downto 0), " is close to the estimated: ", std_logic_vector(to_unsigned(time_intrvl,28)));
err_cnt := err_cnt + 1;
end if;
err_cnt := err_cnt + err;
read_i2c (i2c_m_in, i2c_m_out, C_I2C_MASTER_SLV_ADDR, CH1LTSTLR, "CH1LTSTL", i2c_master_rcvd_val, (others =>'0'), err);
read_i2c (i2c_m_in, i2c_m_out, C_I2C_MASTER_SLV_ADDR, CH1LTSTLR, "CH1LTSTL", i2c_master_rcvd_val, (others =>'0'), TRUE, err);
err_cnt := err_cnt + err;
read_i2c (i2c_m_in, i2c_m_out, C_I2C_MASTER_SLV_ADDR, CH1LTSCYR, "CH1LTSCY", i2c_master_rcvd_val, x"F001F177", err);
read_i2c (i2c_m_in, i2c_m_out, C_I2C_MASTER_SLV_ADDR, CH1LTSCYR, "CH1LTSCY", i2c_master_rcvd_val, i2c_master_rcvd_val1, TRUE, err);
err_cnt := err_cnt + err;
---------------------------------------------------------------------------
......@@ -588,13 +611,15 @@ begin
-- INV channels
print_now("----------------------------------------------------------------");
print_now("---> Test 08: INV channel check");
print_now("----------------------------------------------------------------");
-- Note INV channels just take INV_N_I and output the same signal to INV_O;
-- inversion happens through inv buffers; there is no associated counter, timetag, rear channel
print_now_s_i("Sending pulses to INV_N_I(3): ", nb_pulses_to_send_inv);
generate_pulse (inv_n_in(3), nb_pulses_to_send_inv, "fp", rs485_fs_n_in(3), 40ns, 20ns);
print_now("Check INV_O(3) output");
if inv_err(3) = 0 then
print_now("[OK] INV_O(3) matches INV_N_I(3) OK");
print_now("[OK] INV_O(3) matches INV_N_I(3)");
else
print_now("[ERR] INV_O(3) does not match INV_N_I(3)");
err_cnt := err_cnt + 1;
......@@ -604,23 +629,61 @@ begin
print_now_s_i("Errors so far: ", err_cnt);
---------------------------------------------------------------------------
-- I2C ERR
-- Glitch filter test
print_now("----------------------------------------------------------------");
print_now("---> Test 09: Access non existent I2C address");
read_i2c_err(i2c_m_in, i2c_m_out);
wait for 1 us;
read_i2c (i2c_m_in, i2c_m_out, C_I2C_MASTER_SLV_ADDR, c_REG_MAP(2).reg_addr, c_REG_MAP(2).reg_name, i2c_master_rcvd_val, x"F001F177", err);
err_cnt := err_cnt + err;
print_now("---> Test 09: Test Glitch filter");
print_now("----------------------------------------------------------------");
---------------------------------------------------------------------------
-- Change board settings
print_now("---> Configure board settings");
glitch_filter_en := '1';
ttl_out_bar_en := '0';
settings_config (glitch_filter_en, ttl_out_bar_en, sw_gp_n_in, sw_other_in, pcbrev, rtm_in);
generate_pulse (ttl_n_in(3), nb_pulses_to_send_fp, "fp", rs485_fs_n_in(3), 50ns, 50ns);
-- Checking if any pulse was passed to the output
print_now("Check that the glitches were filtered and there is no pulse in the TTL_O(3) output");
if pulse_cnt_ttl(3) = 0 then
print_now("[OK] Glitch filter filtered the glitches");
else
print_now_s_i("[ERR] Number of pulses measured at TTL_O(3): ",pulse_cnt_ttl(3));
err_cnt := err_cnt + 1;
end if;
---------------------------------------------------------------------------
print_now_s_i("Errors so far: ", err_cnt);
---------------------------------------------------------------------------
-- TTL bar test
print_now("----------------------------------------------------------------");
print_now("---> Test 10: Test TTL BAR");
print_now("----------------------------------------------------------------");
---------------------------------------------------------------------------
-- Change board settings
print_now("---> Configure board settings");
glitch_filter_en := '0';
ttl_out_bar_en := '1';
settings_config (glitch_filter_en, ttl_out_bar_en, sw_gp_n_in, sw_other_in, pcbrev, rtm_in);
generate_pulse (ttl_n_in(4), nb_pulses_to_send_fp, "fp", rs485_fs_n_in(4), 200ns, 200ns);
wait for 1 us;
print("*****************************************************************************");
print(" Tests Summary");
print("*****************************************************************************");
print_now_s_i("Total number of errors: ", err_cnt);
print("*****************************************************************************");
-- Checking if any pulse was passed to the output
print_now("Check that ...");
if pulse_cnt_ttl(4) = 0 then
print_now("[OK] Glitch filter filtered the glitches");
else
print_now_s_i("[ERR] Number of pulses measured at TTL_O(3): ",pulse_cnt_ttl(3));
err_cnt := err_cnt + 1;
end if;
---------------------------------------------------------------------------
wait for 1 us;
print("*****************************************************************************");
print(" Tests Summary");
print("*****************************************************************************");
print_now_s_i("Total number of errors: ", err_cnt);
print("*****************************************************************************");
end process p_stim;
......
sim/testbench_pkg.vhd
View file @ 8301a504
......@@ -276,17 +276,18 @@ end component conv_ttl_rs485;
constant send_val : in std_logic_vector(31 downto 0);
err : out natural);
procedure read_i2c (signal i2c_m_in : out t_i2c_master_in;
signal i2c_m_out: in t_i2c_master_out;
constant slv_addr : in std_logic_vector(6 downto 0);
constant reg_addr : in std_logic_vector(31 downto 0);
constant reg_name : string(1 to 8);
signal rcvd_val : out std_logic_vector(31 downto 0);
constant exp_val : in std_logic_vector(31 downto 0);
err : out natural);
procedure read_i2c_err (signal i2c_m_in : out t_i2c_master_in;
signal i2c_m_out : in t_i2c_master_out);
procedure read_i2c (signal i2c_m_in : out t_i2c_master_in;
signal i2c_m_out : in t_i2c_master_out;
constant slv_addr : in std_logic_vector(6 downto 0);
constant reg_addr : in std_logic_vector(31 downto 0);
constant reg_name : string(1 to 8);
signal rcvd_val : out std_logic_vector(31 downto 0);
constant exp_val : in std_logic_vector(31 downto 0);
constant eval_result : in boolean;
err : out natural);
-- procedure read_i2c_err (signal i2c_m_in : out t_i2c_master_in;
-- signal i2c_m_out : in t_i2c_master_out);
end testbench_pkg;
package body testbench_pkg is
......@@ -355,7 +356,7 @@ package body testbench_pkg is
end if;
numb_cnt:= numb_cnt + 1;
end loop;
wait for ns_off;
wait for 500ns; -- wait for all pulses to propagate to the output
end procedure generate_pulse;
......@@ -390,6 +391,7 @@ package body testbench_pkg is
constant reg_name : string(1 to 8);
signal rcvd_val : out std_logic_vector(31 downto 0);
constant exp_val : in std_logic_vector(31 downto 0);
constant eval_result : in boolean;
err : out natural) is
variable err_cnt : natural := 0;
begin
......@@ -413,13 +415,16 @@ package body testbench_pkg is
" is 0x",i2c_m_out.i2c_master_rcvd_val);
wait until i2c_m_out.i2c_master_finish = '0';
print_now("read_i2c: completed");
if i2c_m_out.i2c_master_rcvd_val = exp_val then
print_now_s_s("[OK] Correct reading from reg ", reg_name, "; expected value matches read value");
else
print_now_s_std_s_std("[ERR]: Read value from " & reg_name & ": ", i2c_m_out.i2c_master_rcvd_val,
"; expected value: ",exp_val);
err_cnt := err_cnt +1;
end if;
if eval_result = TRUE then
if i2c_m_out.i2c_master_rcvd_val = exp_val then
print_now_s_s("[OK] Correct reading from reg ", reg_name, "; expected value matches read value");
else
print_now_s_std_s_std("[ERR]: Read value from " & reg_name & ": ", i2c_m_out.i2c_master_rcvd_val,
"; expected value: ",exp_val);
err_cnt := err_cnt +1;
end if;
end if;
err := err_cnt;
print_now("---------------");
end procedure read_i2c;
......@@ -459,27 +464,6 @@ package body testbench_pkg is
----------------------------------------------------------------------------------------------------
procedure read_i2c_err (signal i2c_m_in : out t_i2c_master_in;
signal i2c_m_out : in t_i2c_master_out) is
variable err_cnt : natural := 0;
begin
print_now("---------------");
print_now("read_i2c_err: start");
i2c_m_in.i2c_master_start <= '0';
i2c_m_in.i2c_master_rdwr <= '0'; --mst_fsm_op
i2c_m_in.i2c_master_slv_addr <= "1011111";
i2c_m_in.i2c_master_reg_addr <= (others => '0');
i2c_m_in.i2c_master_send_val <= (others => '1');
wait for 1us;
i2c_m_in.i2c_master_slv_addr <= "1011111";
i2c_m_in.i2c_master_reg_addr <= x"F1F1F1F1";
i2c_m_in.i2c_master_start <= '1';
i2c_m_in.i2c_master_rdwr <= '1'; --read
wait for C_CLK_20_PER;
i2c_m_in.i2c_master_start <= '0';
wait until i2c_m_out.i2c_master_ready = '1';
print_now("---------------");
end procedure read_i2c_err;
end;
......
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