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Conv TTL RS485 - Gateware
Commit bf4e34ef authored by unknown's avatar unknown
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style changes only. vhdl checker run on file

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sim/testbench.vhd
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...@@ -38,7 +38,7 @@ entity testbench is ...@@ -38,7 +38,7 @@ entity testbench is
end entity testbench; end entity testbench;
architecture behav of testbench is architecture arch of testbench is
--============================================================================ --============================================================================
-- Functions and procedures -- Functions and procedures
...@@ -87,11 +87,10 @@ architecture behav of testbench is ...@@ -87,11 +87,10 @@ architecture behav of testbench is
signal fp_rp_oppos_err : cnt_ch_array; signal fp_rp_oppos_err : cnt_ch_array;
signal in_out_oppos_err : cnt_ch_array; signal in_out_oppos_err : cnt_ch_array;
signal in_out_same_err : cnt_ch_array; signal in_out_same_err : cnt_ch_array;
signal pulse_cnt_ttl, pulse_cnt_rs485: cnt_ch_array; signal pulse_cnt_ttl, pulse_cnt_rs485 : cnt_ch_array;
signal inv_err : cnt_ch_array; signal inv_err : cnt_ch_array;
signal rtm_db9_ch0_err : integer; signal rtm_db9_ch0_err : integer;
signal rtm_db9_ch1_err : integer; signal rtm_db9_ch1_err : integer;
signal test_id : string(7 downto 1); signal test_id : string(7 downto 1);
type cnt_inv_ch_array is array (C_NR_INV_CHANS-1 downto 0) of integer; type cnt_inv_ch_array is array (C_NR_INV_CHANS-1 downto 0) of integer;
...@@ -105,8 +104,8 @@ begin ...@@ -105,8 +104,8 @@ begin
--============================================================================ --============================================================================
-- Instantiate DUT -- Instantiate DUT
--============================================================================ --============================================================================
cmp_DUT: conv_ttl_rs485 cmp_DUT : conv_ttl_rs485
generic map (g_simul => true, generic map (g_Simul => true,
g_rst_time => 10) g_rst_time => 10)
port map port map
( (
...@@ -190,8 +189,8 @@ begin ...@@ -190,8 +189,8 @@ begin
sscl(0) <= sscl_out when (sscl_en_out = '1') else '1'; sscl(0) <= sscl_out when sscl_en_out = '1' else '1';
ssda(0) <= ssda_out when (ssda_en_out = '1') else '1'; ssda(0) <= ssda_out when ssda_en_out = '1' else '1';
--============================================================================ --============================================================================
...@@ -203,7 +202,7 @@ begin ...@@ -203,7 +202,7 @@ begin
wait for C_CLK_20_PER/2; wait for C_CLK_20_PER/2;
clk_20 <= '1'; clk_20 <= '1';
wait for C_CLK_20_PER/2; wait for C_CLK_20_PER/2;
end process; end process p_clk_20;
p_clk_125 : process p_clk_125 : process
begin begin
...@@ -211,12 +210,12 @@ begin ...@@ -211,12 +210,12 @@ begin
wait for C_CLK_125_PER/2; wait for C_CLK_125_PER/2;
clk_125 <= '1'; clk_125 <= '1';
wait for C_CLK_125_PER/2; wait for C_CLK_125_PER/2;
end process; end process p_clk_125;
clk_125_p <= clk_125; clk_125_p <= clk_125;
clk_125_n <= not clk_125; clk_125_n <= not clk_125;
p_vme_sysreset_n: process p_vme_sysreset_n : process
begin begin
vme_sysreset_n <= '0'; vme_sysreset_n <= '0';
wait for c_reset_width; wait for c_reset_width;
...@@ -233,7 +232,7 @@ begin ...@@ -233,7 +232,7 @@ begin
-- Instantiate I2C master to access DUT -- Instantiate I2C master to access DUT
--============================================================================ --============================================================================
cmp_i2c_master_and_driver: entity work.i2c_master_and_driver cmp_i2c_master_and_driver : entity work.i2c_master_and_driver
port map ( port map (
clk_i => clk_20, clk_i => clk_20,
rst_n_i => vme_sysreset_n, rst_n_i => vme_sysreset_n,
...@@ -255,8 +254,8 @@ begin ...@@ -255,8 +254,8 @@ begin
); );
-- Tri-state buffers on the I2C lines -- Tri-state buffers on the I2C lines
mscl(0) <= mscl_out when (mscl_en_out = '0') else '1'; mscl(0) <= mscl_out when mscl_en_out = '0' else '1';
msda(0) <= msda_out when (msda_en_out = '0') else '1'; msda(0) <= msda_out when msda_en_out = '0' else '1';
--============================================================================ --============================================================================
-- Bus model connection to master and slaves -- Bus model connection to master and slaves
...@@ -279,14 +278,14 @@ begin ...@@ -279,14 +278,14 @@ begin
--============================================================================ --============================================================================
-- Check if TTL_out, TTL_IN and RS485 match or are opposite -- Check if TTL_out, TTL_IN and RS485 match or are opposite
--============================================================================ --============================================================================
compare_front_rear_pulses: process (clk_125) compare_front_rear_pulses : process (clk_125)
begin begin
if rising_edge (clk_125) then if rising_edge (clk_125) then
if vme_sysreset_n = '0' or rst_copm = '1' then if vme_sysreset_n = '0' or rst_copm = '1' then
fp_rp_same_err <= (others=> (0)); fp_rp_same_err <= (others => (0));
fp_rp_oppos_err <= (others=> (0)); fp_rp_oppos_err <= (others => (0));
in_out_same_err <= (others=> (0)); in_out_same_err <= (others => (0));
in_out_oppos_err <= (others=> (0)); in_out_oppos_err <= (others => (0));
rtm_db9_ch0_err <= 0; rtm_db9_ch0_err <= 0;
rtm_db9_ch1_err <= 0; rtm_db9_ch1_err <= 0;
else else
...@@ -319,17 +318,17 @@ begin ...@@ -319,17 +318,17 @@ begin
end if; end if;
end if; end if;
end process; end process compare_front_rear_pulses;
--============================================================================ --============================================================================
-- Check INV channels -- Check INV channels
--============================================================================ --============================================================================
compare_inv_i_inv_o: process (clk_125) compare_inv_i_inv_o : process (clk_125)
begin begin
if rising_edge (clk_125) then if rising_edge (clk_125) then
if vme_sysreset_n = '0' then if vme_sysreset_n = '0' then
inv_err <= (others=> (0)); inv_err <= (others => (0));
else else
for i in 0 to C_NR_INV_CHANS-1 loop -- loop: 4 INV channels for i in 0 to C_NR_INV_CHANS-1 loop -- loop: 4 INV channels
if inv_n_in(i) /= inv_out(i) then if inv_n_in(i) /= inv_out(i) then
...@@ -338,17 +337,17 @@ begin ...@@ -338,17 +337,17 @@ begin
end loop; end loop;
end if; end if;
end if; end if;
end process; end process compare_inv_i_inv_o;
--============================================================================ --============================================================================
-- pulse counter -- pulse counter
--============================================================================ --============================================================================
pulse_counter_ttl: process (ttl_out, vme_sysreset_n, rst_cnt) pulse_counter_ttl : process (ttl_out, vme_sysreset_n, rst_cnt)
begin begin
if vme_sysreset_n = '0' or rst_cnt = '1' then if vme_sysreset_n = '0' or rst_cnt = '1' then
pulse_cnt_ttl <= (others=> (0)); pulse_cnt_ttl <= (others => (0));
else else
--for i in 0 to C_NR_CHANS-1 loop -- for i in 0 to C_NR_CHANS-1 loop
if rising_edge(ttl_out(0)) then if rising_edge(ttl_out(0)) then
pulse_cnt_ttl(0) <= pulse_cnt_ttl(0) +1; pulse_cnt_ttl(0) <= pulse_cnt_ttl(0) +1;
end if; end if;
...@@ -367,16 +366,16 @@ begin ...@@ -367,16 +366,16 @@ begin
if rising_edge(ttl_out(5)) then if rising_edge(ttl_out(5)) then
pulse_cnt_ttl(5) <= pulse_cnt_ttl(5) +1; pulse_cnt_ttl(5) <= pulse_cnt_ttl(5) +1;
end if; end if;
--end loop; -- end loop;
end if; end if;
end process pulse_counter_ttl; end process pulse_counter_ttl;
pulse_counter_rs485: process (rs485_out, vme_sysreset_n, rst_cnt) pulse_counter_rs485 : process (rs485_out, vme_sysreset_n, rst_cnt)
begin begin
if vme_sysreset_n = '0' or rst_cnt = '1' then if vme_sysreset_n = '0' or rst_cnt = '1' then
pulse_cnt_rs485 <= (others=> (0)); pulse_cnt_rs485 <= (others => (0));
else else
--for i in 0 to C_NR_CHANS-1 loop -- for i in 0 to C_NR_CHANS-1 loop
if rising_edge(rs485_out(0)) then if rising_edge(rs485_out(0)) then
pulse_cnt_rs485(0) <= pulse_cnt_rs485(0) +1; pulse_cnt_rs485(0) <= pulse_cnt_rs485(0) +1;
end if; end if;
...@@ -395,7 +394,7 @@ begin ...@@ -395,7 +394,7 @@ begin
if rising_edge(rs485_out(5)) then if rising_edge(rs485_out(5)) then
pulse_cnt_rs485(5) <= pulse_cnt_rs485(5) +1; pulse_cnt_rs485(5) <= pulse_cnt_rs485(5) +1;
end if; end if;
--end loop; -- end loop;
end if; end if;
end process pulse_counter_rs485; end process pulse_counter_rs485;
...@@ -403,7 +402,7 @@ begin ...@@ -403,7 +402,7 @@ begin
-- processes to provide stimulus and checks -- processes to provide stimulus and checks
--============================================================================ --============================================================================
--i2c access -- i2c access
p_stim : process p_stim : process
variable i : integer := 0; variable i : integer := 0;
variable nb_pulses_to_send_fp : integer := 17; variable nb_pulses_to_send_fp : integer := 17;
...@@ -418,7 +417,7 @@ begin ...@@ -418,7 +417,7 @@ begin
variable err_cnt, err : integer := 0; variable err_cnt, err : integer := 0;
variable time_intrvl, rst_timetag : integer := 0; variable time_intrvl, rst_timetag : integer := 0;
variable pulse_timetag : integer := 0; variable pulse_timetag : integer := 0;
constant K : time := 1 nS; constant c_K : time := 1 nS;
begin begin
print("*****************************************************************************"); print("*****************************************************************************");
...@@ -429,7 +428,8 @@ begin ...@@ -429,7 +428,8 @@ begin
-- Board settings -- Board settings
print_now("----------------------------------------------------------------"); print_now("----------------------------------------------------------------");
print_now("---> Configure board settings"); print_now("---> Configure board settings");
settings_config (glitch_filter_en, ttl_out_bar_en, rtm, sw_gp_n_in, sw_other_in, pcbrev, rtm_in); settings_config (glitch_filter_en, ttl_out_bar_en, rtm, sw_gp_n_in, sw_other_in,
pcbrev, rtm_in);
--------------------------------------------------------------------------- ---------------------------------------------------------------------------
-- VME reset -- VME reset
...@@ -439,7 +439,7 @@ begin ...@@ -439,7 +439,7 @@ begin
wait until vme_sysreset_n = '1'; wait until vme_sysreset_n = '1';
print_now("VME reset completed"); print_now("VME reset completed");
wait for 6500 ns; -- for resets and inhibit_pulse to have finished wait for 6500 ns; -- for resets and inhibit_pulse to have finished
rst_timetag := now/K; rst_timetag := now/c_K;
--------------------------------------------------------------------------- ---------------------------------------------------------------------------
--------------------------------------------------------------------------- ---------------------------------------------------------------------------
...@@ -451,7 +451,8 @@ begin ...@@ -451,7 +451,8 @@ begin
-- I2C reading of the board ID register -- I2C reading of the board ID register
print_now_s("I2C reading of the register ", c_REG_MAP(0).reg_name); print_now_s("I2C reading of the register ", c_REG_MAP(0).reg_name);
read_i2c (i2c_m_in, i2c_m_out, C_I2C_MASTER_SLV_ADDR, c_REG_MAP(0).reg_addr, c_REG_MAP(0).reg_name, i2c_master_rcvd_val, C_BOARD_ID, TRUE, err); read_i2c (i2c_m_in, i2c_m_out, C_I2C_MASTER_SLV_ADDR, c_REG_MAP(0).reg_addr,
c_REG_MAP(0).reg_name, i2c_master_rcvd_val, C_BOARD_ID, TRUE, err);
err_cnt := err_cnt +err; err_cnt := err_cnt +err;
--------------------------------------------------------------------------- ---------------------------------------------------------------------------
...@@ -466,7 +467,8 @@ begin ...@@ -466,7 +467,8 @@ begin
-- I2C writing of a big value to Front Panel Counter 1 -- I2C writing of a big value to Front Panel Counter 1
print_now_s("I2C writing to the register ", c_REG_MAP(4).reg_name); print_now_s("I2C writing to the register ", c_REG_MAP(4).reg_name);
write_i2c (i2c_m_in, i2c_m_out, C_I2C_MASTER_SLV_ADDR, c_REG_MAP(4).reg_addr, c_REG_MAP(4).reg_name, C_INITIAL_TST_VALUE, err); write_i2c (i2c_m_in, i2c_m_out, C_I2C_MASTER_SLV_ADDR, c_REG_MAP(4).reg_addr,
c_REG_MAP(4).reg_name, C_INITIAL_TST_VALUE, err);
err_cnt := err_cnt +err; err_cnt := err_cnt +err;
--------------------------------------------------------------------------- ---------------------------------------------------------------------------
...@@ -480,9 +482,11 @@ begin ...@@ -480,9 +482,11 @@ begin
print_now("----------------------------------------------------------------"); print_now("----------------------------------------------------------------");
-- Sending pulses to Front Panel Channel 1 -- Sending pulses to Front Panel Channel 1
nb_pulses_to_send_fp_slv := std_logic_vector(to_unsigned(nb_pulses_to_send_fp, nb_pulses_to_send_fp_slv'length)); nb_pulses_to_send_fp_slv := std_logic_vector(to_unsigned(nb_pulses_to_send_fp,
nb_pulses_to_send_fp_slv'length));
print_now_s_i("Sending TTL pulses to TTL_N_I(0)", nb_pulses_to_send_fp); print_now_s_i("Sending TTL pulses to TTL_N_I(0)", nb_pulses_to_send_fp);
generate_pulse (ttl_n_in(0), nb_pulses_to_send_fp, "fp", rs485_fs_n_in(0), 200ns, 200ns); -- 200ns so that the counters can count correctly generate_pulse (ttl_n_in(0), nb_pulses_to_send_fp, "fp", rs485_fs_n_in(0), 200 ns, 200 ns);
-- 200ns so that the counters can count correctly
-- Checking if the number of TTL output pulses matches the sent ones -- Checking if the number of TTL output pulses matches the sent ones
print_now("Check that the pulses arrived to the TTL_O(0)"); print_now("Check that the pulses arrived to the TTL_O(0)");
...@@ -526,12 +530,15 @@ begin ...@@ -526,12 +530,15 @@ begin
if i = 0 then if i = 0 then
-- Front Panel Channel 1 register should roll over and read -- Front Panel Channel 1 register should roll over and read
print_now_s("I2C reading of the register ", c_REG_MAP(i+4).reg_name); print_now_s("I2C reading of the register ", c_REG_MAP(i+4).reg_name);
read_i2c (i2c_m_in, i2c_m_out, C_I2C_MASTER_SLV_ADDR, c_REG_MAP(i+4).reg_addr, c_REG_MAP(i+4).reg_name , i2c_master_rcvd_val, std_logic_vector(unsigned(C_INITIAL_TST_VALUE)+unsigned(nb_pulses_to_send_fp_slv)), TRUE, err); read_i2c (i2c_m_in, i2c_m_out, C_I2C_MASTER_SLV_ADDR, c_REG_MAP(i+4).reg_addr,
c_REG_MAP(i+4).reg_name, i2c_master_rcvd_val,
std_logic_vector(unsigned(C_INITIAL_TST_VALUE)+unsigned(nb_pulses_to_send_fp_slv)), TRUE, err);
err_cnt := err_cnt + err; err_cnt := err_cnt + err;
elsif i = 1 then elsif i = 1 then
-- Front Panel Channel 2 register should have not counted any pulses -- Front Panel Channel 2 register should have not counted any pulses
print_now_s("I2C reading of the register ", c_REG_MAP(i+4).reg_name); print_now_s("I2C reading of the register ", c_REG_MAP(i+4).reg_name);
read_i2c (i2c_m_in, i2c_m_out, C_I2C_MASTER_SLV_ADDR, c_REG_MAP(i+4).reg_addr, c_REG_MAP(i+4).reg_name, i2c_master_rcvd_val, (others =>'0'), TRUE, err); read_i2c (i2c_m_in, i2c_m_out, C_I2C_MASTER_SLV_ADDR, c_REG_MAP(i+4).reg_addr,
c_REG_MAP(i+4).reg_name, i2c_master_rcvd_val, (others => '0'), TRUE, err);
err_cnt := err_cnt + err; err_cnt := err_cnt + err;
end if; end if;
i := i + 1; i := i + 1;
...@@ -545,12 +552,14 @@ begin ...@@ -545,12 +552,14 @@ begin
if i = 0 then if i = 0 then
-- Check Rear Panel Channel 1 counter has not counted any pulses -- Check Rear Panel Channel 1 counter has not counted any pulses
print_now_s("I2C reading of the register ", c_REG_MAP(i+10).reg_name); print_now_s("I2C reading of the register ", c_REG_MAP(i+10).reg_name);
read_i2c (i2c_m_in, i2c_m_out, C_I2C_MASTER_SLV_ADDR, c_REG_MAP(i+10).reg_addr, c_REG_MAP(i+10).reg_name , i2c_master_rcvd_val, (others =>'0'), TRUE, err); read_i2c (i2c_m_in, i2c_m_out, C_I2C_MASTER_SLV_ADDR, c_REG_MAP(i+10).reg_addr,
c_REG_MAP(i+10).reg_name, i2c_master_rcvd_val, (others => '0'), TRUE, err);
err_cnt := err_cnt + err; err_cnt := err_cnt + err;
elsif i = 1 then elsif i = 1 then
-- Check Rear Panel Channel 1 counter has not counted any pulses -- Check Rear Panel Channel 1 counter has not counted any pulses
print_now_s("I2C reading of the register ", c_REG_MAP(i+10).reg_name); print_now_s("I2C reading of the register ", c_REG_MAP(i+10).reg_name);
read_i2c (i2c_m_in, i2c_m_out, C_I2C_MASTER_SLV_ADDR, c_REG_MAP(i+10).reg_addr, c_REG_MAP(i+10).reg_name, i2c_master_rcvd_val, (others =>'0'), TRUE, err); read_i2c (i2c_m_in, i2c_m_out, C_I2C_MASTER_SLV_ADDR, c_REG_MAP(i+10).reg_addr,
c_REG_MAP(i+10).reg_name, i2c_master_rcvd_val, (others => '0'), TRUE, err);
err_cnt := err_cnt + err; err_cnt := err_cnt + err;
end if; end if;
i := i + 1; i := i + 1;
...@@ -570,8 +579,8 @@ begin ...@@ -570,8 +579,8 @@ begin
nb_pulses_to_send_rp := 5; nb_pulses_to_send_rp := 5;
nb_pulses_to_send_rp_slv := std_logic_vector(to_unsigned(nb_pulses_to_send_rp, nb_pulses_to_send_rp_slv'length)); nb_pulses_to_send_rp_slv := std_logic_vector(to_unsigned(nb_pulses_to_send_rp, nb_pulses_to_send_rp_slv'length));
print_now_s_i("Sending pulses to RS485_N_I(0): ", nb_pulses_to_send_rp); print_now_s_i("Sending pulses to RS485_N_I(0): ", nb_pulses_to_send_rp);
generate_pulse (rs485_n_in(0), nb_pulses_to_send_rp, "rp", rs485_fs_n_in(0), 200ns, 200ns); generate_pulse (rs485_n_in(0), nb_pulses_to_send_rp, "rp", rs485_fs_n_in(0), 200 ns, 200 ns);
pulse_timetag := (now/K); pulse_timetag := (now/c_K);
-- Checking if the number of RS485 output pulses matches the sent ones -- Checking if the number of RS485 output pulses matches the sent ones
print_now("Check that the pulses arrived to the RS485_O(0)"); print_now("Check that the pulses arrived to the RS485_O(0)");
...@@ -606,11 +615,13 @@ begin ...@@ -606,11 +615,13 @@ begin
while not(i = 2) loop while not(i = 2) loop
if i = 0 then if i = 0 then
-- Check Rear Panel Channel 1 counter has correctly counted the pulses -- Check Rear Panel Channel 1 counter has correctly counted the pulses
read_i2c (i2c_m_in, i2c_m_out, C_I2C_MASTER_SLV_ADDR, c_REG_MAP(i+10).reg_addr, c_REG_MAP(i+10).reg_name , i2c_master_rcvd_val, nb_pulses_to_send_rp_slv, TRUE, err); read_i2c (i2c_m_in, i2c_m_out, C_I2C_MASTER_SLV_ADDR, c_REG_MAP(i+10).reg_addr,
c_REG_MAP(i+10).reg_name, i2c_master_rcvd_val, nb_pulses_to_send_rp_slv, TRUE, err);
err_cnt := err_cnt + err; err_cnt := err_cnt + err;
elsif i = 1 then elsif i = 1 then
-- Check Rear Panel Channel 2 has not counted any pulses -- Check Rear Panel Channel 2 has not counted any pulses
read_i2c (i2c_m_in, i2c_m_out, C_I2C_MASTER_SLV_ADDR, c_REG_MAP(i+10).reg_addr, c_REG_MAP(i+10).reg_name, i2c_master_rcvd_val, (others =>'0'), TRUE, err); read_i2c (i2c_m_in, i2c_m_out, C_I2C_MASTER_SLV_ADDR, c_REG_MAP(i+10).reg_addr,
c_REG_MAP(i+10).reg_name, i2c_master_rcvd_val, (others => '0'), TRUE, err);
err_cnt := err_cnt + err; err_cnt := err_cnt + err;
end if; end if;
i := i + 1; i := i + 1;
...@@ -625,18 +636,25 @@ begin ...@@ -625,18 +636,25 @@ begin
print_now("----------------------------------------------------------------"); print_now("----------------------------------------------------------------");
print_now("---> Test 07: Reading of the timetag register through I2C"); print_now("---> Test 07: Reading of the timetag register through I2C");
print_now("----------------------------------------------------------------"); print_now("----------------------------------------------------------------");
read_i2c (i2c_m_in, i2c_m_out, C_I2C_MASTER_SLV_ADDR, CH1LTSCYR, "CH1LTSCY", i2c_master_rcvd_val1, (others =>'0'), FALSE, err); read_i2c (i2c_m_in, i2c_m_out, C_I2C_MASTER_SLV_ADDR, CH1LTSCYR, "CH1LTSCY",
i2c_master_rcvd_val1, (others => '0'), FALSE, err);
time_intrvl := (pulse_timetag - rst_timetag)/8; time_intrvl := (pulse_timetag - rst_timetag)/8;
print_now_s_i("Estimated timetag cycles: ",time_intrvl); print_now_s_i("Estimated timetag cycles: ",time_intrvl);
if to_integer(unsigned(i2c_master_rcvd_val1(27 downto 0))) > time_intrvl+1000 or to_integer(unsigned(i2c_master_rcvd_val1(27 downto 0))) < time_intrvl-1000 then if to_integer(unsigned(i2c_master_rcvd_val1(27 downto 0))) > time_intrvl+1000
print_now_s_std_s_std("[ERR] Registered cycles: ", i2c_master_rcvd_val1, " is far from the estimated: ", std_logic_vector(to_unsigned(time_intrvl,28))); or to_integer(unsigned(i2c_master_rcvd_val1(27 downto 0))) < time_intrvl-1000
then
print_now_s_std_s_std("[ERR] Registered cycles: ", i2c_master_rcvd_val1,
" is far from the estimated: ", std_logic_vector(to_unsigned(time_intrvl,28)));
err_cnt := err_cnt + 1; err_cnt := err_cnt + 1;
else else
print_now_s_std_s_std("[OK] Registered cycles: ", i2c_master_rcvd_val1(27 downto 0), " is close to the estimated: ", std_logic_vector(to_unsigned(time_intrvl,28))); print_now_s_std_s_std("[OK] Registered cycles: ", i2c_master_rcvd_val1(27 downto 0),
" is close to the estimated: ", std_logic_vector(to_unsigned(time_intrvl,28)));
end if; end if;
read_i2c (i2c_m_in, i2c_m_out, C_I2C_MASTER_SLV_ADDR, CH1LTSTLR, "CH1LTSTL", i2c_master_rcvd_val, (others =>'0'), TRUE, err); read_i2c (i2c_m_in, i2c_m_out, C_I2C_MASTER_SLV_ADDR, CH1LTSTLR, "CH1LTSTL",
i2c_master_rcvd_val, (others => '0'), TRUE, err);
err_cnt := err_cnt + err; err_cnt := err_cnt + err;
read_i2c (i2c_m_in, i2c_m_out, C_I2C_MASTER_SLV_ADDR, CH1LTSCYR, "CH1LTSCY", i2c_master_rcvd_val, i2c_master_rcvd_val1, TRUE, err); read_i2c (i2c_m_in, i2c_m_out, C_I2C_MASTER_SLV_ADDR, CH1LTSCYR, "CH1LTSCY",
i2c_master_rcvd_val, i2c_master_rcvd_val1, TRUE, err);
err_cnt := err_cnt + err; err_cnt := err_cnt + err;
--------------------------------------------------------------------------- ---------------------------------------------------------------------------
...@@ -651,7 +669,7 @@ begin ...@@ -651,7 +669,7 @@ begin
-- Note INV channels just take INV_N_I and output the same signal to INV_O; -- Note INV channels just take INV_N_I and output the same signal to INV_O;
-- inversion happens through inv buffers; there is no associated counter, timetag, rear channel -- inversion happens through inv buffers; there is no associated counter, timetag, rear channel
print_now_s_i("Sending pulses to INV_N_I(3): ", nb_pulses_to_send_inv); print_now_s_i("Sending pulses to INV_N_I(3): ", nb_pulses_to_send_inv);
generate_pulse (inv_n_in(3), nb_pulses_to_send_inv, "fp", rs485_fs_n_in(3), 40ns, 20ns); generate_pulse (inv_n_in(3), nb_pulses_to_send_inv, "fp", rs485_fs_n_in(3), 40 ns, 20 ns);
print_now("Check INV_O(3) output"); print_now("Check INV_O(3) output");
if inv_err(3) = 0 then if inv_err(3) = 0 then
...@@ -678,7 +696,7 @@ begin ...@@ -678,7 +696,7 @@ begin
settings_config (glitch_filter_en, ttl_out_bar_en, rtm, sw_gp_n_in, sw_other_in, pcbrev, rtm_in); settings_config (glitch_filter_en, ttl_out_bar_en, rtm, sw_gp_n_in, sw_other_in, pcbrev, rtm_in);
wait for 2 us; -- ML: does not work without this wait, no idea way? wait for 2 us; -- ML: does not work without this wait, no idea way?
print_now_s_i("Sending pulses 50ns-long each to TTL_N_I(3): ", nb_pulses_to_send_fp); print_now_s_i("Sending pulses 50ns-long each to TTL_N_I(3): ", nb_pulses_to_send_fp);
generate_pulse (ttl_n_in(3), nb_pulses_to_send_fp, "fp", rs485_fs_n_in(3), 50ns, 50ns); generate_pulse (ttl_n_in(3), nb_pulses_to_send_fp, "fp", rs485_fs_n_in(3), 50 ns, 50 ns);
-- Checking if any pulse was passed to the output -- Checking if any pulse was passed to the output
print_now("Check that the glitches were filtered and there is no pulse in the TTL_O(3) output"); print_now("Check that the glitches were filtered and there is no pulse in the TTL_O(3) output");
...@@ -709,7 +727,7 @@ begin ...@@ -709,7 +727,7 @@ begin
rst_copm <= '0'; rst_copm <= '0';
print_now_s_i("Sending pulses to TTL_N_IN(5): ", nb_pulses_to_send_bar); print_now_s_i("Sending pulses to TTL_N_IN(5): ", nb_pulses_to_send_bar);
generate_pulse (ttl_n_in(5), nb_pulses_to_send_bar, "fp", rs485_fs_n_in(5), 200ns, 200ns); generate_pulse (ttl_n_in(5), nb_pulses_to_send_bar, "fp", rs485_fs_n_in(5), 200 ns, 200 ns);
-- Check if TTL_N_IN is the opposite of TTL_O; Note: TTLbar does not invert the output! -- Check if TTL_N_IN is the opposite of TTL_O; Note: TTLbar does not invert the output!
print_now("Check that TTL_O(5) matches TTL_N_IN(5)"); print_now("Check that TTL_O(5) matches TTL_N_IN(5)");
...@@ -745,7 +763,7 @@ begin ...@@ -745,7 +763,7 @@ begin
-- create a 50ns glitch during a 450ns pulse: ------|____|-|____|------ -- create a 50ns glitch during a 450ns pulse: ------|____|-|____|------
print_now("Sending a 50ns glitch during a 450ns pulse to TTL_N_IN(5)"); print_now("Sending a 50ns glitch during a 450ns pulse to TTL_N_IN(5)");
generate_pulse (ttl_n_in(5), nb_pulses_to_send_bar, "fp", rs485_fs_n_in(5), 200ns, 50ns); generate_pulse (ttl_n_in(5), nb_pulses_to_send_bar, "fp", rs485_fs_n_in(5), 200 ns, 50 ns);
-- Checking that a single pulse passed to the output -- Checking that a single pulse passed to the output
print_now("Check that the 50ns glitch within the 450ns pulse was filtered out and a single 450ns pulse arrived to the output"); print_now("Check that the 50ns glitch within the 450ns pulse was filtered out and a single 450ns pulse arrived to the output");
...@@ -784,7 +802,7 @@ begin ...@@ -784,7 +802,7 @@ begin
-- create a 50ns glitch during a 450ns pulse: ------|____|-|____|------ -- create a 50ns glitch during a 450ns pulse: ------|____|-|____|------
print_now("Sending a 50ns glitch during a 450ns pulse to TTL_N_IN(5)"); print_now("Sending a 50ns glitch during a 450ns pulse to TTL_N_IN(5)");
generate_pulse (ttl_n_in(5), nb_pulses_to_send_bar, "fp", rs485_fs_n_in(5), 200ns, 50ns); generate_pulse (ttl_n_in(5), nb_pulses_to_send_bar, "fp", rs485_fs_n_in(5), 200 ns, 50 ns);
-- Checking that the glitch passed to the output -- Checking that the glitch passed to the output
print_now("Check that the 50ns glitch within the 450ns pulse passed to the output"); print_now("Check that the 50ns glitch within the 450ns pulse passed to the output");
...@@ -821,11 +839,11 @@ begin ...@@ -821,11 +839,11 @@ begin
-- generate pulses -- generate pulses
print_now_s_i("Sending pulses to TTL_N_IN(0): ", nb_pulses_to_send_fp); print_now_s_i("Sending pulses to TTL_N_IN(0): ", nb_pulses_to_send_fp);
generate_pulse (ttl_n_in(0), nb_pulses_to_send_fp, "fp", rs485_fs_n_in(0), 200ns, 200ns); generate_pulse (ttl_n_in(0), nb_pulses_to_send_fp, "fp", rs485_fs_n_in(0), 200 ns, 200 ns);
nb_pulses_to_send_fp := 4; nb_pulses_to_send_fp := 4;
print_now_s_i("Sending pulses to TTL_N_IN(1): ", nb_pulses_to_send_fp); print_now_s_i("Sending pulses to TTL_N_IN(1): ", nb_pulses_to_send_fp);
generate_pulse (ttl_n_in(1), nb_pulses_to_send_fp, "fp", rs485_fs_n_in(1), 200ns, 200ns); generate_pulse (ttl_n_in(1), nb_pulses_to_send_fp, "fp", rs485_fs_n_in(1), 200 ns, 200 ns);
-- Check that the TTL_N_IN(0) pulses arrived to both Rear Panel Channel 1 and Rear Panel Channel 2 -- Check that the TTL_N_IN(0) pulses arrived to both Rear Panel Channel 1 and Rear Panel Channel 2
print_now("Check that the TTL_N_IN(0) pulses arrived to the RS485_O(0) and RS485_O(1)"); print_now("Check that the TTL_N_IN(0) pulses arrived to the RS485_O(0) and RS485_O(1)");
...@@ -874,7 +892,7 @@ begin ...@@ -874,7 +892,7 @@ begin
-- generate pulses -- generate pulses
print_now_s_i("Sending pulses to RS485_N_I(4): ", nb_pulses_to_send_rp); print_now_s_i("Sending pulses to RS485_N_I(4): ", nb_pulses_to_send_rp);
generate_pulse (rs485_n_in(4), nb_pulses_to_send_rp, "rp", rs485_fs_n_in(4), 200ns, 200ns); generate_pulse (rs485_n_in(4), nb_pulses_to_send_rp, "rp", rs485_fs_n_in(4), 200 ns, 200 ns);
print_now("Check that the pulses arrived to the RS485_O(4)"); print_now("Check that the pulses arrived to the RS485_O(4)");
if pulse_cnt_rs485(4) = nb_pulses_to_send_rp then if pulse_cnt_rs485(4) = nb_pulses_to_send_rp then
...@@ -910,9 +928,7 @@ begin ...@@ -910,9 +928,7 @@ begin
end process p_stim; end process p_stim;
end architecture behav; end architecture arch;
--============================================================================== --==============================================================================
-- architecture end -- architecture end
--============================================================================== --==============================================================================
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