\relax 
\providecommand\hyper@newdestlabel[2]{}
\providecommand\HyperFirstAtBeginDocument{\AtBeginDocument}
\HyperFirstAtBeginDocument{\ifx\hyper@anchor\@undefined
\global\let\oldcontentsline\contentsline
\gdef\contentsline#1#2#3#4{\oldcontentsline{#1}{#2}{#3}}
\global\let\oldnewlabel\newlabel
\gdef\newlabel#1#2{\newlabelxx{#1}#2}
\gdef\newlabelxx#1#2#3#4#5#6{\oldnewlabel{#1}{{#2}{#3}}}
\AtEndDocument{\ifx\hyper@anchor\@undefined
\let\contentsline\oldcontentsline
\let\newlabel\oldnewlabel
\fi}
\fi}
\global\let\hyper@last\relax 
\gdef\HyperFirstAtBeginDocument#1{#1}
\providecommand\HyField@AuxAddToFields[1]{}
\providecommand\HyField@AuxAddToCoFields[2]{}
\@input{cern-title.aux}
\@writefile{toc}{\contentsline {section}{Licensing information}{1}{Doc-Start}}
\@writefile{toc}{\contentsline {section}{Revision history}{1}{section*.2}}
\@writefile{toc}{\contentsline {section}{List of abbreviations}{4}{section*.6}}
\citation{white-rabbit}
\@writefile{toc}{\contentsline {section}{\numberline {1}Introduction}{5}{section.1}}
\newlabel{sec:intro}{{1}{5}{Introduction}{section.1}{}}
\@writefile{lof}{\contentsline {figure}{\numberline {1}{\ignorespaces TTL to RS485 pulse conversion system}}{5}{figure.1}}
\newlabel{fig:conv-sys-bd}{{1}{5}{TTL to RS485 pulse conversion system}{figure.1}{}}
\citation{ctrs-proj}
\citation{sch}
\citation{rtmp-sch-db9}
\citation{ctrs-ug}
\citation{ctrs-hdlguide}
\@writefile{toc}{\contentsline {subsection}{\numberline {1.1}Additional documentation}{6}{subsection.1.1}}
\citation{sch}
\citation{svec}
\@writefile{toc}{\contentsline {section}{\numberline {2}Front module}{7}{section.2}}
\newlabel{sec:ctrs}{{2}{7}{Front module}{section.2}{}}
\@writefile{lof}{\contentsline {figure}{\numberline {2}{\ignorespaces Block diagram of CONV-TTL-RS485 board}}{7}{figure.2}}
\newlabel{fig:conv-rs485-sys-bd}{{2}{7}{Block diagram of CONV-TTL-RS485 board}{figure.2}{}}
\@writefile{toc}{\contentsline {subsection}{\numberline {2.1}VME connector}{7}{subsection.2.1}}
\newlabel{sec:vme}{{2.1}{7}{VME connector}{subsection.2.1}{}}
\@writefile{toc}{\contentsline {subsection}{\numberline {2.2}Power supplies}{8}{subsection.2.2}}
\newlabel{sec:ctrs-power}{{2.2}{8}{Power supplies}{subsection.2.2}{}}
\@writefile{lot}{\contentsline {table}{\numberline {1}{\ignorespaces Voltage levels on CONV-TTL-RS485}}{8}{table.1}}
\newlabel{tbl:voltage-levels}{{1}{8}{Voltage levels on CONV-TTL-RS485}{table.1}{}}
\citation{spec}
\citation{ctrs-hdlguide}
\citation{ctrs-ug}
\@writefile{toc}{\contentsline {subsection}{\numberline {2.3}Clock circuits}{9}{subsection.2.3}}
\newlabel{sec:clocks}{{2.3}{9}{Clock circuits}{subsection.2.3}{}}
\@writefile{lot}{\contentsline {table}{\numberline {2}{\ignorespaces Clocks on CONV-TTL-RS485}}{9}{table.2}}
\newlabel{tbl:clocks}{{2}{9}{Clocks on CONV-TTL-RS485}{table.2}{}}
\@writefile{toc}{\contentsline {subsection}{\numberline {2.4}FPGA}{9}{subsection.2.4}}
\newlabel{sec:fpga}{{2.4}{9}{FPGA}{subsection.2.4}{}}
\@writefile{toc}{\contentsline {subsection}{\numberline {2.5}TTL pulse repetition}{10}{subsection.2.5}}
\newlabel{sec:ttl}{{2.5}{10}{TTL pulse repetition}{subsection.2.5}{}}
\@writefile{toc}{\contentsline {subsubsection}{\numberline {2.5.1}TTL input stage}{10}{subsubsection.2.5.1}}
\@writefile{lof}{\contentsline {figure}{\numberline {3}{\ignorespaces TTL pulse input stage}}{10}{figure.3}}
\newlabel{fig:ttl-inp}{{3}{10}{TTL pulse input stage}{figure.3}{}}
\@writefile{toc}{\contentsline {subsubsection}{\numberline {2.5.2}TTL output stage}{10}{subsubsection.2.5.2}}
\@writefile{lof}{\contentsline {figure}{\numberline {4}{\ignorespaces TTL pulse output stage}}{11}{figure.4}}
\newlabel{fig:ttl-out}{{4}{11}{TTL pulse output stage}{figure.4}{}}
\@writefile{lof}{\contentsline {figure}{\numberline {5}{\ignorespaces TTL pulse output enable signals}}{11}{figure.5}}
\newlabel{fig:ttl-out-en}{{5}{11}{TTL pulse output enable signals}{figure.5}{}}
\citation{sn65hvd3088ed}
\citation{comp-rs485-trans}
\@writefile{toc}{\contentsline {subsection}{\numberline {2.6}RS485 pulse repetition}{12}{subsection.2.6}}
\newlabel{sec:rs485}{{2.6}{12}{RS485 pulse repetition}{subsection.2.6}{}}
\@writefile{toc}{\contentsline {subsubsection}{\numberline {2.6.1}RS485 input stage}{12}{subsubsection.2.6.1}}
\newlabel{sec:rs485-inp}{{2.6.1}{12}{RS485 input stage}{subsubsection.2.6.1}{}}
\@writefile{lof}{\contentsline {figure}{\numberline {6}{\ignorespaces RS485 pulse input stage}}{12}{figure.6}}
\newlabel{fig:rs485-inp}{{6}{12}{RS485 pulse input stage}{figure.6}{}}
\citation{sn65hvd3088ed}
\citation{ti-sig-loss}
\citation{ctrs-ug}
\citation{ctrs-ug}
\@writefile{toc}{\contentsline {subsubsection}{\numberline {2.6.2}RS485 output stage}{13}{subsubsection.2.6.2}}
\newlabel{sec:rs485-out}{{2.6.2}{13}{RS485 output stage}{subsubsection.2.6.2}{}}
\@writefile{lof}{\contentsline {figure}{\numberline {7}{\ignorespaces RS485 pulse output stage}}{13}{figure.7}}
\newlabel{fig:rs485-out}{{7}{13}{RS485 pulse output stage}{figure.7}{}}
\citation{rtmdet}
\citation{svec}
\citation{ctrs-hdlguide}
\@writefile{toc}{\contentsline {subsection}{\numberline {2.7}SFP connector}{15}{subsection.2.7}}
\newlabel{sec:sfp}{{2.7}{15}{SFP connector}{subsection.2.7}{}}
\@writefile{toc}{\contentsline {subsection}{\numberline {2.8}Thermometer and flash chip}{15}{subsection.2.8}}
\newlabel{sec:thermo-flash}{{2.8}{15}{Thermometer and flash chip}{subsection.2.8}{}}
\@writefile{toc}{\contentsline {subsection}{\numberline {2.9}RTM detection}{15}{subsection.2.9}}
\newlabel{sec:rmtdet}{{2.9}{15}{RTM detection}{subsection.2.9}{}}
\@writefile{toc}{\contentsline {subsection}{\numberline {2.10}Status and pulse LEDs}{15}{subsection.2.10}}
\newlabel{sec:leds}{{2.10}{15}{Status and pulse LEDs}{subsection.2.10}{}}
\@writefile{lof}{\contentsline {figure}{\numberline {8}{\ignorespaces RTM detection circuit}}{16}{figure.8}}
\newlabel{fig:rtmdet}{{8}{16}{RTM detection circuit}{figure.8}{}}
\@writefile{toc}{\contentsline {subsection}{\numberline {2.11}PCB version}{16}{subsection.2.11}}
\newlabel{sec:diag-pcbvers}{{2.11}{16}{PCB version}{subsection.2.11}{}}
\citation{rtmm-sch}
\citation{(}
\citation{crosstalk}
\citation{(}
\@writefile{lof}{\contentsline {figure}{\numberline {9}{\ignorespaces Hard-wired PCB versioning}}{17}{figure.9}}
\newlabel{fig:pcb-version}{{9}{17}{Hard-wired PCB versioning}{figure.9}{}}
\@writefile{toc}{\contentsline {section}{\numberline {3}Rear-Transition Module}{17}{section.3}}
\newlabel{sec:rtm}{{3}{17}{Rear-Transition Module}{section.3}{}}
\@writefile{toc}{\contentsline {subsection}{\numberline {3.1}RTM Motherboard}{17}{subsection.3.1}}
\@writefile{lof}{\contentsline {figure}{\numberline {10}{\ignorespaces  Capacitors straddled on the TVS diodes on some RTMM cards}}{18}{figure.10}}
\newlabel{fig:straddled}{{10}{18}{Capacitors straddled on the TVS diodes on some RTMM cards}{figure.10}{}}
\citation{rtmp-sch-db9}
\citation{rtmp-sch-lemo}
\@writefile{toc}{\contentsline {subsection}{\numberline {3.2}RTM Piggyback}{19}{subsection.3.2}}
\bibstyle{ieeetr}
\bibdata{hwg-conv-ttl-rs485}
\bibcite{white-rabbit}{1}
\bibcite{ctrs-proj}{2}
\bibcite{sch}{3}
\bibcite{rtmp-sch-db9}{4}
\bibcite{ctrs-ug}{5}
\bibcite{ctrs-hdlguide}{6}
\bibcite{svec}{7}
\bibcite{spec}{8}
\bibcite{sn65hvd3088ed}{9}
\bibcite{comp-rs485-trans}{10}
\bibcite{ti-sig-loss}{11}
\bibcite{rtmdet}{12}
\bibcite{rtmm-sch}{13}
\bibcite{crosstalk}{14}
\bibcite{rtmp-sch-lemo}{15}
\@writefile{toc}{\contentsline {section}{References}{20}{section*.7}}
