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Compact Universal Timing Endpoint Based on White Rabbit with Dual Ports Cute-WR-DP
Commit 112336c2 authored by hongming's avatar hongming
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CUTEWR-DP-V2.

parent 22408cdc
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Showing with 47 additions and 43 deletions
.gitignore
View file @ 112336c2
......@@ -4,7 +4,7 @@ Project Logs for cutewr_dp
backup
commonlib
project/Project Outputs for cutewr_dp/
project/cutewr_dp.PrjPCBStructure
*.PrjPCBStructure
datasheet
FAB/
*.7z
doc/M25P32.pdf 0 → 100644
View file @ 112336c2
File added
project/cutewrdp.PrjPCB
View file @ 112336c2
......@@ -30,7 +30,7 @@ DItemRevisionGUID=
ReportSuppressedErrorsInMessages=0
FSMCodingStyle=eFMSDropDownList_OneProcess
FSMEncodingStyle=eFMSDropDownList_OneHot
OutputPath=Project Outputs for cutewrdp
OutputPath=
LogFolderPath=
ManagedProjectGUID=
......@@ -39,7 +39,7 @@ PrefsVaultGUID=
PrefsRevisionGUID=
[Document1]
DocumentPath=..\schematics\1-Clocks.SchDoc
DocumentPath=..\schematics\01-Clocks.SchDoc
AnnotationEnabled=1
AnnotateStartValue=1
AnnotationIndexControlEnabled=0
......@@ -56,7 +56,7 @@ GenerateClassCluster=0
DocumentUniqueId=OUWPRPBH
[Document2]
DocumentPath=..\schematics\2-FPGA_bank0.SchDoc
DocumentPath=..\schematics\02-FPGA_bank0.SchDoc
AnnotationEnabled=1
AnnotateStartValue=1
AnnotationIndexControlEnabled=0
......@@ -73,7 +73,7 @@ GenerateClassCluster=0
DocumentUniqueId=WITEOMOW
[Document3]
DocumentPath=..\schematics\3-FPGA_bank1.SchDoc
DocumentPath=..\schematics\03-FPGA_bank1.SchDoc
AnnotationEnabled=1
AnnotateStartValue=1
AnnotationIndexControlEnabled=0
......@@ -90,7 +90,7 @@ GenerateClassCluster=0
DocumentUniqueId=PODHNVJE
[Document4]
DocumentPath=..\schematics\4-FPGA_bank2.SchDoc
DocumentPath=..\schematics\04-FPGA_bank2.SchDoc
AnnotationEnabled=1
AnnotateStartValue=1
AnnotationIndexControlEnabled=0
......@@ -107,7 +107,7 @@ GenerateClassCluster=0
DocumentUniqueId=QETWMCFM
[Document5]
DocumentPath=..\schematics\5-FPGA_bank3.SchDoc
DocumentPath=..\schematics\05-FPGA_bank3.SchDoc
AnnotationEnabled=1
AnnotateStartValue=1
AnnotationIndexControlEnabled=0
......@@ -124,7 +124,7 @@ GenerateClassCluster=0
DocumentUniqueId=GPAHTTAO
[Document6]
DocumentPath=..\schematics\6-FPGA_GTP.SchDoc
DocumentPath=..\schematics\06-FPGA_GTP.SchDoc
AnnotationEnabled=1
AnnotateStartValue=1
AnnotationIndexControlEnabled=0
......@@ -141,7 +141,7 @@ GenerateClassCluster=0
DocumentUniqueId=SPJHHQFU
[Document7]
DocumentPath=..\schematics\7-FPGA_Config.SchDoc
DocumentPath=..\schematics\07-FPGA_Config.SchDoc
AnnotationEnabled=1
AnnotateStartValue=1
AnnotationIndexControlEnabled=0
......@@ -158,7 +158,7 @@ GenerateClassCluster=0
DocumentUniqueId=QRLETTYU
[Document8]
DocumentPath=..\schematics\8-FPGA_Power.SchDoc
DocumentPath=..\schematics\08-FPGA_Power.SchDoc
AnnotationEnabled=1
AnnotateStartValue=1
AnnotationIndexControlEnabled=0
......@@ -175,7 +175,7 @@ GenerateClassCluster=0
DocumentUniqueId=NRANVRQQ
[Document9]
DocumentPath=..\schematics\9-Power.SchDoc
DocumentPath=..\schematics\09-Power.SchDoc
AnnotationEnabled=1
AnnotateStartValue=1
AnnotationIndexControlEnabled=0
......@@ -260,7 +260,7 @@ GenerateClassCluster=0
DocumentUniqueId=RGRFNSOR
[Document14]
DocumentPath=..\PCB\cutewr_dp_v1_2.PcbDoc
DocumentPath=..\PCB\cutewr_dp_v2.PcbDoc
AnnotationEnabled=1
AnnotateStartValue=1
AnnotationIndexControlEnabled=0
......@@ -277,7 +277,7 @@ GenerateClassCluster=0
DocumentUniqueId=HWHUWQQM
[Document15]
DocumentPath=..\schematics\cutewr_dp.SchDoc
DocumentPath=..\schematics\00cutewr_dp.SchDoc
AnnotationEnabled=1
AnnotateStartValue=1
AnnotationIndexControlEnabled=0
......@@ -314,7 +314,7 @@ AddNetPins=-1
AddNetNetLabels=-1
AddNetPorts=-1
ExportBOM=0
TemplateFilename=G:\002database\101PCBռ\001cutewr_dp_v1\project\Board Stack Report.XLT
TemplateFilename=G:\002database\101PCB_Collection\001cutewr_dp\project\Board Stack Report.XLT
TemplateStoreRelative=0
PCB_PrintColor=0
SCH_ShowNoErc=-1
......@@ -339,7 +339,7 @@ SCH_ShowNote=-1
SCH_ShowNoteCollapsed=-1
[Generic_EDE]
OutputDir=Project Outputs for cutewrdp
OutputDir=
[OutputGroup1]
Name=Netlist Outputs
......@@ -504,7 +504,7 @@ OutputDefault4=0
PageOptions4=Record=PageOptions|CenterHorizontal=True|CenterVertical=True|PrintScale=1.00|XCorrection=1.00|YCorrection=1.00|PrintKind=1|BorderSize=5000000|LeftOffset=0|BottomOffset=0|Orientation=2|PaperLength=1000|PaperWidth=1000|Scale=100|PaperSource=7|PrintQuality=-4|MediaType=1|DitherType=10|PrintScaleMode=1|PaperKind=A4
OutputType5=Composite
OutputName5=Composite Drawing
OutputDocumentPath5=C:\Users\majesty\Desktop\workarea\cutewr_hardware_design\cutewr_dp_hw\PCB\cutewr_dp_hw.PcbDoc
OutputDocumentPath5=G:\002database\101PCBռ\001cutewr_dp\PCB\cutewr_dp_v1_2.PcbDoc
OutputVariantName5=
OutputDefault5=0
PageOptions5=Record=PageOptions|CenterHorizontal=True|CenterVertical=True|PrintScale=2.07|XCorrection=1.00|YCorrection=1.00|PrintKind=1|BorderSize=5000000|LeftOffset=0|BottomOffset=0|Orientation=2|PaperLength=1000|PaperWidth=1000|Scale=100|PaperSource=7|PrintQuality=-4|MediaType=1|DitherType=10|PrintScaleMode=1|PaperKind=A4
......@@ -724,46 +724,50 @@ Name=Report Outputs
Description=
TargetPrinter=Microsoft Print to PDF
PrinterOptions=Record=PrinterOptions|Copies=1|Duplex=1|TrueTypeOptions=3|Collate=1|PrintJobKind=1|PrintWhat=1
OutputType1=Script
OutputName1=Script Output
OutputType1=BOM_PartType
OutputName1=Bill of Materials
OutputDocumentPath1=
OutputVariantName1=[No Variations]
OutputDefault1=0
OutputType2=SimpleBOM
OutputName2=Simple BOM
PageOptions1=Record=PageOptions|CenterHorizontal=True|CenterVertical=True|PrintScale=1.00|XCorrection=1.00|YCorrection=1.00|PrintKind=1|BorderSize=5000000|LeftOffset=0|BottomOffset=0|Orientation=2|PaperLength=1000|PaperWidth=1000|Scale=100|PaperSource=7|PrintQuality=-4|MediaType=1|DitherType=10|PrintScaleMode=1|PaperKind=A4
Configuration1_Name1=ColumnNameFormat
Configuration1_Item1=CaptionAsName
Configuration1_Name2=Filter
Configuration1_Item2=545046300E5446696C74657257726170706572000D46696C7465722E416374697665090F46696C7465722E43726974657269610A04000000000000000000
Configuration1_Name3=General
Configuration1_Item3=OpenExported=True|AddToProject=False|ForceFit=False|NotFitted=False|Database=False|DatabasePriority=False|IncludePCBData=False|IncludeVaultData=False|IncludeAlternatives=False|ShowExportOptions=True|TemplateFilename=|BatchMode=5|FormWidth=942|FormHeight=661|SupplierProdQty=1|SupplierAutoQty=False|SupplierUseCachedPricing=False|SupplierCurrency=<none>
Configuration1_Name4=GroupOrder
Configuration1_Item4=Comment=True|Footprint=True
Configuration1_Name5=PCBDocument
Configuration1_Item5=FileName=cutewr_dp_v2.PcbDoc
Configuration1_Name6=SortOrder
Configuration1_Item6=Footprint=Up
Configuration1_Name7=VisibleOrder
Configuration1_Item7=Comment=101|Description=101|Footprint=101|Quantity=101|Designator=101
OutputType2=ComponentCrossReference
OutputName2=Component Cross Reference Report
OutputDocumentPath2=
OutputVariantName2=[No Variations]
OutputDefault2=0
OutputType3=SinglePinNetReporter
OutputName3=Report Single Pin Nets
OutputType3=ReportHierarchy
OutputName3=Report Project Hierarchy
OutputDocumentPath3=
OutputVariantName3=[No Variations]
OutputDefault3=0
OutputType4=BOM_PartType
OutputName4=Bill of Materials
OutputDocumentPath4=C:\Users\majesty\Desktop\workarea\cutewr_dp_hw\PCB\cutewr_dpV1.1.PcbDoc
OutputType4=Script
OutputName4=Script Output
OutputDocumentPath4=
OutputVariantName4=[No Variations]
OutputDefault4=0
PageOptions4=Record=PageOptions|CenterHorizontal=True|CenterVertical=True|PrintScale=1.00|XCorrection=1.00|YCorrection=1.00|PrintKind=1|BorderSize=5000000|LeftOffset=0|BottomOffset=0|Orientation=2|PaperLength=1000|PaperWidth=1000|Scale=100|PaperSource=7|PrintQuality=-4|MediaType=1|DitherType=10|PrintScaleMode=1|PaperKind=A4
Configuration4_Name1=ColumnNameFormat
Configuration4_Item1=CaptionAsName
Configuration4_Name2=Filter
Configuration4_Item2=545046300E5446696C74657257726170706572000D46696C7465722E416374697665090F46696C7465722E43726974657269610A04000000000000000000
Configuration4_Name3=General
Configuration4_Item3=OpenExported=True|AddToProject=True|ForceFit=False|NotFitted=False|Database=False|DatabasePriority=False|IncludePCBData=True|IncludeVaultData=False|ShowExportOptions=True|TemplateFilename=|BatchMode=5|FormWidth=942|FormHeight=652|SupplierProdQty=1|SupplierAutoQty=False|SupplierUseCachedPricing=False|SupplierCurrency=<none>
Configuration4_Name4=GroupOrder
Configuration4_Item4=Comment=True|Footprint=True
Configuration4_Name5=SortOrder
Configuration4_Item5=Designator=Up|Comment=Up|Footprint=Up
Configuration4_Name6=VisibleOrder
Configuration4_Item6=Comment=100|Description=100|Footprint=100|Quantity=100
OutputType5=ComponentCrossReference
OutputName5=Component Cross Reference Report
OutputType5=SimpleBOM
OutputName5=Simple BOM
OutputDocumentPath5=
OutputVariantName5=[No Variations]
OutputDefault5=0
OutputType6=ReportHierarchy
OutputName6=Report Project Hierarchy
Configuration5_Name1=OutputConfigurationParameter1
Configuration5_Item1=Record=SimpleBOMView|SimpleBOMMode=0
OutputType6=SinglePinNetReporter
OutputName6=Report Single Pin Nets
OutputDocumentPath6=
OutputVariantName6=[No Variations]
OutputDefault6=0
......@@ -1569,7 +1573,7 @@ PageOptions=Record=PageOptions|CenterHorizontal=True|CenterVertical=True|PrintSc
Configuration_Name1=OutputConfigurationParameter1
Configuration_Item1=DesignatorDisplayMode=Physical|PrintArea=DesignExtent|PrintAreaLowerLeftCornerX=0|PrintAreaLowerLeftCornerY=0|PrintAreaUpperRightCornerX=0|PrintAreaUpperRightCornerY=0|Record=PcbPrintView
Configuration_Name2=OutputConfigurationParameter2
Configuration_Item2=IncludeBottomLayerComponents=True|IncludeMultiLayerComponents=True|IncludeTopLayerComponents=True|IncludeViewports=True|Index=0|Mirror=False|Name=Multilayer Composite Print|PadNumberFontSize=14|Record=PcbPrintOut|ShowHoles=False|ShowPadNets=False|ShowPadNumbers=False|SubstituteFonts=False
Configuration_Item2=IncludeBottomLayerComponents=True|IncludeMultiLayerComponents=True|IncludeTopLayerComponents=True|IncludeViewports=True|Index=0|Mirror=False|Name=Multilayer Composite Print|PadNumberFontSize=14|Record=PcbPrintOut|ShowHoles=True|ShowPadNets=False|ShowPadNumbers=False|SubstituteFonts=True
Configuration_Name3=OutputConfigurationParameter3
Configuration_Item3=CArc=Full|CFill=Full|Comment=Full|Coordinate=Full|CPad=Full|CRegion=Full|CText=Full|CTrack=Full|CVia=Full|Designator=Full|Dimension=Full|DLayer1=TopLayer|DLayer2=BottomLayer|FArc=Full|FFill=Full|FPad=Full|FRegion=Full|FText=Full|FTrack=Full|FVia=Full|Layer=TopOverlay|Polygon=Full|PrintOutIndex=0|Record=PcbPrintLayer
Configuration_Name4=OutputConfigurationParameter4
......
schematics/10-SFP.SchDoc
View file @ 112336c2
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