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Compact Universal Timing Endpoint based on White Rabbit
Commit d4fe2cc3 authored by Qiang Du's avatar Qiang Du
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Enabled 3 bytes read, with arbitary length.

parent 647a8ec2
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Showing with 75 additions and 28 deletions
tools/lib-multiboot/eb/eb.py
View file @ d4fe2cc3
......@@ -44,21 +44,19 @@ class EB:
logging.debug('write: 0x%08x'% val)
self.device.write(addr, val)
def writemregs(self, addr, dlist):
with eb.Cycle(self.device, 0, 0) as cycle:
for v in dlist:
logging.debug('mwrite: 0x%08x'% v)
cycle.write(addr, v)
def read(self, addr):
val = self.device.read(addr)
logging.debug('read: 0x%08x'% val)
return val
"""
def writemregs(self, addr, dlist):
with eb.Cycle(self.device, 0, 0) as cycle:
for v in dlist:
cycle.write(addr, v)
logging.debug('mwrite: 0x%08x'% v)
def readmregs(self, addr, nrregs):
dlist = []
with eb.Cycle(self.device, 0, 0) as cycle:
for i in nrregs:
dlist.append(cycle.read(addr))
logging.debug('mread: 0x%08x'% dlist[i])
dlist = cycle.read(addr, nrregs)
return dlist
"""
tools/lib-multiboot/eb/etherbone.py
View file @ d4fe2cc3
......@@ -12,6 +12,7 @@
# error-prone with ctypes (and my limited knowledge thereof)
from ctypes import *
import logging
libetherbone_path = '/usr/local/lib/libetherbone.so'
lib = CDLL(libetherbone_path)
......@@ -241,10 +242,25 @@ class Cycle():
lib.eb_cycle_read(self.cycle, address, self.data_format, byref(data))
return data.value
def read_fast(self, address, size):
"""prepare a wishbone read phase
The given address is read from the remote device.
"""
dlist = []
data = eb_data_t()
for i in range(size):
lib.eb_cycle_read(self.cycle, address, self.data_format, byref(data))
logging.debug('read value 0x%x', data.value)
dlist.append(data.value)
return dlist
def write(self, address, data):
"""perform a wishbone write phase
data is written to the current cursor on the remote device.
If the device was read-only, the operation is discarded.
"""
return lib.eb_cycle_write(self.cycle, address, self.data_format, data)
logging.debug('write value 0x%x', data)
d = eb_data_t(data)
return lib.eb_cycle_write(self.cycle, address, self.data_format, d)
tools/lib-multiboot/flash_m25p.py
View file @ d4fe2cc3
......@@ -22,6 +22,7 @@
import sys
import logging
import struct
import etherbone
sys.path.append("eb")
from eb import *
from comm_type import *
......@@ -151,17 +152,44 @@ class FlashM25P:
# one 24-bit data value in little-endian order
def read(self, addr, nrbytes):
logging.debug('Reading from 0x%x...' % addr)
ret = []
d = ''
self.spi_transfer(1,1,0x0b)
# send address in reverse order
self.spi_transfer(3,1,self.rev_addr(addr))
self.spi_transfer(1,1,0)
n = nrbytes
# Read bytes in groups of three
while (n/3>0):
d += struct.pack('L',self.spi_transfer(3,1,0))[0:3]
n -= 3
while (n>0):
d += struct.pack('L',self.spi_transfer(1,1,0))[3]
n -= 1
# Read bytes in groups of one
for i in range(nrbytes):
ret.append(self.spi_transfer(1,1,0))
self.spi_transfer(1,0,0)
return d
# xxx broken
def page_read(self, addr):
logging.debug('Reading from 0x%x...' % addr)
ret = []
wval = []
addr = self.mb_base + 0x10
for i in xrange(256):
wval.append((0xc << 24) | 0)
with etherbone.Cycle(self.ebone.device, 0, 0) as cycle:
cycle.write(addr, (0xc<<24|0xb))
cycle.write(addr, (0xe<<24|self.rev_addr(addr)))
for v in wval:
cycle.write(addr, v)
ret = cycle.read_fast(addr, 256)
cycle.write(addr, (0x8<<24))
# send address in reverse order
#self.spi_transfer(1,0,0)
return ret
......@@ -197,13 +225,14 @@ class FlashM25P:
def read_id(self):
ret = []
d = ''
self.spi_transfer(1,1,0x9f)
for i in range(20):
ret.append(self.spi_transfer(1,1,0))
for i in range(6):
d += struct.pack('L',self.spi_transfer(3,1,0))[0:3]
for i in range(2):
d += struct.pack('L',self.spi_transfer(1,1,0))[3]
self.spi_transfer(1,0,0)
ret_pack = struct.pack('B'*20, *ret)
logging.debug('Flash ID: 0x'+ret_pack.encode('hex'))
return ret_pack
return d
def rev_addr(self, addr):
rev_addr = ((addr & 0xff0000) >> 16) | (((addr & 0xff00) >> 8) << 8) | \
......
tools/lib-multiboot/mbtest.py
View file @ d4fe2cc3
......@@ -37,7 +37,7 @@ def main(argv):
baseaddr = 0x20800
target_ip = 'rflab2.lbl.gov'
flash_address = 0x0
flash_size = 0xff
flash_size = 0xf3
prog_file = '../../syn/cute_wr/wr_core_demo/cute_top_wrc.bit'
dump_file = 'dump_foo'
......@@ -67,7 +67,7 @@ def main(argv):
elif opt in ('--status', '-s'):
action = 'status'
print 'action =', action
logging.info('action ='+ action)
target = EB(target_ip)
target.open()
......@@ -84,9 +84,12 @@ def main(argv):
elif (action is 'dump'):
logging.info('Dumping to file %s from address 0x%x to 0x%x'%(dump_file, flash_address, flash_address+flash_size))
mb.read(dump_file, flash_address,flash_address+flash_size)
#mb.dump(dump_file, flash_address,flash_address+flash_size)
elif (action is 'status'):
status = mb.flash.rsr()
logging.info('Status: 0x%x', status)
logging.info('Status: 0x%x'% status)
target.close()
if __name__ == "__main__":
main(sys.argv[1:])
tools/lib-multiboot/xil_multiboot.py
View file @ d4fe2cc3
......@@ -77,14 +77,15 @@ class XilMultiboot:
# Read the data and dump to file
logging.info("Reading flash contents from board in slot %d" % self.slot)
dat = []
for i in range(sa, ea, 256):
dat += self.flash.read(i, 256)
if (ea - i>256):
dat = self.flash.read(i, 256)
else:
dat = self.flash.read(i, ea-i)
self._progress(sa, ea, i)
f.write(dat)
i += 256
self._progress(sa, ea, i)
dat = ''.join(map(chr,dat))
f.write(dat)
f.close()
#
......
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