DI/OT Peripheral Board Loop-back
Project description
Simple DI/OT Peripheral Board Loop-back to test all connections of DI/OT System Boards during production screening and other reliability tests.
Main features
- Loop-back of all lines coming from DI/OT backplane
- Optional load resistors for 12V and 5V power rails
- Identification EEPROM
- Assembly variants for any System Board RTM loopback or Peripheral Board RTM loopback
Related links and documents
Contacts
- Greg Daniluk - CERN
Status
Date | Event |
---|---|
11-May-202 | Project starts |