# svec_carrier_csr

### SVEC carrier control and status registers

Wishbone slave for control and status registers related to the SVEC FMC carrier

### 1. Memory map summary

HW address | Type | Name | HDL prefix | C prefix
--- | --- | --- | --- | ---
0x0 | REG | carrier | carrier | carrier
0x4 | REG | stat | stat | stat
0x8 | REG | ctrl | ctrl | ctrl
0xc | REG | rst | rst | rst

### 2. Register description

### 2.1. carrier

HW prefix: | carrier
HW address: | 0x0
C prefix: | carrier
C block offset: | 0x0

Carrier type and PCB version

31 | 30 | 29 | 28 | 27 | 26 | 25 | 24
type[15:8]
23 | 22 | 21 | 20 | 19 | 18 | 17 | 16
type[7:0]
15 | 14 | 13 | 12 | 11 | 10 | 9 | 8
reserved[10:3]
7 | 6 | 5 | 4 | 3 | 2 | 1 | 0
reserved[2:0] | pcb_rev[4:0]

- pcb_rev [ro]: PCB revision
  Binary coded PCB layout revision.
- reserved [ro]: Reserved register
  Ignore on read, write with 0's.
- type [ro]: Carrier type
  Carrier type identifier
  1 = SPEC
  2 = SVEC
  3 = VFC
  4 = SPEXI

### 2.2. stat

HW prefix: | stat
HW address: | 0x4
C prefix: | stat
C block offset: | 0x4

Status

31 | 30 | 29 | 28 | 27 | 26 | 25 | 24
- | - | - | - | - | - | - | -
23 | 22 | 21 | 20 | 19 | 18 | 17 | 16
- | - | - | - | - | - | - | -
15 | 14 | 13 | 12 | 11 | 10 | 9 | 8
- | - | - | - | - | - | - | -
7 | 6 | 5 | 4 | 3 | 2 | 1 | 0
- | - | - | ddr1_cal_done | ddr0_cal_done | sys_pll_lck | fmc1_pres | fmc0_pres

- fmc0_pres [ro]: FMC 1 presence
  0: FMC slot 1 is populated
  1: FMC slot 1 is not populated.
- fmc1_pres [ro]: FMC 2 presence
  0: FMC slot 2 is populated
  1: FMC slot 2 is not populated.
- sys_pll_lck [ro]: System clock PLL status
  0: not locked
  1: locked.
- ddr0_cal_done [ro]: DDR3 bank 4 calibration status
  0: not done
  1: done.
- ddr1_cal_done [ro]: DDR3 bank 5 calibration status
  0: not done
  1: done.

### 2.3. ctrl

HW prefix: | ctrl
HW address: | 0x8
C prefix: | ctrl
C block offset: | 0x8

Control

31 | 30 | 29 | 28 | 27 | 26 | 25 | 24
- | - | - | - | - | - | - | -
23 | 22 | 21 | 20 | 19 | 18 | 17 | 16
- | - | - | - | - | - | - | -
15 | 14 | 13 | 12 | 11 | 10 | 9 | 8
fp_leds_man[15:8]
7 | 6 | 5 | 4 | 3 | 2 | 1 | 0
fp_leds_man[7:0]

- fp_leds_man [rw]: Front panel LED manual control
  Height front panel LED, two bits per LED.
  00 = OFF
  01 = Green
  10 = Red
  11 = Orange

### 2.4. rst

HW prefix: | rst
HW address: | 0xc
C prefix: | rst
C block offset: | 0xc

Reset Register

31 | 30 | 29 | 28 | 27 | 26 | 25 | 24
- | - | - | - | - | - | - | -
23 | 22 | 21 | 20 | 19 | 18 | 17 | 16
- | - | - | - | - | - | - | -
15 | 14 | 13 | 12 | 11 | 10 | 9 | 8
- | - | - | - | - | - | - | -
7 | 6 | 5 | 4 | 3 | 2 | 1 | 0
- | - | - | - | - | - | fmc1 | fmc0

- fmc0 [wo]: State of the FMC 1 reset line
  write 0: Normal FMC operation
  write 1: FMC is held in reset
- fmc1 [wo]: State of the FMC 2 reset line
  write 0: Normal FMC operation
  write 1: FMC is held in reset