@regsection Memory map summary
@multitable  @columnfractions .10 .15 .15 .55
@headitem Address @tab Type @tab Prefix @tab Name
@item @code{0x0} @tab
REG @tab
@code{multi_irq} @tab
Multiple interrupt register
@item @code{0x4} @tab
REG @tab
@code{src} @tab
Interrupt sources register 
@item @code{0x8} @tab
REG @tab
@code{en_mask} @tab
Interrupt enable mask register
@end multitable 
@regsection @code{multi_irq} - Multiple interrupt register
Multiple interrupts occurs before irq source is read.@*Write '1' to clear a bit.@*@*Bit 0: DMA done.@*Bit 1: DMA error.@*Bit 2: Trigger.@*Bit 3: Acquisition end.
@multitable @columnfractions .10 .10 .15 .10 .55
@headitem Bits @tab Access @tab Prefix @tab Default @tab Name
@item @code{31...0}
@tab R/W @tab
@code{MULTI_IRQ}
@tab @code{X} @tab 
Multiple interrupt
@end multitable
@regsection @code{src} - Interrupt sources register 
Indicates the interrupt source.@*Write '1' to clear a bit.@*@*Bit 0: DMA done.@*Bit 1: DMA error.@*Bit 2: Trigger.@*Bit 3: Acquisition end.
@multitable @columnfractions .10 .10 .15 .10 .55
@headitem Bits @tab Access @tab Prefix @tab Default @tab Name
@item @code{31...0}
@tab R/W @tab
@code{SRC}
@tab @code{X} @tab 
Interrupt sources
@end multitable
@regsection @code{en_mask} - Interrupt enable mask register
Bit mask to independently enable interrupt sources.@*@*Bit 0: DMA done.@*Bit 1: DMA error.@*Bit 2: Trigger.@*Bit 3: Acquisition end.
@multitable @columnfractions .10 .10 .15 .10 .55
@headitem Bits @tab Access @tab Prefix @tab Default @tab Name
@item @code{31...0}
@tab R/W @tab
@code{EN_MASK}
@tab @code{0} @tab 
Interrupt enable mask
@end multitable
