#ChipScope Core Inserter Project File Version 3.0
#Fri Mar 22 08:28:00 CET 2013
Project.device.designInputFile=/home/mcattin/projects/svn_to_git/fmc-adc-100m14b4cha_git/hdl/spec/syn/spec_top_fmc_adc_100Ms.ngc
Project.device.designOutputFile=/home/mcattin/projects/svn_to_git/fmc-adc-100m14b4cha_git/hdl/spec/syn/spec_top_fmc_adc_100Ms.ngc
Project.device.deviceFamily=18
Project.device.enableRPMs=true
Project.device.outputDirectory=/home/mcattin/projects/svn_to_git/fmc-adc-100m14b4cha_git/hdl/spec/syn/_ngo
Project.device.useSRL16=true
Project.filter.dimension=19
Project.filter<0>=*cmp_irq*rddata*
Project.filter<10>=*cmp_adc_sync*
Project.filter<11>=*cmp_adc_sync*_o*
Project.filter<12>=*cmp_adc_sync*q_o*
Project.filter<13>=*cmp_adc_sync*q_o
Project.filter<14>=*sync_fifo_dou*
Project.filter<15>=*acq_in_wait*
Project.filter<16>=*acq_trig*
Project.filter<17>=*acq_fsm*
Project.filter<18>=*sync_fifo_valid*
Project.filter<1>=*cmp_irq*
Project.filter<2>=*cnx_master_in[4]*
Project.filter<3>=*cnx_master_out[4]*
Project.filter<4>=*cnx_master_out*
Project.filter<5>=*dat*
Project.filter<6>=*.dat*
Project.filter<7>=*wb_dat*
Project.filter<8>=*irq_contr*
Project.filter<9>=**
Project.icon.boundaryScanChain=1
Project.icon.enableExtTriggerIn=false
Project.icon.enableExtTriggerOut=false
Project.icon.triggerInPinName=
Project.icon.triggerOutPinName=
Project.unit.dimension=1
Project.unit<0>.clockChannel=sys_clk_125
Project.unit<0>.clockEdge=Rising
Project.unit<0>.dataChannel<0>=cmp_fmc_adc_100Ms_core/trig_align
Project.unit<0>.dataChannel<10>=cmp_fmc_adc_100Ms_core/int_trig_data<8>
Project.unit<0>.dataChannel<11>=cmp_fmc_adc_100Ms_core/int_trig_data<9>
Project.unit<0>.dataChannel<12>=cmp_fmc_adc_100Ms_core/int_trig_data<10>
Project.unit<0>.dataChannel<13>=cmp_fmc_adc_100Ms_core/int_trig_data<11>
Project.unit<0>.dataChannel<14>=cmp_fmc_adc_100Ms_core/int_trig_data<12>
Project.unit<0>.dataChannel<15>=cmp_fmc_adc_100Ms_core/int_trig_data<13>
Project.unit<0>.dataChannel<16>=cmp_fmc_adc_100Ms_core/int_trig_data<14>
Project.unit<0>.dataChannel<17>=cmp_fmc_adc_100Ms_core/int_trig_data<15>
Project.unit<0>.dataChannel<18>=cmp_fmc_adc_100Ms_core/int_trig_over_thres_d
Project.unit<0>.dataChannel<19>=cmp_fmc_adc_100Ms_core/int_trig_over_thres
Project.unit<0>.dataChannel<1>=cmp_fmc_adc_100Ms_core/trig
Project.unit<0>.dataChannel<20>=cmp_fmc_adc_100Ms_core/cmp_fmc_adc_100Ms_csr/fmc_adc_core_trig_cfg_int_trig_thres_o<0>
Project.unit<0>.dataChannel<21>=cmp_fmc_adc_100Ms_core/cmp_fmc_adc_100Ms_csr/fmc_adc_core_trig_cfg_int_trig_thres_o<1>
Project.unit<0>.dataChannel<22>=cmp_fmc_adc_100Ms_core/cmp_fmc_adc_100Ms_csr/fmc_adc_core_trig_cfg_int_trig_thres_o<2>
Project.unit<0>.dataChannel<23>=cmp_fmc_adc_100Ms_core/cmp_fmc_adc_100Ms_csr/fmc_adc_core_trig_cfg_int_trig_thres_o<3>
Project.unit<0>.dataChannel<24>=cmp_fmc_adc_100Ms_core/cmp_fmc_adc_100Ms_csr/fmc_adc_core_trig_cfg_int_trig_thres_o<4>
Project.unit<0>.dataChannel<25>=cmp_fmc_adc_100Ms_core/cmp_fmc_adc_100Ms_csr/fmc_adc_core_trig_cfg_int_trig_thres_o<5>
Project.unit<0>.dataChannel<26>=cmp_fmc_adc_100Ms_core/cmp_fmc_adc_100Ms_csr/fmc_adc_core_trig_cfg_int_trig_thres_o<6>
Project.unit<0>.dataChannel<27>=cmp_fmc_adc_100Ms_core/cmp_fmc_adc_100Ms_csr/fmc_adc_core_trig_cfg_int_trig_thres_o<7>
Project.unit<0>.dataChannel<28>=cmp_fmc_adc_100Ms_core/cmp_fmc_adc_100Ms_csr/fmc_adc_core_trig_cfg_int_trig_thres_o<8>
Project.unit<0>.dataChannel<29>=cmp_fmc_adc_100Ms_core/cmp_fmc_adc_100Ms_csr/fmc_adc_core_trig_cfg_int_trig_thres_o<9>
Project.unit<0>.dataChannel<2>=cmp_fmc_adc_100Ms_core/int_trig_data<0>
Project.unit<0>.dataChannel<30>=cmp_fmc_adc_100Ms_core/cmp_fmc_adc_100Ms_csr/fmc_adc_core_trig_cfg_int_trig_thres_o<10>
Project.unit<0>.dataChannel<31>=cmp_fmc_adc_100Ms_core/cmp_fmc_adc_100Ms_csr/fmc_adc_core_trig_cfg_int_trig_thres_o<11>
Project.unit<0>.dataChannel<32>=cmp_fmc_adc_100Ms_core/cmp_fmc_adc_100Ms_csr/fmc_adc_core_trig_cfg_int_trig_thres_o<12>
Project.unit<0>.dataChannel<33>=cmp_fmc_adc_100Ms_core/cmp_fmc_adc_100Ms_csr/fmc_adc_core_trig_cfg_int_trig_thres_o<13>
Project.unit<0>.dataChannel<34>=cmp_fmc_adc_100Ms_core/cmp_fmc_adc_100Ms_csr/fmc_adc_core_trig_cfg_int_trig_thres_o<14>
Project.unit<0>.dataChannel<35>=cmp_fmc_adc_100Ms_core/cmp_fmc_adc_100Ms_csr/fmc_adc_core_trig_cfg_int_trig_thres_o<15>
Project.unit<0>.dataChannel<36>=cmp_fmc_adc_100Ms_core/ext_trig_a
Project.unit<0>.dataChannel<37>=cmp_fmc_adc_100Ms_core/cmp_fmc_adc_100Ms_csr/fmc_adc_core_trig_cfg_sw_trig_en_o
Project.unit<0>.dataChannel<38>=cmp_fmc_adc_100Ms_core/cmp_fmc_adc_100Ms_csr/fmc_adc_core_trig_cfg_hw_trig_en_o
Project.unit<0>.dataChannel<39>=cmp_fmc_adc_100Ms_core/cmp_fmc_adc_100Ms_csr/fmc_adc_core_trig_cfg_int_trig_sel_o<0>
Project.unit<0>.dataChannel<3>=cmp_fmc_adc_100Ms_core/int_trig_data<1>
Project.unit<0>.dataChannel<40>=cmp_fmc_adc_100Ms_core/cmp_fmc_adc_100Ms_csr/fmc_adc_core_trig_cfg_int_trig_sel_o<1>
Project.unit<0>.dataChannel<41>=cmp_fmc_adc_100Ms_core/cmp_fmc_adc_100Ms_csr/fmc_adc_core_trig_cfg_hw_trig_pol_o
Project.unit<0>.dataChannel<4>=cmp_fmc_adc_100Ms_core/int_trig_data<2>
Project.unit<0>.dataChannel<5>=cmp_fmc_adc_100Ms_core/int_trig_data<3>
Project.unit<0>.dataChannel<6>=cmp_fmc_adc_100Ms_core/int_trig_data<4>
Project.unit<0>.dataChannel<7>=cmp_fmc_adc_100Ms_core/int_trig_data<5>
Project.unit<0>.dataChannel<8>=cmp_fmc_adc_100Ms_core/int_trig_data<6>
Project.unit<0>.dataChannel<9>=cmp_fmc_adc_100Ms_core/int_trig_data<7>
Project.unit<0>.dataDepth=2048
Project.unit<0>.dataEqualsTrigger=true
Project.unit<0>.dataPortWidth=125
Project.unit<0>.enableGaps=false
Project.unit<0>.enableStorageQualification=true
Project.unit<0>.enableTimestamps=false
Project.unit<0>.timestampDepth=0
Project.unit<0>.timestampWidth=0
Project.unit<0>.triggerChannel<0><0>=cmp_irq_controller/irq_p_o
Project.unit<0>.triggerChannel<0><100>=cmp_irq_controller/cmp_irq_controller_regs/rddata_reg<7>
Project.unit<0>.triggerChannel<0><101>=cmp_irq_controller/cmp_irq_controller_regs/rddata_reg<8>
Project.unit<0>.triggerChannel<0><102>=cmp_irq_controller/cmp_irq_controller_regs/rddata_reg<9>
Project.unit<0>.triggerChannel<0><103>=cmp_irq_controller/cmp_irq_controller_regs/rddata_reg<10>
Project.unit<0>.triggerChannel<0><104>=cmp_irq_controller/cmp_irq_controller_regs/rddata_reg<11>
Project.unit<0>.triggerChannel<0><105>=cmp_irq_controller/cmp_irq_controller_regs/rddata_reg<12>
Project.unit<0>.triggerChannel<0><106>=cmp_irq_controller/cmp_irq_controller_regs/rddata_reg<13>
Project.unit<0>.triggerChannel<0><107>=cmp_irq_controller/cmp_irq_controller_regs/rddata_reg<14>
Project.unit<0>.triggerChannel<0><108>=cmp_irq_controller/cmp_irq_controller_regs/rddata_reg<15>
Project.unit<0>.triggerChannel<0><109>=cmp_irq_controller/cmp_irq_controller_regs/rddata_reg<16>
Project.unit<0>.triggerChannel<0><10>=acq_end_irq_p
Project.unit<0>.triggerChannel<0><110>=cmp_irq_controller/cmp_irq_controller_regs/rddata_reg<17>
Project.unit<0>.triggerChannel<0><111>=cmp_irq_controller/cmp_irq_controller_regs/rddata_reg<18>
Project.unit<0>.triggerChannel<0><112>=cmp_irq_controller/cmp_irq_controller_regs/rddata_reg<19>
Project.unit<0>.triggerChannel<0><113>=cmp_irq_controller/cmp_irq_controller_regs/rddata_reg<20>
Project.unit<0>.triggerChannel<0><114>=cmp_irq_controller/cmp_irq_controller_regs/rddata_reg<21>
Project.unit<0>.triggerChannel<0><115>=cmp_irq_controller/cmp_irq_controller_regs/rddata_reg<22>
Project.unit<0>.triggerChannel<0><116>=cmp_irq_controller/cmp_irq_controller_regs/rddata_reg<23>
Project.unit<0>.triggerChannel<0><117>=cmp_irq_controller/cmp_irq_controller_regs/rddata_reg<24>
Project.unit<0>.triggerChannel<0><118>=cmp_irq_controller/cmp_irq_controller_regs/rddata_reg<25>
Project.unit<0>.triggerChannel<0><119>=cmp_irq_controller/cmp_irq_controller_regs/rddata_reg<26>
Project.unit<0>.triggerChannel<0><11>=acq_end_p
Project.unit<0>.triggerChannel<0><120>=cmp_irq_controller/cmp_irq_controller_regs/rddata_reg<27>
Project.unit<0>.triggerChannel<0><121>=cmp_irq_controller/cmp_irq_controller_regs/rddata_reg<28>
Project.unit<0>.triggerChannel<0><122>=cmp_irq_controller/cmp_irq_controller_regs/rddata_reg<29>
Project.unit<0>.triggerChannel<0><123>=cmp_irq_controller/cmp_irq_controller_regs/rddata_reg<30>
Project.unit<0>.triggerChannel<0><124>=cmp_irq_controller/cmp_irq_controller_regs/rddata_reg<31>
Project.unit<0>.triggerChannel<0><125>=
Project.unit<0>.triggerChannel<0><126>=
Project.unit<0>.triggerChannel<0><127>=
Project.unit<0>.triggerChannel<0><128>=
Project.unit<0>.triggerChannel<0><129>=
Project.unit<0>.triggerChannel<0><12>=ddr_wr_fifo_empty
Project.unit<0>.triggerChannel<0><13>=ddr_wr_fifo_empty_d
Project.unit<0>.triggerChannel<0><14>=trigger_p
Project.unit<0>.triggerChannel<0><15>=dma_irq<0>
Project.unit<0>.triggerChannel<0><16>=dma_irq<1>
Project.unit<0>.triggerChannel<0><17>=cmp_fmc_adc_100Ms_core/shots_done
Project.unit<0>.triggerChannel<0><18>=cmp_fmc_adc_100Ms_core/post_trig_done
Project.unit<0>.triggerChannel<0><19>=cmp_fmc_adc_100Ms_core/post_trig_cnt<0>
Project.unit<0>.triggerChannel<0><1>=cmp_irq_controller/irq_pending<0>
Project.unit<0>.triggerChannel<0><20>=cmp_fmc_adc_100Ms_core/post_trig_cnt<1>
Project.unit<0>.triggerChannel<0><21>=cmp_fmc_adc_100Ms_core/post_trig_cnt<2>
Project.unit<0>.triggerChannel<0><22>=cmp_fmc_adc_100Ms_core/post_trig_cnt<3>
Project.unit<0>.triggerChannel<0><23>=cmp_fmc_adc_100Ms_core/post_trig_cnt<4>
Project.unit<0>.triggerChannel<0><24>=cmp_fmc_adc_100Ms_core/post_trig_cnt<5>
Project.unit<0>.triggerChannel<0><25>=cmp_fmc_adc_100Ms_core/post_trig_cnt<6>
Project.unit<0>.triggerChannel<0><26>=cmp_fmc_adc_100Ms_core/post_trig_cnt<7>
Project.unit<0>.triggerChannel<0><27>=cmp_fmc_adc_100Ms_core/post_trig_cnt<8>
Project.unit<0>.triggerChannel<0><28>=cmp_fmc_adc_100Ms_core/post_trig_cnt<9>
Project.unit<0>.triggerChannel<0><29>=cmp_fmc_adc_100Ms_core/post_trig_cnt<10>
Project.unit<0>.triggerChannel<0><2>=cmp_irq_controller/irq_pending<1>
Project.unit<0>.triggerChannel<0><30>=cmp_fmc_adc_100Ms_core/post_trig_cnt<11>
Project.unit<0>.triggerChannel<0><31>=cmp_fmc_adc_100Ms_core/post_trig_cnt<12>
Project.unit<0>.triggerChannel<0><32>=cmp_fmc_adc_100Ms_core/post_trig_cnt<13>
Project.unit<0>.triggerChannel<0><33>=cmp_fmc_adc_100Ms_core/post_trig_cnt<14>
Project.unit<0>.triggerChannel<0><34>=cmp_fmc_adc_100Ms_core/post_trig_cnt<15>
Project.unit<0>.triggerChannel<0><35>=cmp_fmc_adc_100Ms_core/post_trig_cnt<16>
Project.unit<0>.triggerChannel<0><36>=cmp_fmc_adc_100Ms_core/post_trig_cnt<17>
Project.unit<0>.triggerChannel<0><37>=cmp_fmc_adc_100Ms_core/post_trig_cnt<18>
Project.unit<0>.triggerChannel<0><38>=cmp_fmc_adc_100Ms_core/post_trig_cnt<19>
Project.unit<0>.triggerChannel<0><39>=cmp_fmc_adc_100Ms_core/post_trig_cnt<20>
Project.unit<0>.triggerChannel<0><3>=cmp_irq_controller/irq_pending<2>
Project.unit<0>.triggerChannel<0><40>=cmp_fmc_adc_100Ms_core/post_trig_cnt<21>
Project.unit<0>.triggerChannel<0><41>=cmp_fmc_adc_100Ms_core/post_trig_cnt<22>
Project.unit<0>.triggerChannel<0><42>=cmp_fmc_adc_100Ms_core/post_trig_cnt<23>
Project.unit<0>.triggerChannel<0><43>=cmp_fmc_adc_100Ms_core/post_trig_cnt<24>
Project.unit<0>.triggerChannel<0><44>=cmp_fmc_adc_100Ms_core/post_trig_cnt<25>
Project.unit<0>.triggerChannel<0><45>=cmp_fmc_adc_100Ms_core/post_trig_cnt<26>
Project.unit<0>.triggerChannel<0><46>=cmp_fmc_adc_100Ms_core/post_trig_cnt<27>
Project.unit<0>.triggerChannel<0><47>=cmp_fmc_adc_100Ms_core/post_trig_cnt<28>
Project.unit<0>.triggerChannel<0><48>=cmp_fmc_adc_100Ms_core/post_trig_cnt<29>
Project.unit<0>.triggerChannel<0><49>=cmp_fmc_adc_100Ms_core/post_trig_cnt<30>
Project.unit<0>.triggerChannel<0><4>=cmp_irq_controller/irq_pending<3>
Project.unit<0>.triggerChannel<0><50>=cmp_fmc_adc_100Ms_core/post_trig_cnt<31>
Project.unit<0>.triggerChannel<0><51>=cmp_fmc_adc_100Ms_core/sync_fifo_valid
Project.unit<0>.triggerChannel<0><52>=cmp_fmc_adc_100Ms_core/acq_fsm_current_state_FSM_FFd1
Project.unit<0>.triggerChannel<0><53>=cmp_fmc_adc_100Ms_core/acq_fsm_current_state_FSM_FFd2
Project.unit<0>.triggerChannel<0><54>=cmp_fmc_adc_100Ms_core/acq_fsm_current_state_FSM_FFd3
Project.unit<0>.triggerChannel<0><55>=cmp_irq_controller/cmp_irq_controller_regs/irq_ctrl_src_load_o
Project.unit<0>.triggerChannel<0><56>=cnx_master_out[4]_dat<0>
Project.unit<0>.triggerChannel<0><57>=cnx_master_out[4]_dat<1>
Project.unit<0>.triggerChannel<0><58>=cnx_master_out[4]_dat<2>
Project.unit<0>.triggerChannel<0><59>=cnx_master_out[4]_dat<3>
Project.unit<0>.triggerChannel<0><5>=cmp_irq_controller/multi_irq<0>
Project.unit<0>.triggerChannel<0><60>=cnx_master_out[4]_dat<4>
Project.unit<0>.triggerChannel<0><61>=cnx_master_out[4]_dat<5>
Project.unit<0>.triggerChannel<0><62>=cnx_master_out[4]_dat<6>
Project.unit<0>.triggerChannel<0><63>=cnx_master_out[4]_dat<7>
Project.unit<0>.triggerChannel<0><64>=cnx_master_out[4]_dat<8>
Project.unit<0>.triggerChannel<0><65>=cnx_master_out[4]_dat<9>
Project.unit<0>.triggerChannel<0><66>=cnx_master_out[4]_dat<10>
Project.unit<0>.triggerChannel<0><67>=cnx_master_out[4]_dat<11>
Project.unit<0>.triggerChannel<0><68>=cnx_master_out[4]_dat<12>
Project.unit<0>.triggerChannel<0><69>=cnx_master_out[4]_dat<13>
Project.unit<0>.triggerChannel<0><6>=cmp_irq_controller/multi_irq<1>
Project.unit<0>.triggerChannel<0><70>=cnx_master_out[4]_dat<14>
Project.unit<0>.triggerChannel<0><71>=cnx_master_out[4]_dat<15>
Project.unit<0>.triggerChannel<0><72>=cnx_master_out[4]_dat<16>
Project.unit<0>.triggerChannel<0><73>=cnx_master_out[4]_dat<17>
Project.unit<0>.triggerChannel<0><74>=cnx_master_out[4]_dat<18>
Project.unit<0>.triggerChannel<0><75>=cnx_master_out[4]_dat<19>
Project.unit<0>.triggerChannel<0><76>=cnx_master_out[4]_dat<20>
Project.unit<0>.triggerChannel<0><77>=cnx_master_out[4]_dat<21>
Project.unit<0>.triggerChannel<0><78>=cnx_master_out[4]_dat<22>
Project.unit<0>.triggerChannel<0><79>=cnx_master_out[4]_dat<23>
Project.unit<0>.triggerChannel<0><7>=cmp_irq_controller/multi_irq<2>
Project.unit<0>.triggerChannel<0><80>=cnx_master_out[4]_dat<24>
Project.unit<0>.triggerChannel<0><81>=cnx_master_out[4]_dat<25>
Project.unit<0>.triggerChannel<0><82>=cnx_master_out[4]_dat<26>
Project.unit<0>.triggerChannel<0><83>=cnx_master_out[4]_dat<27>
Project.unit<0>.triggerChannel<0><84>=cnx_master_out[4]_dat<28>
Project.unit<0>.triggerChannel<0><85>=cnx_master_out[4]_dat<29>
Project.unit<0>.triggerChannel<0><86>=cnx_master_out[4]_dat<30>
Project.unit<0>.triggerChannel<0><87>=cnx_master_out[4]_dat<31>
Project.unit<0>.triggerChannel<0><88>=cnx_master_out[4]_adr<2>
Project.unit<0>.triggerChannel<0><89>=cnx_master_out[4]_adr<3>
Project.unit<0>.triggerChannel<0><8>=cmp_irq_controller/multi_irq<3>
Project.unit<0>.triggerChannel<0><90>=cnx_master_out[4]_cyc
Project.unit<0>.triggerChannel<0><91>=cnx_master_out[4]_stb
Project.unit<0>.triggerChannel<0><92>=cnx_master_out[4]_we
Project.unit<0>.triggerChannel<0><93>=cmp_irq_controller/cmp_irq_controller_regs/rddata_reg<0>
Project.unit<0>.triggerChannel<0><94>=cmp_irq_controller/cmp_irq_controller_regs/rddata_reg<1>
Project.unit<0>.triggerChannel<0><95>=cmp_irq_controller/cmp_irq_controller_regs/rddata_reg<2>
Project.unit<0>.triggerChannel<0><96>=cmp_irq_controller/cmp_irq_controller_regs/rddata_reg<3>
Project.unit<0>.triggerChannel<0><97>=cmp_irq_controller/cmp_irq_controller_regs/rddata_reg<4>
Project.unit<0>.triggerChannel<0><98>=cmp_irq_controller/cmp_irq_controller_regs/rddata_reg<5>
Project.unit<0>.triggerChannel<0><99>=cmp_irq_controller/cmp_irq_controller_regs/rddata_reg<6>
Project.unit<0>.triggerChannel<0><9>=acq_end
Project.unit<0>.triggerConditionCountWidth=0
Project.unit<0>.triggerMatchCount<0>=3
Project.unit<0>.triggerMatchCountWidth<0><0>=5
Project.unit<0>.triggerMatchCountWidth<0><1>=5
Project.unit<0>.triggerMatchCountWidth<0><2>=5
Project.unit<0>.triggerMatchType<0><0>=1
Project.unit<0>.triggerMatchType<0><1>=1
Project.unit<0>.triggerMatchType<0><2>=1
Project.unit<0>.triggerPortCount=1
Project.unit<0>.triggerPortIsData<0>=true
Project.unit<0>.triggerPortWidth<0>=125
Project.unit<0>.triggerSequencerLevels=16
Project.unit<0>.triggerSequencerType=1
Project.unit<0>.type=ilapro
