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FMC ADC 100M 14b 4cha - Gateware
Commits
057f2413
Commit
057f2413
authored
Mar 11, 2013
by
Matthieu Cattin
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sim: Reproduce the multishot bad behaviour.
Is not recording the rigth amount of samples in the ddr.
parent
eb67f948
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4 changed files
with
555 additions
and
349 deletions
+555
-349
Makefile
hdl/spec/sim/Makefile
+376
-183
cmd0.vec
hdl/spec/sim/cmd0.vec
+8
-8
spec.do
hdl/spec/sim/spec.do
+2
-2
wave_adc_core.do
hdl/spec/sim/wave_adc_core.do
+169
-156
No files found.
hdl/spec/sim/Makefile
View file @
057f2413
...
...
@@ -45,10 +45,10 @@ work/lm32_shifter/.lm32_shifter_v \
work/lm32_multiplier/.lm32_multiplier_v
\
work/jtag_tap/.jtag_tap_v
\
VHDL_SRC
:=
testbench/gn412x_bfm.vhd
\
testbench/cmd_router.vhd
\
VHDL_SRC
:=
testbench/util.vhd
\
testbench/textutil.vhd
\
testbench/util.vhd
\
testbench/mem_model.vhd
\
testbench/cmd_router.vhd
\
testbench/tb_spec.vhd
\
testbench/cmd_router1.vhd
\
../ip_cores/adc_sync_fifo.vhd
\
...
...
@@ -56,25 +56,27 @@ testbench/cmd_router1.vhd \
../ip_cores/wb_ddr_fifo.vhd
\
../ip_cores/adc_serdes.vhd
\
../ip_cores/monostable/monostable_rtl.vhd
\
../ip_cores/ext_pulse_sync/ext_pulse_sync_rtl.vhd
\
../ip_cores/utils/utils_pkg.vhd
\
../rtl/spec_top_fmc_adc_100Ms.vhd
\
../ip_cores/ext_pulse_sync/ext_pulse_sync_rtl.vhd
\
../ip_cores/general-cores/modules/genrams/genram_pkg.vhd
\
../rtl/carrier_csr.vhd
\
../rtl/utc_core_regs.vhd
\
../rtl/utc_core.vhd
\
../rtl/irq_controller_regs.vhd
\
../rtl/irq_controller.vhd
\
testbench/mem_model.vhd
\
../../adc/rtl/fmc_adc_100Ms_core.vhd
\
../../adc/rtl/fmc_adc_100Ms_core_pkg.vhd
\
testbench/gn412x_bfm.vhd
\
../ip_cores/general-cores/modules/wishbone/wishbone_pkg.vhd
\
../ip_cores/general-cores/modules/common/gencores_pkg.vhd
\
../../adc/rtl/fmc_adc_100Ms_csr.vhd
\
../../adc/rtl/offset_gain_s.vhd
\
../
ip_cores/general-cores/modules/common/gencores
_pkg.vhd
\
../
rtl/sdb_meta
_pkg.vhd
\
../ip_cores/general-cores/modules/common/gc_crc_gen.vhd
\
../ip_cores/general-cores/modules/common/gc_moving_average.vhd
\
../ip_cores/general-cores/modules/common/gc_extend_pulse.vhd
\
../ip_cores/general-cores/modules/common/gc_delay_gen.vhd
\
../ip_cores/general-cores/modules/common/gc_dual_pi_controller.vhd
\
../ip_cores/general-cores/modules/common/gc_reset.vhd
\
../ip_cores/general-cores/modules/common/gc_serial_dac.vhd
\
../ip_cores/general-cores/modules/common/gc_sync_ffs.vhd
\
../ip_cores/general-cores/modules/common/gc_arbitrated_mux.vhd
\
...
...
@@ -82,22 +84,17 @@ testbench/mem_model.vhd \
../ip_cores/general-cores/modules/common/gc_frequency_meter.vhd
\
../ip_cores/general-cores/modules/common/gc_dual_clock_ram.vhd
\
../ip_cores/general-cores/modules/common/gc_wfifo.vhd
\
../ip_cores/general-cores/modules/common/gc_rr_arbiter.vhd
\
../ip_cores/general-cores/modules/common/gc_prio_encoder.vhd
\
../ip_cores/general-cores/modules/common/gc_word_packer.vhd
\
../ip_cores/general-cores/modules/genrams/genram_pkg.vhd
\
../../adc/rtl/fmc_adc_100Ms_core.vhd
\
../ip_cores/general-cores/modules/genrams/memory_loader_pkg.vhd
\
../ip_cores/general-cores/modules/genrams/generic_shiftreg_fifo.vhd
\
../ip_cores/general-cores/modules/genrams/inferred_sync_fifo.vhd
\
../ip_cores/general-cores/modules/genrams/inferred_async_fifo.vhd
\
../ip_cores/general-cores/modules/wishbone/wishbone_pkg.vhd
\
../ip_cores/ddr3-sp6-core/hdl/rtl/ddr3_ctrl_pkg.vhd
\
../ip_cores/general-cores/modules/genrams/xilinx/generic_dpram.vhd
\
../ip_cores/general-cores/modules/genrams/xilinx/generic_dpram_sameclock.vhd
\
../ip_cores/general-cores/modules/genrams/xilinx/generic_dpram_dualclock.vhd
\
../ip_cores/general-cores/modules/genrams/xilinx/generic_spram.vhd
\
../ip_cores/general-cores/modules/genrams/xilinx/
gc_shiftreg
.vhd
\
../ip_cores/general-cores/modules/genrams/
generic/generic_a
sync_fifo.vhd
\
../ip_cores/general-cores/modules/genrams/
generic/generic_sync_fifo
.vhd
\
../ip_cores/general-cores/modules/genrams/xilinx/
spartan6/generic_async_fifo
.vhd
\
../ip_cores/general-cores/modules/genrams/
xilinx/spartan6/generic_
sync_fifo.vhd
\
../ip_cores/general-cores/modules/genrams/
xilinx/sim_stub/dummy
.vhd
\
../ip_cores/general-cores/modules/wishbone/wb_async_bridge/wb_async_bridge.vhd
\
../ip_cores/general-cores/modules/wishbone/wb_async_bridge/xwb_async_bridge.vhd
\
../ip_cores/general-cores/modules/wishbone/wb_onewire_master/wb_onewire_master.vhd
\
...
...
@@ -116,12 +113,12 @@ testbench/mem_model.vhd \
../ip_cores/general-cores/modules/wishbone/wb_uart/uart_async_rx.vhd
\
../ip_cores/general-cores/modules/wishbone/wb_uart/uart_async_tx.vhd
\
../ip_cores/general-cores/modules/wishbone/wb_uart/uart_baud_gen.vhd
\
../ip_cores/general-cores/modules/wishbone/wb_uart/simple_uart_wb.vhd
\
../ip_cores/general-cores/modules/wishbone/wb_uart/simple_uart_pkg.vhd
\
../ip_cores/general-cores/modules/wishbone/wb_uart/simple_uart_wb.vhd
\
../ip_cores/general-cores/modules/wishbone/wb_uart/wb_simple_uart.vhd
\
../ip_cores/general-cores/modules/wishbone/wb_uart/xwb_simple_uart.vhd
\
../ip_cores/general-cores/modules/wishbone/wb_vic/vic_prio_enc.vhd
\
../ip_cores/general-cores/modules/wishbone/wb
_vic/wb_slave_vic
.vhd
\
../ip_cores/general-cores/modules/wishbone/wb
gen2/wbgen2_pkg
.vhd
\
../ip_cores/general-cores/modules/wishbone/wb_vic/wb_vic.vhd
\
../ip_cores/general-cores/modules/wishbone/wb_vic/xwb_vic.vhd
\
../ip_cores/general-cores/modules/wishbone/wb_spi/wb_spi.vhd
\
...
...
@@ -131,22 +128,23 @@ testbench/mem_model.vhd \
../ip_cores/general-cores/modules/wishbone/wb_crossbar/xwb_sdb_crossbar.vhd
\
../ip_cores/general-cores/modules/wishbone/wb_lm32/generated/xwb_lm32.vhd
\
../ip_cores/general-cores/modules/wishbone/wb_slave_adapter/wb_slave_adapter.vhd
\
../ip_cores/general-cores/modules/wishbone/wb_xilinx_fpga_loader/wb_xilinx_fpga_loader.vhd
\
../ip_cores/general-cores/modules/wishbone/wb_xilinx_fpga_loader/xwb_xilinx_fpga_loader.vhd
\
../ip_cores/general-cores/modules/wishbone/wb_xilinx_fpga_loader/xloader_registers_pkg.vhd
\
../ip_cores/general-cores/modules/wishbone/wb_xilinx_fpga_loader/xwb_xilinx_fpga_loader.vhd
\
../ip_cores/general-cores/modules/wishbone/wb_xilinx_fpga_loader/wb_xilinx_fpga_loader.vhd
\
../ip_cores/general-cores/modules/wishbone/wb_xilinx_fpga_loader/xloader_wb.vhd
\
../ip_cores/general-cores/modules/wishbone/wb_clock_crossing/xwb_clock_crossing.vhd
\
../ip_cores/general-cores/modules/wishbone/wb_dma/xwb_dma.vhd
\
../ip_cores/general-cores/modules/wishbone/wb_serial_lcd/wb_serial_lcd.vhd
\
../ip_cores/general-cores/modules/wishbone/wbgen2/wbgen2_dpssram.vhd
\
../ip_cores/general-cores/modules/wishbone/wbgen2/wbgen2_eic.vhd
\
../ip_cores/general-cores/modules/wishbone/wbgen2/wbgen2_fifo_async.vhd
\
../ip_cores/general-cores/modules/wishbone/wbgen2/wbgen2_fifo_sync.vhd
\
../ip_cores/general-cores/modules/wishbone/wb
gen2/wbgen2_pkg
.vhd
\
../ip_cores/general-cores/modules/wishbone/wb
_vic/wb_slave_vic
.vhd
\
../ip_cores/ddr3-sp6-core/hdl/rtl/ddr3_ctrl.vhd
\
../ip_cores/ddr3-sp6-core/hdl/rtl/ddr3_ctrl_wb.vhd
\
../ip_cores/ddr3-sp6-core/hdl/rtl/ddr3_ctrl_wrapper.vhd
\
../ip_cores/ddr3-sp6-core/hdl/rtl/ddr3_ctrl_wrapper_pkg.vhd
\
../ip_cores/ddr3-sp6-core/hdl/rtl/ddr3_ctrl_pkg.vhd
\
../ip_cores/ddr3-sp6-core/hdl/rtl/ddr3_ctrl_wrapper.vhd
\
../ip_cores/gn4124-core/hdl/gn4124core/rtl/spartan6/gn4124_core_pkg.vhd
\
../ip_cores/ddr3-sp6-core/hdl/spec/ip_cores/ddr3_ctrl_spec_bank3_64b_32b/user_design/rtl/ddr3_ctrl_spec_bank3_64b_32b.vhd
\
../ip_cores/ddr3-sp6-core/hdl/spec/ip_cores/ddr3_ctrl_spec_bank3_64b_32b/user_design/rtl/memc3_infrastructure.vhd
\
../ip_cores/ddr3-sp6-core/hdl/spec/ip_cores/ddr3_ctrl_spec_bank3_64b_32b/user_design/rtl/memc3_wrapper.vhd
\
...
...
@@ -163,7 +161,7 @@ testbench/mem_model.vhd \
../ip_cores/gn4124-core/hdl/gn4124core/rtl/p2l_dma_master.vhd
\
../ip_cores/gn4124-core/hdl/gn4124core/rtl/wbmaster32.vhd
\
../ip_cores/gn4124-core/hdl/gn4124core/rtl/spartan6/gn4124_core.vhd
\
../
ip_cores/gn4124-core/hdl/gn4124core/rtl/spartan6/gn4124_core_pkg
.vhd
\
../
rtl/spec_top_fmc_adc_100Ms
.vhd
\
../ip_cores/gn4124-core/hdl/gn4124core/rtl/spartan6/l2p_ser.vhd
\
../ip_cores/gn4124-core/hdl/gn4124core/rtl/spartan6/p2l_des.vhd
\
../ip_cores/gn4124-core/hdl/gn4124core/rtl/spartan6/serdes_1_to_n_clk_pll_s2_diff.vhd
\
...
...
@@ -172,10 +170,10 @@ testbench/mem_model.vhd \
../ip_cores/gn4124-core/hdl/gn4124core/rtl/spartan6/serdes_n_to_1_s2_se.vhd
\
../ip_cores/gn4124-core/hdl/gn4124core/rtl/spartan6/pulse_sync_rtl.vhd
\
VHDL_OBJ
:=
work/gn412x_bfm/.gn412x_bfm_vhd
\
work/cmd_router/.cmd_router_vhd
\
VHDL_OBJ
:=
work/util/.util_vhd
\
work/textutil/.textutil_vhd
\
work/util/.util_vhd
\
work/mem_model/.mem_model_vhd
\
work/cmd_router/.cmd_router_vhd
\
work/tb_spec/.tb_spec_vhd
\
work/cmd_router1/.cmd_router1_vhd
\
work/adc_sync_fifo/.adc_sync_fifo_vhd
\
...
...
@@ -183,25 +181,27 @@ work/multishot_dpram/.multishot_dpram_vhd \
work/wb_ddr_fifo/.wb_ddr_fifo_vhd
\
work/adc_serdes/.adc_serdes_vhd
\
work/monostable_rtl/.monostable_rtl_vhd
\
work/ext_pulse_sync_rtl/.ext_pulse_sync_rtl_vhd
\
work/utils_pkg/.utils_pkg_vhd
\
work/spec_top_fmc_adc_100Ms/.spec_top_fmc_adc_100Ms_vhd
\
work/ext_pulse_sync_rtl/.ext_pulse_sync_rtl_vhd
\
work/genram_pkg/.genram_pkg_vhd
\
work/carrier_csr/.carrier_csr_vhd
\
work/utc_core_regs/.utc_core_regs_vhd
\
work/utc_core/.utc_core_vhd
\
work/irq_controller_regs/.irq_controller_regs_vhd
\
work/irq_controller/.irq_controller_vhd
\
work/mem_model/.mem_model_vhd
\
work/fmc_adc_100Ms_core/.fmc_adc_100Ms_core_vhd
\
work/fmc_adc_100Ms_core_pkg/.fmc_adc_100Ms_core_pkg_vhd
\
work/gn412x_bfm/.gn412x_bfm_vhd
\
work/wishbone_pkg/.wishbone_pkg_vhd
\
work/gencores_pkg/.gencores_pkg_vhd
\
work/fmc_adc_100Ms_csr/.fmc_adc_100Ms_csr_vhd
\
work/offset_gain_s/.offset_gain_s_vhd
\
work/
gencores_pkg/.gencores
_pkg_vhd
\
work/
sdb_meta_pkg/.sdb_meta
_pkg_vhd
\
work/gc_crc_gen/.gc_crc_gen_vhd
\
work/gc_moving_average/.gc_moving_average_vhd
\
work/gc_extend_pulse/.gc_extend_pulse_vhd
\
work/gc_delay_gen/.gc_delay_gen_vhd
\
work/gc_dual_pi_controller/.gc_dual_pi_controller_vhd
\
work/gc_reset/.gc_reset_vhd
\
work/gc_serial_dac/.gc_serial_dac_vhd
\
work/gc_sync_ffs/.gc_sync_ffs_vhd
\
work/gc_arbitrated_mux/.gc_arbitrated_mux_vhd
\
...
...
@@ -209,22 +209,17 @@ work/gc_pulse_synchronizer/.gc_pulse_synchronizer_vhd \
work/gc_frequency_meter/.gc_frequency_meter_vhd
\
work/gc_dual_clock_ram/.gc_dual_clock_ram_vhd
\
work/gc_wfifo/.gc_wfifo_vhd
\
work/gc_rr_arbiter/.gc_rr_arbiter_vhd
\
work/gc_prio_encoder/.gc_prio_encoder_vhd
\
work/gc_word_packer/.gc_word_packer_vhd
\
work/genram_pkg/.genram_pkg_vhd
\
work/fmc_adc_100Ms_core/.fmc_adc_100Ms_core_vhd
\
work/memory_loader_pkg/.memory_loader_pkg_vhd
\
work/generic_shiftreg_fifo/.generic_shiftreg_fifo_vhd
\
work/inferred_sync_fifo/.inferred_sync_fifo_vhd
\
work/inferred_async_fifo/.inferred_async_fifo_vhd
\
work/wishbone_pkg/.wishbone_pkg_vhd
\
work/ddr3_ctrl_pkg/.ddr3_ctrl_pkg_vhd
\
work/generic_dpram/.generic_dpram_vhd
\
work/generic_dpram_sameclock/.generic_dpram_sameclock_vhd
\
work/generic_dpram_dualclock/.generic_dpram_dualclock_vhd
\
work/generic_spram/.generic_spram_vhd
\
work/gc_shiftreg/.gc_shiftreg_vhd
\
work/generic_async_fifo/.generic_async_fifo_vhd
\
work/generic_sync_fifo/.generic_sync_fifo_vhd
\
fifo_generator_v6_1/dummy/.dummy_vhd
\
work/wb_async_bridge/.wb_async_bridge_vhd
\
work/xwb_async_bridge/.xwb_async_bridge_vhd
\
work/wb_onewire_master/.wb_onewire_master_vhd
\
...
...
@@ -243,12 +238,12 @@ work/xwb_tics/.xwb_tics_vhd \
work/uart_async_rx/.uart_async_rx_vhd
\
work/uart_async_tx/.uart_async_tx_vhd
\
work/uart_baud_gen/.uart_baud_gen_vhd
\
work/simple_uart_wb/.simple_uart_wb_vhd
\
work/simple_uart_pkg/.simple_uart_pkg_vhd
\
work/simple_uart_wb/.simple_uart_wb_vhd
\
work/wb_simple_uart/.wb_simple_uart_vhd
\
work/xwb_simple_uart/.xwb_simple_uart_vhd
\
work/vic_prio_enc/.vic_prio_enc_vhd
\
work/wb
_slave_vic/.wb_slave_vic
_vhd
\
work/wb
gen2_pkg/.wbgen2_pkg
_vhd
\
work/wb_vic/.wb_vic_vhd
\
work/xwb_vic/.xwb_vic_vhd
\
work/wb_spi/.wb_spi_vhd
\
...
...
@@ -258,22 +253,23 @@ work/xwb_crossbar/.xwb_crossbar_vhd \
work/xwb_sdb_crossbar/.xwb_sdb_crossbar_vhd
\
work/xwb_lm32/.xwb_lm32_vhd
\
work/wb_slave_adapter/.wb_slave_adapter_vhd
\
work/wb_xilinx_fpga_loader/.wb_xilinx_fpga_loader_vhd
\
work/xwb_xilinx_fpga_loader/.xwb_xilinx_fpga_loader_vhd
\
work/xloader_registers_pkg/.xloader_registers_pkg_vhd
\
work/xwb_xilinx_fpga_loader/.xwb_xilinx_fpga_loader_vhd
\
work/wb_xilinx_fpga_loader/.wb_xilinx_fpga_loader_vhd
\
work/xloader_wb/.xloader_wb_vhd
\
work/xwb_clock_crossing/.xwb_clock_crossing_vhd
\
work/xwb_dma/.xwb_dma_vhd
\
work/wb_serial_lcd/.wb_serial_lcd_vhd
\
work/wbgen2_dpssram/.wbgen2_dpssram_vhd
\
work/wbgen2_eic/.wbgen2_eic_vhd
\
work/wbgen2_fifo_async/.wbgen2_fifo_async_vhd
\
work/wbgen2_fifo_sync/.wbgen2_fifo_sync_vhd
\
work/wb
gen2_pkg/.wbgen2_pkg
_vhd
\
work/wb
_slave_vic/.wb_slave_vic
_vhd
\
work/ddr3_ctrl/.ddr3_ctrl_vhd
\
work/ddr3_ctrl_wb/.ddr3_ctrl_wb_vhd
\
work/ddr3_ctrl_wrapper/.ddr3_ctrl_wrapper_vhd
\
work/ddr3_ctrl_wrapper_pkg/.ddr3_ctrl_wrapper_pkg_vhd
\
work/ddr3_ctrl_pkg/.ddr3_ctrl_pkg_vhd
\
work/ddr3_ctrl_wrapper/.ddr3_ctrl_wrapper_vhd
\
work/gn4124_core_pkg/.gn4124_core_pkg_vhd
\
work/ddr3_ctrl_spec_bank3_64b_32b/.ddr3_ctrl_spec_bank3_64b_32b_vhd
\
work/memc3_infrastructure/.memc3_infrastructure_vhd
\
work/memc3_wrapper/.memc3_wrapper_vhd
\
...
...
@@ -290,7 +286,7 @@ work/p2l_decode32/.p2l_decode32_vhd \
work/p2l_dma_master/.p2l_dma_master_vhd
\
work/wbmaster32/.wbmaster32_vhd
\
work/gn4124_core/.gn4124_core_vhd
\
work/
gn4124_core_pkg/.gn4124_core_pkg
_vhd
\
work/
spec_top_fmc_adc_100Ms/.spec_top_fmc_adc_100Ms
_vhd
\
work/l2p_ser/.l2p_ser_vhd
\
work/p2l_des/.p2l_des_vhd
\
work/serdes_1_to_n_clk_pll_s2_diff/.serdes_1_to_n_clk_pll_s2_diff_vhd
\
...
...
@@ -299,8 +295,8 @@ work/serdes_n_to_1_s2_diff/.serdes_n_to_1_s2_diff_vhd \
work/serdes_n_to_1_s2_se/.serdes_n_to_1_s2_se_vhd
\
work/pulse_sync_rtl/.pulse_sync_rtl_vhd
\
LIBS
:=
work
LIB_IND
:=
work/.work
LIBS
:=
work
fifo_generator_v6_1
LIB_IND
:=
work/.work
fifo_generator_v6_1/.fifo_generator_v6_1
## rules #################################
sim
:
modelsim.ini $(LIB_IND) $(VERILOG_OBJ) $(VHDL_OBJ)
$(VERILOG_OBJ)
:
$(VHDL_OBJ)
...
...
@@ -315,6 +311,9 @@ clean:
work/.work
:
(
vlib work
&&
vmap
-modelsimini
modelsim.ini work
&&
touch
work/.work
)||
rm
-rf
work
fifo_generator_v6_1/.fifo_generator_v6_1
:
(
vlib fifo_generator_v6_1
&&
vmap
-modelsimini
modelsim.ini fifo_generator_v6_1
&&
touch
fifo_generator_v6_1/.fifo_generator_v6_1
)||
rm
-rf
fifo_generator_v6_1
work/ddr3/.ddr3_v
:
sim_models/2048Mb_ddr3/ddr3.v sim_models/2048Mb_ddr3/ddr3_parameters.vh
vlog
-work
work
$(VLOG_FLAGS)
+incdir+sim_models/2048Mb_ddr3 +incdir+sim_models/2048Mb_ddr3 +define+sg15E +define+x16
$<
@
mkdir
-p
$
(
dir
$@
)
&&
touch
$@
...
...
@@ -325,17 +324,17 @@ work/sockit_owm/.sockit_owm_v: ../ip_cores/general-cores/modules/wishbone/wb_one
@
mkdir
-p
$
(
dir
$@
)
&&
touch
$@
work/spi_clgen/.spi_clgen_v
:
../ip_cores/general-cores/modules/wishbone/wb_spi/spi_clgen.v ../ip_cores/general-cores/modules/wishbone/wb_spi/
spi_defines.v ../ip_cores/general-cores/modules/wishbone/wb_spi/timescale
.v
work/spi_clgen/.spi_clgen_v
:
../ip_cores/general-cores/modules/wishbone/wb_spi/spi_clgen.v ../ip_cores/general-cores/modules/wishbone/wb_spi/
timescale.v ../ip_cores/general-cores/modules/wishbone/wb_spi/spi_defines
.v
vlog
-work
work
$(VLOG_FLAGS)
+incdir+../ip_cores/general-cores/modules/wishbone/wb_spi
$<
@
mkdir
-p
$
(
dir
$@
)
&&
touch
$@
work/spi_shift/.spi_shift_v
:
../ip_cores/general-cores/modules/wishbone/wb_spi/spi_shift.v ../ip_cores/general-cores/modules/wishbone/wb_spi/
spi_defines.v ../ip_cores/general-cores/modules/wishbone/wb_spi/timescale
.v
work/spi_shift/.spi_shift_v
:
../ip_cores/general-cores/modules/wishbone/wb_spi/spi_shift.v ../ip_cores/general-cores/modules/wishbone/wb_spi/
timescale.v ../ip_cores/general-cores/modules/wishbone/wb_spi/spi_defines
.v
vlog
-work
work
$(VLOG_FLAGS)
+incdir+../ip_cores/general-cores/modules/wishbone/wb_spi
$<
@
mkdir
-p
$
(
dir
$@
)
&&
touch
$@
work/spi_top/.spi_top_v
:
../ip_cores/general-cores/modules/wishbone/wb_spi/spi_top.v ../ip_cores/general-cores/modules/wishbone/wb_spi/
spi_defines.v ../ip_cores/general-cores/modules/wishbone/wb_spi/timescale
.v
work/spi_top/.spi_top_v
:
../ip_cores/general-cores/modules/wishbone/wb_spi/spi_top.v ../ip_cores/general-cores/modules/wishbone/wb_spi/
timescale.v ../ip_cores/general-cores/modules/wishbone/wb_spi/spi_defines
.v
vlog
-work
work
$(VLOG_FLAGS)
+incdir+../ip_cores/general-cores/modules/wishbone/wb_spi
$<
@
mkdir
-p
$
(
dir
$@
)
&&
touch
$@
...
...
@@ -406,8 +405,8 @@ work/textutil/.textutil_vhd: testbench/textutil.vhd
@
mkdir
-p
$
(
dir
$@
)
&&
touch
$@
work/textutil/.textutil
_vhd
:
\
work/util/.util
_vhd
work/textutil/.textutil
:
\
work/util/.util
work/mem_model/.mem_model_vhd
:
testbench/mem_model.vhd
vcom
$(VCOM_FLAGS)
-87
-work
work
$<
...
...
@@ -419,27 +418,27 @@ work/cmd_router/.cmd_router_vhd: testbench/cmd_router.vhd
@
mkdir
-p
$
(
dir
$@
)
&&
touch
$@
work/cmd_router/.cmd_router
_vhd
:
\
work/
textutil/.textutil_vhd
\
work/
util/.util_vhd
work/cmd_router/.cmd_router
:
\
work/
util/.util
\
work/
textutil/.textutil
work/tb_spec/.tb_spec_vhd
:
testbench/tb_spec.vhd
vcom
$(VCOM_FLAGS)
-work
work
$<
@
mkdir
-p
$
(
dir
$@
)
&&
touch
$@
work/tb_spec/.tb_spec
_vhd
:
\
work/
textutil/.textutil_vhd
\
work/
util/.util_vhd
work/tb_spec/.tb_spec
:
\
work/
util/.util
\
work/
textutil/.textutil
work/cmd_router1/.cmd_router1_vhd
:
testbench/cmd_router1.vhd
vcom
$(VCOM_FLAGS)
-work
work
$<
@
mkdir
-p
$
(
dir
$@
)
&&
touch
$@
work/cmd_router1/.cmd_router1
_vhd
:
\
work/
textutil/.textutil_vhd
\
work/
util/.util_vhd
work/cmd_router1/.cmd_router1
:
\
work/
util/.util
\
work/
textutil/.textutil
work/adc_sync_fifo/.adc_sync_fifo_vhd
:
../ip_cores/adc_sync_fifo.vhd
vcom
$(VCOM_FLAGS)
-work
work
$<
...
...
@@ -476,8 +475,13 @@ work/ext_pulse_sync_rtl/.ext_pulse_sync_rtl_vhd: ../ip_cores/ext_pulse_sync/ext_
@
mkdir
-p
$
(
dir
$@
)
&&
touch
$@
work/ext_pulse_sync_rtl/.ext_pulse_sync_rtl_vhd
:
\
work/utils_pkg/.utils_pkg_vhd
work/ext_pulse_sync_rtl/.ext_pulse_sync_rtl
:
\
work/utils_pkg/.utils_pkg
work/genram_pkg/.genram_pkg_vhd
:
../ip_cores/general-cores/modules/genrams/genram_pkg.vhd
vcom
$(VCOM_FLAGS)
-work
work
$<
@
mkdir
-p
$
(
dir
$@
)
&&
touch
$@
work/carrier_csr/.carrier_csr_vhd
:
../rtl/carrier_csr.vhd
vcom
$(VCOM_FLAGS)
-work
work
$<
...
...
@@ -504,29 +508,36 @@ work/irq_controller/.irq_controller_vhd: ../rtl/irq_controller.vhd
@
mkdir
-p
$
(
dir
$@
)
&&
touch
$@
work/fmc_adc_100Ms_core_pkg/.fmc_adc_100Ms_core_pkg_vhd
:
../../adc/rtl/fmc_adc_100Ms_core_pkg.vhd
vcom
$(VCOM_FLAGS)
-work
work
$<
@
mkdir
-p
$
(
dir
$@
)
&&
touch
$@
work/gn412x_bfm/.gn412x_bfm_vhd
:
testbench/gn412x_bfm.vhd
vcom
$(VCOM_FLAGS)
-work
work
$<
@
mkdir
-p
$
(
dir
$@
)
&&
touch
$@
work/gn412x_bfm/.gn412x_bfm
_vhd
:
\
work/
textutil/.textutil_vhd
\
work/
util/.util_vhd
\
work/
mem_model/.mem_model_vhd
work/gn412x_bfm/.gn412x_bfm
:
\
work/
util/.util
\
work/
mem_model/.mem_model
\
work/
textutil/.textutil
work/
fmc_adc_100Ms_core_pkg/.fmc_adc_100Ms_core_pkg_vhd
:
../../adc/rtl/fmc_adc_100Ms_cor
e_pkg.vhd
work/
wishbone_pkg/.wishbone_pkg_vhd
:
../ip_cores/general-cores/modules/wishbone/wishbon
e_pkg.vhd
vcom
$(VCOM_FLAGS)
-work
work
$<
@
mkdir
-p
$
(
dir
$@
)
&&
touch
$@
work/fmc_adc_100Ms_core/.fmc_adc_100Ms_core_vhd
:
../../adc/rtl/fmc_adc_100Ms_core.vhd
work/wishbone_pkg/.wishbone_pkg
:
\
work/genram_pkg/.genram_pkg
work/gencores_pkg/.gencores_pkg_vhd
:
../ip_cores/general-cores/modules/common/gencores_pkg.vhd
vcom
$(VCOM_FLAGS)
-work
work
$<
@
mkdir
-p
$
(
dir
$@
)
&&
touch
$@
work/fmc_adc_100Ms_core/.fmc_adc_100Ms_core_vhd
:
\
work/fmc_adc_100Ms_core_pkg/.fmc_adc_100Ms_core_pkg_vhd
work/gencores_pkg/.gencores_pkg
:
\
work/genram_pkg/.genram_pkg
work/fmc_adc_100Ms_csr/.fmc_adc_100Ms_csr_vhd
:
../../adc/rtl/fmc_adc_100Ms_csr.vhd
vcom
$(VCOM_FLAGS)
-work
work
$<
...
...
@@ -538,39 +549,59 @@ work/offset_gain_s/.offset_gain_s_vhd: ../../adc/rtl/offset_gain_s.vhd
@
mkdir
-p
$
(
dir
$@
)
&&
touch
$@
work/
gencores_pkg/.gencores_pkg_vhd
:
../ip_cores/general-cores/modules/common/gencores
_pkg.vhd
work/
sdb_meta_pkg/.sdb_meta_pkg_vhd
:
../rtl/sdb_meta
_pkg.vhd
vcom
$(VCOM_FLAGS)
-work
work
$<
@
mkdir
-p
$
(
dir
$@
)
&&
touch
$@
work/
gencores_pkg/.gencores_pkg_vhd
:
\
work/
genram_pkg/.genram_pkg_vhd
work/
sdb_meta_pkg/.sdb_meta_pkg
:
\
work/
wishbone_pkg/.wishbone_pkg
work/gc_crc_gen/.gc_crc_gen_vhd
:
../ip_cores/general-cores/modules/common/gc_crc_gen.vhd
vcom
$(VCOM_FLAGS)
-work
work
$<
@
mkdir
-p
$
(
dir
$@
)
&&
touch
$@
work/gc_crc_gen/.gc_crc_gen
:
\
work/gencores_pkg/.gencores_pkg
work/gc_moving_average/.gc_moving_average_vhd
:
../ip_cores/general-cores/modules/common/gc_moving_average.vhd
vcom
$(VCOM_FLAGS)
-work
work
$<
@
mkdir
-p
$
(
dir
$@
)
&&
touch
$@
work/gc_moving_average/.gc_moving_average
:
\
work/gencores_pkg/.gencores_pkg
work/gc_extend_pulse/.gc_extend_pulse_vhd
:
../ip_cores/general-cores/modules/common/gc_extend_pulse.vhd
vcom
$(VCOM_FLAGS)
-work
work
$<
@
mkdir
-p
$
(
dir
$@
)
&&
touch
$@
work/gc_extend_pulse/.gc_extend_pulse
:
\
work/gencores_pkg/.gencores_pkg
work/gc_delay_gen/.gc_delay_gen_vhd
:
../ip_cores/general-cores/modules/common/gc_delay_gen.vhd
vcom
$(VCOM_FLAGS)
-work
work
$<
@
mkdir
-p
$
(
dir
$@
)
&&
touch
$@
work/gc_delay_gen/.gc_delay_gen
:
\
work/gencores_pkg/.gencores_pkg
work/gc_dual_pi_controller/.gc_dual_pi_controller_vhd
:
../ip_cores/general-cores/modules/common/gc_dual_pi_controller.vhd
vcom
$(VCOM_FLAGS)
-work
work
$<
@
mkdir
-p
$
(
dir
$@
)
&&
touch
$@
work/gc_dual_pi_controller/.gc_dual_pi_controller
:
\
work/gencores_pkg/.gencores_pkg
work/gc_reset/.gc_reset_vhd
:
../ip_cores/general-cores/modules/common/gc_reset.vhd
vcom
$(VCOM_FLAGS)
-work
work
$<
@
mkdir
-p
$
(
dir
$@
)
&&
touch
$@
work/gc_serial_dac/.gc_serial_dac_vhd
:
../ip_cores/general-cores/modules/common/gc_serial_dac.vhd
vcom
$(VCOM_FLAGS)
-work
work
$<
@
mkdir
-p
$
(
dir
$@
)
&&
touch
$@
...
...
@@ -586,16 +617,26 @@ work/gc_arbitrated_mux/.gc_arbitrated_mux_vhd: ../ip_cores/general-cores/modules
@
mkdir
-p
$
(
dir
$@
)
&&
touch
$@
work/gc_arbitrated_mux/.gc_arbitrated_mux
:
\
work/genram_pkg/.genram_pkg
\
work/gencores_pkg/.gencores_pkg
work/gc_pulse_synchronizer/.gc_pulse_synchronizer_vhd
:
../ip_cores/general-cores/modules/common/gc_pulse_synchronizer.vhd
vcom
$(VCOM_FLAGS)
-work
work
$<
@
mkdir
-p
$
(
dir
$@
)
&&
touch
$@
work/gc_pulse_synchronizer/.gc_pulse_synchronizer
:
\
work/gencores_pkg/.gencores_pkg
work/gc_frequency_meter/.gc_frequency_meter_vhd
:
../ip_cores/general-cores/modules/common/gc_frequency_meter.vhd
vcom
$(VCOM_FLAGS)
-work
work
$<
@
mkdir
-p
$
(
dir
$@
)
&&
touch
$@
work/gc_frequency_meter/.gc_frequency_meter
:
\
work/gencores_pkg/.gencores_pkg
work/gc_dual_clock_ram/.gc_dual_clock_ram_vhd
:
../ip_cores/general-cores/modules/common/gc_dual_clock_ram.vhd
vcom
$(VCOM_FLAGS)
-work
work
$<
@
mkdir
-p
$
(
dir
$@
)
&&
touch
$@
...
...
@@ -606,47 +647,34 @@ work/gc_wfifo/.gc_wfifo_vhd: ../ip_cores/general-cores/modules/common/gc_wfifo.v
@
mkdir
-p
$
(
dir
$@
)
&&
touch
$@
work/gc_rr_arbiter/.gc_rr_arbiter_vhd
:
../ip_cores/general-cores/modules/common/gc_rr_arbiter.vhd
vcom
$(VCOM_FLAGS)
-work
work
$<
@
mkdir
-p
$
(
dir
$@
)
&&
touch
$@
work/gc_prio_encoder/.gc_prio_encoder_vhd
:
../ip_cores/general-cores/modules/common/gc_prio_encoder.vhd
vcom
$(VCOM_FLAGS)
-work
work
$<
@
mkdir
-p
$
(
dir
$@
)
&&
touch
$@
work/gc_wfifo/.gc_wfifo
:
\
work/gencores_pkg/.gencores_pkg
work/gc_word_packer/.gc_word_packer_vhd
:
../ip_cores/general-cores/modules/common/gc_word_packer.vhd
work/fmc_adc_100Ms_core/.fmc_adc_100Ms_core_vhd
:
../../adc/rtl/fmc_adc_100Ms_core.vhd
vcom
$(VCOM_FLAGS)
-work
work
$<
@
mkdir
-p
$
(
dir
$@
)
&&
touch
$@
work/genram_pkg/.genram_pkg_vhd
:
../ip_cores/general-cores/modules/genrams/genram_pkg.vhd
vcom
$(VCOM_FLAGS)
-work
work
$<
@
mkdir
-p
$
(
dir
$@
)
&&
touch
$@
work/fmc_adc_100Ms_core/.fmc_adc_100Ms_core
:
\
work/genram_pkg/.genram_pkg
work/memory_loader_pkg/.memory_loader_pkg_vhd
:
../ip_cores/general-cores/modules/genrams/memory_loader_pkg.vhd
vcom
$(VCOM_FLAGS)
-work
work
$<
@
mkdir
-p
$
(
dir
$@
)
&&
touch
$@
work/generic_shiftreg_fifo/.generic_shiftreg_fifo_vhd
:
../ip_cores/general-cores/modules/genrams/generic_shiftreg_fifo.vhd
vcom
$(VCOM_FLAGS)
-work
work
$<
@
mkdir
-p
$
(
dir
$@
)
&&
touch
$@
work/memory_loader_pkg/.memory_loader_pkg
:
\
work/genram_pkg/.genram_pkg
work/
inferred_sync_fifo/.inferred_sync_fifo_vhd
:
../ip_cores/general-cores/modules/genrams/inferred_sync
_fifo.vhd
work/
generic_shiftreg_fifo/.generic_shiftreg_fifo_vhd
:
../ip_cores/general-cores/modules/genrams/generic_shiftreg
_fifo.vhd
vcom
$(VCOM_FLAGS)
-work
work
$<
@
mkdir
-p
$
(
dir
$@
)
&&
touch
$@
work/inferred_async_fifo/.inferred_async_fifo_vhd
:
../ip_cores/general-cores/modules/genrams/inferred_async_fifo.vhd
vcom
$(VCOM_FLAGS)
-work
work
$<
@
mkdir
-p
$
(
dir
$@
)
&&
touch
$@
work/generic_shiftreg_fifo/.generic_shiftreg_fifo
:
\
work/genram_pkg/.genram_pkg
work/
wishbone_pkg/.wishbone_pkg_vhd
:
../ip_cores/general-cores/modules/wishbone/wishbone
_pkg.vhd
work/
ddr3_ctrl_pkg/.ddr3_ctrl_pkg_vhd
:
../ip_cores/ddr3-sp6-core/hdl/rtl/ddr3_ctrl
_pkg.vhd
vcom
$(VCOM_FLAGS)
-work
work
$<
@
mkdir
-p
$
(
dir
$@
)
&&
touch
$@
...
...
@@ -656,33 +684,54 @@ work/generic_dpram/.generic_dpram_vhd: ../ip_cores/general-cores/modules/genrams
@
mkdir
-p
$
(
dir
$@
)
&&
touch
$@
work/generic_dpram/.generic_dpram
:
\
work/memory_loader_pkg/.memory_loader_pkg
\
work/genram_pkg/.genram_pkg
work/generic_dpram_sameclock/.generic_dpram_sameclock_vhd
:
../ip_cores/general-cores/modules/genrams/xilinx/generic_dpram_sameclock.vhd
vcom
$(VCOM_FLAGS)
-work
work
$<
@
mkdir
-p
$
(
dir
$@
)
&&
touch
$@
work/generic_dpram_sameclock/.generic_dpram_sameclock
:
\
work/memory_loader_pkg/.memory_loader_pkg
\
work/genram_pkg/.genram_pkg
work/generic_dpram_dualclock/.generic_dpram_dualclock_vhd
:
../ip_cores/general-cores/modules/genrams/xilinx/generic_dpram_dualclock.vhd
vcom
$(VCOM_FLAGS)
-work
work
$<
@
mkdir
-p
$
(
dir
$@
)
&&
touch
$@
work/generic_dpram_dualclock/.generic_dpram_dualclock
:
\
work/memory_loader_pkg/.memory_loader_pkg
\
work/genram_pkg/.genram_pkg
work/generic_spram/.generic_spram_vhd
:
../ip_cores/general-cores/modules/genrams/xilinx/generic_spram.vhd
vcom
$(VCOM_FLAGS)
-work
work
$<
@
mkdir
-p
$
(
dir
$@
)
&&
touch
$@
work/gc_shiftreg/.gc_shiftreg_vhd
:
../ip_cores/general-cores/modules/genrams/xilinx/gc_shiftreg.vhd
work/generic_spram/.generic_spram
:
\
work/genram_pkg/.genram_pkg
work/generic_async_fifo/.generic_async_fifo_vhd
:
../ip_cores/general-cores/modules/genrams/xilinx/spartan6/generic_async_fifo.vhd
vcom
$(VCOM_FLAGS)
-work
work
$<
@
mkdir
-p
$
(
dir
$@
)
&&
touch
$@
work/generic_async_fifo/.generic_async_fifo_vhd
:
../ip_cores/general-cores/modules/genrams/generic/generic_async_fifo.vhd
work/generic_async_fifo/.generic_async_fifo
:
\
work/genram_pkg/.genram_pkg
work/generic_sync_fifo/.generic_sync_fifo_vhd
:
../ip_cores/general-cores/modules/genrams/xilinx/spartan6/generic_sync_fifo.vhd
vcom
$(VCOM_FLAGS)
-work
work
$<
@
mkdir
-p
$
(
dir
$@
)
&&
touch
$@
work/generic_sync_fifo/.generic_sync_fifo_vhd
:
../ip_cores/general-cores/modules/genrams/generic/generic_sync_fifo.vhd
vcom
$(VCOM_FLAGS)
-work
work
$<
work/generic_sync_fifo/.generic_sync_fifo
:
\
work/genram_pkg/.genram_pkg
fifo_generator_v6_1/dummy/.dummy_vhd
:
../ip_cores/general-cores/modules/genrams/xilinx/sim_stub/dummy.vhd
vcom
$(VCOM_FLAGS)
-work
fifo_generator_v6_1
$<
@
mkdir
-p
$
(
dir
$@
)
&&
touch
$@
...
...
@@ -691,21 +740,35 @@ work/wb_async_bridge/.wb_async_bridge_vhd: ../ip_cores/general-cores/modules/wis
@
mkdir
-p
$
(
dir
$@
)
&&
touch
$@
work/wb_async_bridge/.wb_async_bridge
:
\
work/wishbone_pkg/.wishbone_pkg
\
work/gencores_pkg/.gencores_pkg
work/xwb_async_bridge/.xwb_async_bridge_vhd
:
../ip_cores/general-cores/modules/wishbone/wb_async_bridge/xwb_async_bridge.vhd
vcom
$(VCOM_FLAGS)
-work
work
$<
@
mkdir
-p
$
(
dir
$@
)
&&
touch
$@
work/xwb_async_bridge/.xwb_async_bridge
:
\
work/wishbone_pkg/.wishbone_pkg
work/wb_onewire_master/.wb_onewire_master_vhd
:
../ip_cores/general-cores/modules/wishbone/wb_onewire_master/wb_onewire_master.vhd
vcom
$(VCOM_FLAGS)
-work
work
$<
@
mkdir
-p
$
(
dir
$@
)
&&
touch
$@
work/wb_onewire_master/.wb_onewire_master
:
\
work/wishbone_pkg/.wishbone_pkg
\
work/gencores_pkg/.gencores_pkg
work/xwb_onewire_master/.xwb_onewire_master_vhd
:
../ip_cores/general-cores/modules/wishbone/wb_onewire_master/xwb_onewire_master.vhd
vcom
$(VCOM_FLAGS)
-work
work
$<
@
mkdir
-p
$
(
dir
$@
)
&&
touch
$@
work/xwb_onewire_master/.xwb_onewire_master
:
\
work/wishbone_pkg/.wishbone_pkg
work/i2c_master_bit_ctrl/.i2c_master_bit_ctrl_vhd
:
../ip_cores/general-cores/modules/wishbone/wb_i2c_master/i2c_master_bit_ctrl.vhd
vcom
$(VCOM_FLAGS)
-work
work
$<
@
mkdir
-p
$
(
dir
$@
)
&&
touch
$@
...
...
@@ -726,197 +789,297 @@ work/wb_i2c_master/.wb_i2c_master_vhd: ../ip_cores/general-cores/modules/wishbon
@
mkdir
-p
$
(
dir
$@
)
&&
touch
$@
work/wb_i2c_master/.wb_i2c_master
:
\
work/wishbone_pkg/.wishbone_pkg
work/xwb_i2c_master/.xwb_i2c_master_vhd
:
../ip_cores/general-cores/modules/wishbone/wb_i2c_master/xwb_i2c_master.vhd
vcom
$(VCOM_FLAGS)
-work
work
$<
@
mkdir
-p
$
(
dir
$@
)
&&
touch
$@
work/xwb_i2c_master/.xwb_i2c_master
:
\
work/wishbone_pkg/.wishbone_pkg
work/xwb_bus_fanout/.xwb_bus_fanout_vhd
:
../ip_cores/general-cores/modules/wishbone/wb_bus_fanout/xwb_bus_fanout.vhd
vcom
$(VCOM_FLAGS)
-work
work
$<
@
mkdir
-p
$
(
dir
$@
)
&&
touch
$@
work/xwb_bus_fanout/.xwb_bus_fanout
:
\
work/wishbone_pkg/.wishbone_pkg
work/xwb_dpram/.xwb_dpram_vhd
:
../ip_cores/general-cores/modules/wishbone/wb_dpram/xwb_dpram.vhd
vcom
$(VCOM_FLAGS)
-work
work
$<
@
mkdir
-p
$
(
dir
$@
)
&&
touch
$@
work/xwb_dpram/.xwb_dpram
:
\
work/wishbone_pkg/.wishbone_pkg
\
work/genram_pkg/.genram_pkg
work/wb_gpio_port/.wb_gpio_port_vhd
:
../ip_cores/general-cores/modules/wishbone/wb_gpio_port/wb_gpio_port.vhd
vcom
$(VCOM_FLAGS)
-work
work
$<
@
mkdir
-p
$
(
dir
$@
)
&&
touch
$@
work/wb_gpio_port/.wb_gpio_port
:
\
work/wishbone_pkg/.wishbone_pkg
\
work/gencores_pkg/.gencores_pkg
work/xwb_gpio_port/.xwb_gpio_port_vhd
:
../ip_cores/general-cores/modules/wishbone/wb_gpio_port/xwb_gpio_port.vhd
vcom
$(VCOM_FLAGS)
-work
work
$<
@
mkdir
-p
$
(
dir
$@
)
&&
touch
$@
work/xwb_gpio_port/.xwb_gpio_port
:
\
work/wishbone_pkg/.wishbone_pkg
work/wb_tics/.wb_tics_vhd
:
../ip_cores/general-cores/modules/wishbone/wb_simple_timer/wb_tics.vhd
vcom
$(VCOM_FLAGS)
-work
work
$<
@
mkdir
-p
$
(
dir
$@
)
&&
touch
$@
work/wb_tics/.wb_tics
:
\
work/wishbone_pkg/.wishbone_pkg
work/xwb_tics/.xwb_tics_vhd
:
../ip_cores/general-cores/modules/wishbone/wb_simple_timer/xwb_tics.vhd
vcom
$(VCOM_FLAGS)
-work
work
$<
@
mkdir
-p
$
(
dir
$@
)
&&
touch
$@
#work/uart_async_rx/.uart_async_rx_vhd: ../ip_cores/general-cores/modules/wishbone/wb_uart/uart_async_rx.vhd
# vcom $(VCOM_FLAGS) -work work $<
# @mkdir -p $(dir $@) && touch $@
work/xwb_tics/.xwb_tics
:
\
work/wishbone_pkg/.wishbone_pkg
work/uart_async_rx/.uart_async_rx_vhd
:
../ip_cores/general-cores/modules/wishbone/wb_uart/uart_async_rx.vhd
vcom
$(VCOM_FLAGS)
-work
work
$<
@
mkdir
-p
$
(
dir
$@
)
&&
touch
$@
#work/uart_async_tx/.uart_async_tx_vhd: ../ip_cores/general-cores/modules/wishbone/wb_uart/uart_async_tx.vhd
# vcom $(VCOM_FLAGS) -work work $<
# @mkdir -p $(dir $@) && touch $@
work/uart_async_tx/.uart_async_tx_vhd
:
../ip_cores/general-cores/modules/wishbone/wb_uart/uart_async_tx.vhd
vcom
$(VCOM_FLAGS)
-work
work
$<
@
mkdir
-p
$
(
dir
$@
)
&&
touch
$@
#work/uart_baud_gen/.uart_baud_gen_vhd: ../ip_cores/general-cores/modules/wishbone/wb_uart/uart_baud_gen.vhd
# vcom $(VCOM_FLAGS) -work work $<
# @mkdir -p $(dir $@) && touch $@
work/uart_baud_gen/.uart_baud_gen_vhd
:
../ip_cores/general-cores/modules/wishbone/wb_uart/uart_baud_gen.vhd
vcom
$(VCOM_FLAGS)
-work
work
$<
@
mkdir
-p
$
(
dir
$@
)
&&
touch
$@
work/simple_uart_pkg/.simple_uart_pkg_vhd
:
../ip_cores/general-cores/modules/wishbone/wb_uart/simple_uart_pkg.vhd
vcom
$(VCOM_FLAGS)
-work
work
$<
@
mkdir
-p
$
(
dir
$@
)
&&
touch
$@
work/simple_uart_wb/.simple_uart_wb_vhd
:
../ip_cores/general-cores/modules/wishbone/wb_uart/simple_uart_wb.vhd
vcom
$(VCOM_FLAGS)
-work
work
$<
@
mkdir
-p
$
(
dir
$@
)
&&
touch
$@
#work/simple_uart_wb/.simple_uart_wb_vhd: ../ip_cores/general-cores/modules/wishbone/wb_uart/simple_uart_wb.vhd
# vcom $(VCOM_FLAGS) -work work $<
# @mkdir -p $(dir $@) && touch $@
work/simple_uart_wb/.simple_uart_wb
:
\
work/simple_uart_pkg/.simple_uart_pkg
#work/simple_uart_pkg/.simple_uart_pkg_vhd: ../ip_cores/general-cores/modules/wishbone/wb_uart/simple_uart_pkg
.vhd
#
vcom $(VCOM_FLAGS) -work work $<
#
@mkdir -p $(dir $@) && touch $@
work/wb_simple_uart/.wb_simple_uart_vhd
:
../ip_cores/general-cores/modules/wishbone/wb_uart/wb_simple_uart
.vhd
vcom
$(VCOM_FLAGS)
-work
work
$<
@
mkdir
-p
$
(
dir
$@
)
&&
touch
$@
#work/wb_simple_uart/.wb_simple_uart_vhd: ../ip_cores/general-cores/modules/wishbone/wb_uart/wb_simple_uart.vhd
# vcom $(VCOM_FLAGS) -work work $<
# @mkdir -p $(dir $@) && touch $@
work/wb_simple_uart/.wb_simple_uart
:
\
work/simple_uart_pkg/.simple_uart_pkg
\
work/wishbone_pkg/.wishbone_pkg
\
work/genram_pkg/.genram_pkg
work/xwb_simple_uart/.xwb_simple_uart_vhd
:
../ip_cores/general-cores/modules/wishbone/wb_uart/xwb_simple_uart.vhd
vcom
$(VCOM_FLAGS)
-work
work
$<
@
mkdir
-p
$
(
dir
$@
)
&&
touch
$@
work/xwb_simple_uart/.xwb_simple_uart
:
\
work/wishbone_pkg/.wishbone_pkg
#work/xwb_simple_uart/.xwb_simple_uart_vhd: ../ip_cores/general-cores/modules/wishbone/wb_uart/xwb_simple_uart
.vhd
#
vcom $(VCOM_FLAGS) -work work $<
#
@mkdir -p $(dir $@) && touch $@
work/vic_prio_enc/.vic_prio_enc_vhd
:
../ip_cores/general-cores/modules/wishbone/wb_vic/vic_prio_enc
.vhd
vcom
$(VCOM_FLAGS)
-work
work
$<
@
mkdir
-p
$
(
dir
$@
)
&&
touch
$@
#work/vic_prio_enc/.vic_prio_enc_vhd: ../ip_cores/general-cores/modules/wishbone/wb_vic/vic_prio_enc
.vhd
#
vcom $(VCOM_FLAGS) -work work $<
#
@mkdir -p $(dir $@) && touch $@
work/wbgen2_pkg/.wbgen2_pkg_vhd
:
../ip_cores/general-cores/modules/wishbone/wbgen2/wbgen2_pkg
.vhd
vcom
$(VCOM_FLAGS)
-work
work
$<
@
mkdir
-p
$
(
dir
$@
)
&&
touch
$@
#work/wb_slave_vic/.wb_slave_vic_vhd: ../ip_cores/general-cores/modules/wishbone/wb_vic/wb_slave
_vic.vhd
#
vcom $(VCOM_FLAGS) -work work $<
#
@mkdir -p $(dir $@) && touch $@
work/wb_vic/.wb_vic_vhd
:
../ip_cores/general-cores/modules/wishbone/wb_vic/wb
_vic.vhd
vcom
$(VCOM_FLAGS)
-work
work
$<
@
mkdir
-p
$
(
dir
$@
)
&&
touch
$@
#work/wb_vic/.wb_vic_vhd: ../ip_cores/general-cores/modules/wishbone/wb_vic/wb_vic.vhd
# vcom $(VCOM_FLAGS) -work work $<
# @mkdir -p $(dir $@) && touch $@
work/wb_vic/.wb_vic
:
\
work/wishbone_pkg/.wishbone_pkg
work/xwb_vic/.xwb_vic_vhd
:
../ip_cores/general-cores/modules/wishbone/wb_vic/xwb_vic.vhd
vcom
$(VCOM_FLAGS)
-work
work
$<
@
mkdir
-p
$
(
dir
$@
)
&&
touch
$@
#work/xwb_vic/.xwb_vic_vhd: ../ip_cores/general-cores/modules/wishbone/wb_vic/xwb_vic.vhd
# vcom $(VCOM_FLAGS) -work work $<
# @mkdir -p $(dir $@) && touch $@
work/xwb_vic/.xwb_vic
:
\
work/wishbone_pkg/.wishbone_pkg
work/wb_spi/.wb_spi_vhd
:
../ip_cores/general-cores/modules/wishbone/wb_spi/wb_spi.vhd
vcom
$(VCOM_FLAGS)
-work
work
$<
@
mkdir
-p
$
(
dir
$@
)
&&
touch
$@
work/wb_spi/.wb_spi
:
\
work/wishbone_pkg/.wishbone_pkg
work/xwb_spi/.xwb_spi_vhd
:
../ip_cores/general-cores/modules/wishbone/wb_spi/xwb_spi.vhd
vcom
$(VCOM_FLAGS)
-work
work
$<
@
mkdir
-p
$
(
dir
$@
)
&&
touch
$@
work/xwb_spi/.xwb_spi
:
\
work/wishbone_pkg/.wishbone_pkg
work/sdb_rom/.sdb_rom_vhd
:
../ip_cores/general-cores/modules/wishbone/wb_crossbar/sdb_rom.vhd
vcom
$(VCOM_FLAGS)
-work
work
$<
@
mkdir
-p
$
(
dir
$@
)
&&
touch
$@
work/sdb_rom/.sdb_rom
:
\
work/wishbone_pkg/.wishbone_pkg
work/xwb_crossbar/.xwb_crossbar_vhd
:
../ip_cores/general-cores/modules/wishbone/wb_crossbar/xwb_crossbar.vhd
vcom
$(VCOM_FLAGS)
-work
work
$<
@
mkdir
-p
$
(
dir
$@
)
&&
touch
$@
work/xwb_crossbar/.xwb_crossbar
:
\
work/wishbone_pkg/.wishbone_pkg
work/xwb_sdb_crossbar/.xwb_sdb_crossbar_vhd
:
../ip_cores/general-cores/modules/wishbone/wb_crossbar/xwb_sdb_crossbar.vhd
vcom
$(VCOM_FLAGS)
-work
work
$<
@
mkdir
-p
$
(
dir
$@
)
&&
touch
$@
#work/xwb_lm32/.xwb_lm32_vhd: ../ip_cores/general-cores/modules/wishbone/wb_lm32/generated/xwb_lm32.vhd
# vcom $(VCOM_FLAGS) -work work $<
# @mkdir -p $(dir $@) && touch $@
work/xwb_sdb_crossbar/.xwb_sdb_crossbar
:
\
work/wishbone_pkg/.wishbone_pkg
work/xwb_lm32/.xwb_lm32_vhd
:
../ip_cores/general-cores/modules/wishbone/wb_lm32/generated/xwb_lm32.vhd
vcom
$(VCOM_FLAGS)
-work
work
$<
@
mkdir
-p
$
(
dir
$@
)
&&
touch
$@
work/xwb_lm32/.xwb_lm32
:
\
work/wishbone_pkg/.wishbone_pkg
work/wb_slave_adapter/.wb_slave_adapter_vhd
:
../ip_cores/general-cores/modules/wishbone/wb_slave_adapter/wb_slave_adapter.vhd
vcom
$(VCOM_FLAGS)
-work
work
$<
@
mkdir
-p
$
(
dir
$@
)
&&
touch
$@
#work/wb_xilinx_fpga_loader/.wb_xilinx_fpga_loader_vhd: ../ip_cores/general-cores/modules/wishbone/wb_xilinx_fpga_loader/wb_xilinx_fpga_loader.vhd
# vcom $(VCOM_FLAGS) -work work $<
# @mkdir -p $(dir $@) && touch $@
work/wb_slave_adapter/.wb_slave_adapter
:
\
work/wishbone_pkg/.wishbone_pkg
work/xloader_registers_pkg/.xloader_registers_pkg_vhd
:
../ip_cores/general-cores/modules/wishbone/wb_xilinx_fpga_loader/xloader_registers_pkg.vhd
vcom
$(VCOM_FLAGS)
-work
work
$<
@
mkdir
-p
$
(
dir
$@
)
&&
touch
$@
#work/xwb_xilinx_fpga_loader/.xwb_xilinx_fpga_loader_vhd: ../ip_cores/general-cores/modules/wishbone/wb_xilinx_fpga_loader/xwb_xilinx_fpga_loader.vhd
# vcom $(VCOM_FLAGS) -work work $<
# @mkdir -p $(dir $@) && touch $@
work/xloader_registers_pkg/.xloader_registers_pkg
:
\
work/wbgen2_pkg/.wbgen2_pkg
#work/xloader_registers_pkg/.xloader_registers_pkg_vhd: ../ip_cores/general-cores/modules/wishbone/wb_xilinx_fpga_loader/xloader_registers_pkg
.vhd
#
vcom $(VCOM_FLAGS) -work work $<
#
@mkdir -p $(dir $@) && touch $@
work/xwb_xilinx_fpga_loader/.xwb_xilinx_fpga_loader_vhd
:
../ip_cores/general-cores/modules/wishbone/wb_xilinx_fpga_loader/xwb_xilinx_fpga_loader
.vhd
vcom
$(VCOM_FLAGS)
-work
work
$<
@
mkdir
-p
$
(
dir
$@
)
&&
touch
$@
#work/xloader_wb/.xloader_wb_vhd: ../ip_cores/general-cores/modules/wishbone/wb_xilinx_fpga_loader/xloader_wb.vhd
# vcom $(VCOM_FLAGS) -work work $<
# @mkdir -p $(dir $@) && touch $@
work/xwb_xilinx_fpga_loader/.xwb_xilinx_fpga_loader
:
\
work/wishbone_pkg/.wishbone_pkg
work/wb_xilinx_fpga_loader/.wb_xilinx_fpga_loader_vhd
:
../ip_cores/general-cores/modules/wishbone/wb_xilinx_fpga_loader/wb_xilinx_fpga_loader.vhd
vcom
$(VCOM_FLAGS)
-work
work
$<
@
mkdir
-p
$
(
dir
$@
)
&&
touch
$@
work/wb_xilinx_fpga_loader/.wb_xilinx_fpga_loader
:
\
work/wishbone_pkg/.wishbone_pkg
\
work/xloader_registers_pkg/.xloader_registers_pkg
\
work/gencores_pkg/.gencores_pkg
work/xloader_wb/.xloader_wb_vhd
:
../ip_cores/general-cores/modules/wishbone/wb_xilinx_fpga_loader/xloader_wb.vhd
vcom
$(VCOM_FLAGS)
-work
work
$<
@
mkdir
-p
$
(
dir
$@
)
&&
touch
$@
work/xloader_wb/.xloader_wb
:
\
work/xloader_registers_pkg/.xloader_registers_pkg
\
work/wbgen2_pkg/.wbgen2_pkg
work/xwb_clock_crossing/.xwb_clock_crossing_vhd
:
../ip_cores/general-cores/modules/wishbone/wb_clock_crossing/xwb_clock_crossing.vhd
vcom
$(VCOM_FLAGS)
-work
work
$<
@
mkdir
-p
$
(
dir
$@
)
&&
touch
$@
work/xwb_clock_crossing/.xwb_clock_crossing
:
\
work/wishbone_pkg/.wishbone_pkg
\
work/gencores_pkg/.gencores_pkg
work/xwb_dma/.xwb_dma_vhd
:
../ip_cores/general-cores/modules/wishbone/wb_dma/xwb_dma.vhd
vcom
$(VCOM_FLAGS)
-work
work
$<
@
mkdir
-p
$
(
dir
$@
)
&&
touch
$@
work/xwb_dma/.xwb_dma
:
\
work/wishbone_pkg/.wishbone_pkg
work/wb_serial_lcd/.wb_serial_lcd_vhd
:
../ip_cores/general-cores/modules/wishbone/wb_serial_lcd/wb_serial_lcd.vhd
vcom
$(VCOM_FLAGS)
-work
work
$<
@
mkdir
-p
$
(
dir
$@
)
&&
touch
$@
work/wb_serial_lcd/.wb_serial_lcd
:
\
work/wishbone_pkg/.wishbone_pkg
\
work/genram_pkg/.genram_pkg
work/wbgen2_dpssram/.wbgen2_dpssram_vhd
:
../ip_cores/general-cores/modules/wishbone/wbgen2/wbgen2_dpssram.vhd
vcom
$(VCOM_FLAGS)
-work
work
$<
@
mkdir
-p
$
(
dir
$@
)
&&
touch
$@
work/wbgen2_dpssram/.wbgen2_dpssram_vhd
:
\
work/wbgen2_pkg/.wbgen2_pkg_vhd
work/wbgen2_dpssram/.wbgen2_dpssram
:
\
work/wbgen2_pkg/.wbgen2_pkg
work/wbgen2_eic/.wbgen2_eic_vhd
:
../ip_cores/general-cores/modules/wishbone/wbgen2/wbgen2_eic.vhd
vcom
$(VCOM_FLAGS)
-work
work
$<
@
mkdir
-p
$
(
dir
$@
)
&&
touch
$@
work/wbgen2_eic/.wbgen2_eic_vhd
:
\
work/wbgen2_pkg/.wbgen2_pkg_vhd
work/wbgen2_eic/.wbgen2_eic
:
\
work/wbgen2_pkg/.wbgen2_pkg
work/wbgen2_fifo_async/.wbgen2_fifo_async_vhd
:
../ip_cores/general-cores/modules/wishbone/wbgen2/wbgen2_fifo_async.vhd
vcom
$(VCOM_FLAGS)
-work
work
$<
@
mkdir
-p
$
(
dir
$@
)
&&
touch
$@
work/wbgen2_fifo_async/.wbgen2_fifo_async_vhd
:
\
work/wbgen2_pkg/.wbgen2_pkg_vhd
work/wbgen2_fifo_async/.wbgen2_fifo_async
:
\
work/genram_pkg/.genram_pkg
\
work/wbgen2_pkg/.wbgen2_pkg
work/wbgen2_fifo_sync/.wbgen2_fifo_sync_vhd
:
../ip_cores/general-cores/modules/wishbone/wbgen2/wbgen2_fifo_sync.vhd
vcom
$(VCOM_FLAGS)
-work
work
$<
@
mkdir
-p
$
(
dir
$@
)
&&
touch
$@
work/wbgen2_fifo_sync/.wbgen2_fifo_sync_vhd
:
\
work/wbgen2_pkg/.wbgen2_pkg_vhd
work/wbgen2_fifo_sync/.wbgen2_fifo_sync
:
\
work/wbgen2_pkg/.wbgen2_pkg
work/wb
gen2_pkg/.wbgen2_pkg_vhd
:
../ip_cores/general-cores/modules/wishbone/wbgen2/wbgen2_pkg
.vhd
work/wb
_slave_vic/.wb_slave_vic_vhd
:
../ip_cores/general-cores/modules/wishbone/wb_vic/wb_slave_vic
.vhd
vcom
$(VCOM_FLAGS)
-work
work
$<
@
mkdir
-p
$
(
dir
$@
)
&&
touch
$@
work/wb_slave_vic/.wb_slave_vic
:
\
work/wbgen2_pkg/.wbgen2_pkg
work/ddr3_ctrl/.ddr3_ctrl_vhd
:
../ip_cores/ddr3-sp6-core/hdl/rtl/ddr3_ctrl.vhd
vcom
$(VCOM_FLAGS)
-work
work
$<
@
mkdir
-p
$
(
dir
$@
)
&&
touch
$@
...
...
@@ -927,20 +1090,23 @@ work/ddr3_ctrl_wb/.ddr3_ctrl_wb_vhd: ../ip_cores/ddr3-sp6-core/hdl/rtl/ddr3_ctrl
@
mkdir
-p
$
(
dir
$@
)
&&
touch
$@
work/ddr3_ctrl_wrapper/.ddr3_ctrl_wrapper_vhd
:
../ip_cores/ddr3-sp6-core/hdl/rtl/ddr3_ctrl_wrapper.vhd
work/ddr3_ctrl_wb/.ddr3_ctrl_wb
:
\
work/ddr3_ctrl_pkg/.ddr3_ctrl_pkg
work/ddr3_ctrl_wrapper_pkg/.ddr3_ctrl_wrapper_pkg_vhd
:
../ip_cores/ddr3-sp6-core/hdl/rtl/ddr3_ctrl_wrapper_pkg.vhd
vcom
$(VCOM_FLAGS)
-work
work
$<
@
mkdir
-p
$
(
dir
$@
)
&&
touch
$@
work/ddr3_ctrl_wrapper/.ddr3_ctrl_wrapper_vhd
:
\
work/ddr3_ctrl_wrapper_pkg/.ddr3_ctrl_wrapper_pkg_vhd
work/ddr3_ctrl_wrapper
_pkg/.ddr3_ctrl_wrapper_pkg_vhd
:
../ip_cores/ddr3-sp6-core/hdl/rtl/ddr3_ctrl_wrapper_pkg
.vhd
work/ddr3_ctrl_wrapper
/.ddr3_ctrl_wrapper_vhd
:
../ip_cores/ddr3-sp6-core/hdl/rtl/ddr3_ctrl_wrapper
.vhd
vcom
$(VCOM_FLAGS)
-work
work
$<
@
mkdir
-p
$
(
dir
$@
)
&&
touch
$@
work/ddr3_ctrl_pkg/.ddr3_ctrl_pkg_vhd
:
../ip_cores/ddr3-sp6-core/hdl/rtl/ddr3_ctrl_pkg.vhd
work/ddr3_ctrl_wrapper/.ddr3_ctrl_wrapper
:
\
work/ddr3_ctrl_wrapper_pkg/.ddr3_ctrl_wrapper_pkg
work/gn4124_core_pkg/.gn4124_core_pkg_vhd
:
../ip_cores/gn4124-core/hdl/gn4124core/rtl/spartan6/gn4124_core_pkg.vhd
vcom
$(VCOM_FLAGS)
-work
work
$<
@
mkdir
-p
$
(
dir
$@
)
&&
touch
$@
...
...
@@ -990,6 +1156,9 @@ work/dma_controller/.dma_controller_vhd: ../ip_cores/gn4124-core/hdl/gn4124core/
@
mkdir
-p
$
(
dir
$@
)
&&
touch
$@
work/dma_controller/.dma_controller
:
\
work/gn4124_core_pkg/.gn4124_core_pkg
work/dma_controller_wb_slave/.dma_controller_wb_slave_vhd
:
../ip_cores/gn4124-core/hdl/gn4124core/rtl/dma_controller_wb_slave.vhd
vcom
$(VCOM_FLAGS)
-work
work
$<
@
mkdir
-p
$
(
dir
$@
)
&&
touch
$@
...
...
@@ -1000,46 +1169,81 @@ work/l2p_arbiter/.l2p_arbiter_vhd: ../ip_cores/gn4124-core/hdl/gn4124core/rtl/l2
@
mkdir
-p
$
(
dir
$@
)
&&
touch
$@
work/l2p_arbiter/.l2p_arbiter
:
\
work/gn4124_core_pkg/.gn4124_core_pkg
work/l2p_dma_master/.l2p_dma_master_vhd
:
../ip_cores/gn4124-core/hdl/gn4124core/rtl/l2p_dma_master.vhd
vcom
$(VCOM_FLAGS)
-work
work
$<
@
mkdir
-p
$
(
dir
$@
)
&&
touch
$@
work/l2p_dma_master/.l2p_dma_master
:
\
work/gn4124_core_pkg/.gn4124_core_pkg
\
work/genram_pkg/.genram_pkg
work/p2l_decode32/.p2l_decode32_vhd
:
../ip_cores/gn4124-core/hdl/gn4124core/rtl/p2l_decode32.vhd
vcom
$(VCOM_FLAGS)
-work
work
$<
@
mkdir
-p
$
(
dir
$@
)
&&
touch
$@
work/p2l_decode32/.p2l_decode32
:
\
work/gn4124_core_pkg/.gn4124_core_pkg
work/p2l_dma_master/.p2l_dma_master_vhd
:
../ip_cores/gn4124-core/hdl/gn4124core/rtl/p2l_dma_master.vhd
vcom
$(VCOM_FLAGS)
-work
work
$<
@
mkdir
-p
$
(
dir
$@
)
&&
touch
$@
work/p2l_dma_master/.p2l_dma_master
:
\
work/gn4124_core_pkg/.gn4124_core_pkg
\
work/genram_pkg/.genram_pkg
work/wbmaster32/.wbmaster32_vhd
:
../ip_cores/gn4124-core/hdl/gn4124core/rtl/wbmaster32.vhd
vcom
$(VCOM_FLAGS)
-work
work
$<
@
mkdir
-p
$
(
dir
$@
)
&&
touch
$@
work/wbmaster32/.wbmaster32
:
\
work/gn4124_core_pkg/.gn4124_core_pkg
\
work/genram_pkg/.genram_pkg
work/gn4124_core/.gn4124_core_vhd
:
../ip_cores/gn4124-core/hdl/gn4124core/rtl/spartan6/gn4124_core.vhd
vcom
$(VCOM_FLAGS)
-work
work
$<
@
mkdir
-p
$
(
dir
$@
)
&&
touch
$@
work/gn4124_core_pkg/.gn4124_core_pkg_vhd
:
../ip_cores/gn4124-core/hdl/gn4124core/rtl/spartan6/gn4124_core_pkg.vhd
work/gn4124_core/.gn4124_core
:
\
work/gn4124_core_pkg/.gn4124_core_pkg
work/spec_top_fmc_adc_100Ms/.spec_top_fmc_adc_100Ms_vhd
:
../rtl/spec_top_fmc_adc_100Ms.vhd
vcom
$(VCOM_FLAGS)
-work
work
$<
@
mkdir
-p
$
(
dir
$@
)
&&
touch
$@
work/spec_top_fmc_adc_100Ms/.spec_top_fmc_adc_100Ms
:
\
work/wishbone_pkg/.wishbone_pkg
\
work/fmc_adc_100Ms_core_pkg/.fmc_adc_100Ms_core_pkg
\
work/gn4124_core_pkg/.gn4124_core_pkg
\
work/ddr3_ctrl_pkg/.ddr3_ctrl_pkg
\
work/sdb_meta_pkg/.sdb_meta_pkg
\
work/gencores_pkg/.gencores_pkg
work/l2p_ser/.l2p_ser_vhd
:
../ip_cores/gn4124-core/hdl/gn4124core/rtl/spartan6/l2p_ser.vhd
vcom
$(VCOM_FLAGS)
-work
work
$<
@
mkdir
-p
$
(
dir
$@
)
&&
touch
$@
work/l2p_ser/.l2p_ser
:
\
work/gn4124_core_pkg/.gn4124_core_pkg
work/p2l_des/.p2l_des_vhd
:
../ip_cores/gn4124-core/hdl/gn4124core/rtl/spartan6/p2l_des.vhd
vcom
$(VCOM_FLAGS)
-work
work
$<
@
mkdir
-p
$
(
dir
$@
)
&&
touch
$@
work/p2l_des/.p2l_des
:
\
work/gn4124_core_pkg/.gn4124_core_pkg
work/serdes_1_to_n_clk_pll_s2_diff/.serdes_1_to_n_clk_pll_s2_diff_vhd
:
../ip_cores/gn4124-core/hdl/gn4124core/rtl/spartan6/serdes_1_to_n_clk_pll_s2_diff.vhd
vcom
$(VCOM_FLAGS)
-work
work
$<
@
mkdir
-p
$
(
dir
$@
)
&&
touch
$@
...
...
@@ -1065,14 +1269,3 @@ work/pulse_sync_rtl/.pulse_sync_rtl_vhd: ../ip_cores/gn4124-core/hdl/gn4124core/
@
mkdir
-p
$
(
dir
$@
)
&&
touch
$@
work/spec_top_fmc_adc_100Ms/.spec_top_fmc_adc_100Ms_vhd
:
../rtl/spec_top_fmc_adc_100Ms.vhd
vcom
$(VCOM_FLAGS)
-work
work
$<
@
mkdir
-p
$
(
dir
$@
)
&&
touch
$@
work/spec_top_fmc_adc_100Ms/.spec_top_fmc_adc_100Ms_vhd
:
\
work/gencores_pkg/.gencores_pkg_vhd
\
work/ddr3_ctrl_pkg/.ddr3_ctrl_pkg_vhd
\
work/gn4124_core_pkg/.gn4124_core_pkg_vhd
\
work/wishbone_pkg/.wishbone_pkg_vhd
\
work/fmc_adc_100Ms_core_pkg/.fmc_adc_100Ms_core_pkg_vhd
hdl/spec/sim/cmd0.vec
View file @
057f2413
...
...
@@ -215,12 +215,12 @@ wr FF00000000001A00 F 0000000A
wait %d100
-- trigger config (sw trig enable)
--
wr FF00000000001908 F 00000008
wr FF00000000001908 F 00000008
-- trigger config (hw int trig enable)
--wr FF00000000001908 F 00000004
-- trigger config (int trig)
wr FF00000000001908 F 02600004
--
wr FF00000000001908 F 02600004
-- decimation factor = 1
wr FF0000000000191C F 00000001
...
...
@@ -232,7 +232,7 @@ wr FF00000000001920 F 0000000A
wr FF00000000001924 F 00000100
-- number of shots
wr FF00000000001914 F 0000000
1
wr FF00000000001914 F 0000000
3
-- Channel 1 gain
wr FF00000000001934 F 00008000
...
...
@@ -265,15 +265,15 @@ wr FF00000000001900 F 00000025
wait %d800
-- sw trigger
--
wr FF00000000001910 F FFFFFFFF
wr FF00000000001910 F FFFFFFFF
--
wait %d800
wait %d800
-- sw trigger
--
wr FF00000000001910 F FFFFFFFF
wr FF00000000001910 F FFFFFFFF
--
wait %d800
wait %d800
-- sw trigger
-
wr FF00000000001910 F FFFFFFFF
wr FF00000000001910 F FFFFFFFF
--wait %d800
-- sw trigger
...
...
hdl/spec/sim/spec.do
View file @
057f2413
...
...
@@ -5,8 +5,8 @@ log -r /*
##do wave_datapath.do
##do wave_multishot.do
##do wave_onewire.do
##
do wave_adc_core.do
do wave_gnum.do
do wave_adc_core.do
##
do wave_gnum.do
##do wave_end_acq_irq.do
##do wave_ddr_wb.do
...
...
hdl/spec/sim/wave_adc_core.do
View file @
057f2413
onerror {resume}
quietly WaveActivateNextPane {} 0
add wave -noupdate /tb_spec/
rstout
18n
add wave -noupdate -radix hexadecimal -
expand -subitemconfig {/tb_spec/adc_data(0) {-height 16 -radix hexadecimal} /tb_spec/adc_data(1) {-height 16 -radix hexadecimal} /tb_spec/adc_data(2) {-height 16 -radix hexadecimal} /tb_spec/adc_data(3) {-height 16 -radix hexadecimal}} /tb_spec/adc_data
add wave -noupdate /tb_spec/
RSTOUT
18n
add wave -noupdate -radix hexadecimal -
childformat {{/tb_spec/ADC_DATA(0) -radix hexadecimal} {/tb_spec/ADC_DATA(1) -radix hexadecimal} {/tb_spec/ADC_DATA(2) -radix hexadecimal} {/tb_spec/ADC_DATA(3) -radix hexadecimal}} -expand -subitemconfig {/tb_spec/ADC_DATA(0) {-height 17 -radix hexadecimal} /tb_spec/ADC_DATA(1) {-height 17 -radix hexadecimal} /tb_spec/ADC_DATA(2) {-height 17 -radix hexadecimal} /tb_spec/ADC_DATA(3) {-height 17 -radix hexadecimal}} /tb_spec/ADC_DATA
add wave -noupdate -divider {adc core}
add wave -noupdate -radix hexadecimal /tb_spec/u1/cmp_fmc_adc_100ms_core/sys_clk_i
add wave -noupdate -radix hexadecimal /tb_spec/u1/cmp_fmc_adc_100ms_core/sys_rst_n_i
add wave -noupdate -radix hexadecimal /tb_spec/u1/cmp_fmc_adc_100ms_core/wb_csr_adr_i
add wave -noupdate -radix hexadecimal /tb_spec/u1/cmp_fmc_adc_100ms_core/wb_csr_dat_i
add wave -noupdate -radix hexadecimal /tb_spec/u1/cmp_fmc_adc_100ms_core/wb_csr_dat_o
add wave -noupdate -radix hexadecimal /tb_spec/u1/cmp_fmc_adc_100ms_core/wb_csr_cyc_i
add wave -noupdate -radix hexadecimal /tb_spec/u1/cmp_fmc_adc_100ms_core/wb_csr_sel_i
add wave -noupdate -radix hexadecimal /tb_spec/u1/cmp_fmc_adc_100ms_core/wb_csr_stb_i
add wave -noupdate -radix hexadecimal /tb_spec/u1/cmp_fmc_adc_100ms_core/wb_csr_we_i
add wave -noupdate -radix hexadecimal /tb_spec/u1/cmp_fmc_adc_100ms_core/wb_csr_ack_o
add wave -noupdate -radix hexadecimal /tb_spec/u1/cmp_fmc_adc_100ms_core/wb_ddr_clk_i
add wave -noupdate -radix hexadecimal /tb_spec/u1/cmp_fmc_adc_100ms_core/wb_ddr_adr_o
add wave -noupdate -radix hexadecimal /tb_spec/u1/cmp_fmc_adc_100ms_core/wb_ddr_dat_o
add wave -noupdate -radix hexadecimal /tb_spec/u1/cmp_fmc_adc_100ms_core/wb_ddr_sel_o
add wave -noupdate -radix hexadecimal /tb_spec/u1/cmp_fmc_adc_100ms_core/wb_ddr_stb_o
add wave -noupdate -radix hexadecimal /tb_spec/u1/cmp_fmc_adc_100ms_core/wb_ddr_we_o
add wave -noupdate -radix hexadecimal /tb_spec/u1/cmp_fmc_adc_100ms_core/wb_ddr_cyc_o
add wave -noupdate -radix hexadecimal /tb_spec/u1/cmp_fmc_adc_100ms_core/wb_ddr_ack_i
add wave -noupdate -radix hexadecimal /tb_spec/u1/cmp_fmc_adc_100ms_core/wb_ddr_stall_i
add wave -noupdate -radix hexadecimal /tb_spec/u1/cmp_fmc_adc_100ms_core/ext_trigger_p_i
add wave -noupdate -radix hexadecimal /tb_spec/u1/cmp_fmc_adc_100ms_core/ext_trigger_n_i
add wave -noupdate -radix hexadecimal /tb_spec/u1/cmp_fmc_adc_100ms_core/adc_dco_p_i
add wave -noupdate -radix hexadecimal /tb_spec/u1/cmp_fmc_adc_100ms_core/adc_dco_n_i
add wave -noupdate -radix hexadecimal /tb_spec/u1/cmp_fmc_adc_100ms_core/adc_fr_p_i
add wave -noupdate -radix hexadecimal /tb_spec/u1/cmp_fmc_adc_100ms_core/adc_fr_n_i
add wave -noupdate -radix hexadecimal /tb_spec/u1/cmp_fmc_adc_100ms_core/adc_outa_p_i
add wave -noupdate -radix hexadecimal /tb_spec/u1/cmp_fmc_adc_100ms_core/adc_outa_n_i
add wave -noupdate -radix hexadecimal /tb_spec/u1/cmp_fmc_adc_100ms_core/adc_outb_p_i
add wave -noupdate -radix hexadecimal /tb_spec/u1/cmp_fmc_adc_100ms_core/adc_outb_n_i
add wave -noupdate -radix hexadecimal /tb_spec/u1/cmp_fmc_adc_100ms_core/gpio_dac_clr_n_o
add wave -noupdate -radix hexadecimal /tb_spec/u1/cmp_fmc_adc_100ms_core/gpio_led_acq_o
add wave -noupdate -radix hexadecimal /tb_spec/u1/cmp_fmc_adc_100ms_core/gpio_led_trig_o
add wave -noupdate -radix hexadecimal /tb_spec/u1/cmp_fmc_adc_100ms_core/gpio_ssr_ch1_o
add wave -noupdate -radix hexadecimal /tb_spec/u1/cmp_fmc_adc_100ms_core/gpio_ssr_ch2_o
add wave -noupdate -radix hexadecimal /tb_spec/u1/cmp_fmc_adc_100ms_core/gpio_ssr_ch3_o
add wave -noupdate -radix hexadecimal /tb_spec/u1/cmp_fmc_adc_100ms_core/gpio_ssr_ch4_o
add wave -noupdate -radix hexadecimal /tb_spec/u1/cmp_fmc_adc_100ms_core/gpio_si570_oe_o
add wave -noupdate -radix hexadecimal /tb_spec/u1/cmp_fmc_adc_100ms_core/sys_rst
add wave -noupdate -radix hexadecimal /tb_spec/u1/cmp_fmc_adc_100ms_core/fs_rst
add wave -noupdate -radix hexadecimal /tb_spec/u1/cmp_fmc_adc_100ms_core/fs_rst_n
add wave -noupdate -radix hexadecimal /tb_spec/u1/cmp_fmc_adc_100ms_core/dco_clk
add wave -noupdate -radix hexadecimal /tb_spec/u1/cmp_fmc_adc_100ms_core/clk_fb
add wave -noupdate -radix hexadecimal /tb_spec/u1/cmp_fmc_adc_100ms_core/locked_in
add wave -noupdate -radix hexadecimal /tb_spec/u1/cmp_fmc_adc_100ms_core/locked_out
add wave -noupdate -radix hexadecimal /tb_spec/u1/cmp_fmc_adc_100ms_core/serdes_clk
add wave -noupdate -radix hexadecimal /tb_spec/u1/cmp_fmc_adc_100ms_core/fs_clk
add wave -noupdate -radix hexadecimal /tb_spec/u1/cmp_fmc_adc_100ms_core/fs_clk_buf
add wave -noupdate -radix hexadecimal /tb_spec/u1/cmp_fmc_adc_100ms_core/serdes_in_p
add wave -noupdate -radix hexadecimal /tb_spec/u1/cmp_fmc_adc_100ms_core/serdes_in_n
add wave -noupdate -radix hexadecimal /tb_spec/u1/cmp_fmc_adc_100ms_core/serdes_out_raw
add wave -noupdate -radix hexadecimal /tb_spec/u1/cmp_fmc_adc_100ms_core/serdes_out_data
add wave -noupdate -radix hexadecimal /tb_spec/u1/cmp_fmc_adc_100ms_core/serdes_out_data_d
add wave -noupdate -radix hexadecimal /tb_spec/u1/cmp_fmc_adc_100ms_core/data_calibr_in
add wave -noupdate -radix hexadecimal /tb_spec/u1/cmp_fmc_adc_100ms_core/offset_calibr
add wave -noupdate -radix hexadecimal /tb_spec/u1/cmp_fmc_adc_100ms_core/gain_calibr
add wave -noupdate -radix hexadecimal /tb_spec/u1/cmp_fmc_adc_100ms_core/data_calibr_out
add wave -noupdate -radix hexadecimal /tb_spec/u1/cmp_fmc_adc_100ms_core/serdes_out_fr
add wave -noupdate -radix hexadecimal /tb_spec/u1/cmp_fmc_adc_100ms_core/serdes_auto_bitslip
add wave -noupdate -radix hexadecimal /tb_spec/u1/cmp_fmc_adc_100ms_core/serdes_man_bitslip
add wave -noupdate -radix hexadecimal /tb_spec/u1/cmp_fmc_adc_100ms_core/serdes_bitslip
add wave -noupdate -radix hexadecimal /tb_spec/u1/cmp_fmc_adc_100ms_core/serdes_synced
add wave -noupdate -radix hexadecimal /tb_spec/u1/cmp_fmc_adc_100ms_core/bitslip_sreg
add wave -noupdate -radix hexadecimal /tb_spec/u1/cmp_fmc_adc_100ms_core/ext_trig_a
add wave -noupdate -radix hexadecimal /tb_spec/u1/cmp_fmc_adc_100ms_core/ext_trig
add wave -noupdate -radix hexadecimal /tb_spec/u1/cmp_fmc_adc_100ms_core/int_trig
add wave -noupdate -radix hexadecimal /tb_spec/u1/cmp_fmc_adc_100ms_core/int_trig_sel
add wave -noupdate -radix hexadecimal /tb_spec/u1/cmp_fmc_adc_100ms_core/int_trig_thres
add wave -noupdate -radix hexadecimal /tb_spec/u1/cmp_fmc_adc_100ms_core/int_trig_data
add wave -noupdate /tb_spec/u1/cmp_fmc_adc_100ms_core/int_trig_over_thres_d
add wave -noupdate /tb_spec/u1/cmp_fmc_adc_100ms_core/int_trig_over_thres
add wave -noupdate -radix hexadecimal /tb_spec/u1/cmp_fmc_adc_100ms_core/hw_trig
add wave -noupdate -radix hexadecimal /tb_spec/u1/cmp_fmc_adc_100ms_core/hw_trig_t
add wave -noupdate -radix hexadecimal /tb_spec/u1/cmp_fmc_adc_100ms_core/hw_trig_sel
add wave -noupdate -radix hexadecimal /tb_spec/u1/cmp_fmc_adc_100ms_core/hw_trig_en
add wave -noupdate -radix hexadecimal /tb_spec/u1/cmp_fmc_adc_100ms_core/sw_trig
add wave -noupdate -radix hexadecimal /tb_spec/u1/cmp_fmc_adc_100ms_core/sw_trig_t
add wave -noupdate -radix hexadecimal /tb_spec/u1/cmp_fmc_adc_100ms_core/sw_trig_en
add wave -noupdate -radix hexadecimal /tb_spec/u1/cmp_fmc_adc_100ms_core/trig
add wave -noupdate -radix hexadecimal /tb_spec/u1/cmp_fmc_adc_100ms_core/trig_delay
add wave -noupdate -radix hexadecimal /tb_spec/u1/cmp_fmc_adc_100ms_core/trig_delay_cnt
add wave -noupdate -radix hexadecimal /tb_spec/u1/cmp_fmc_adc_100ms_core/trig_d
add wave -noupdate -radix hexadecimal /tb_spec/u1/cmp_fmc_adc_100ms_core/trig_align
add wave -noupdate -radix hexadecimal /tb_spec/u1/cmp_fmc_adc_100ms_core/decim_factor
add wave -noupdate -radix hexadecimal /tb_spec/u1/cmp_fmc_adc_100ms_core/decim_cnt
add wave -noupdate -radix hexadecimal /tb_spec/u1/cmp_fmc_adc_100ms_core/decim_en
add wave -noupdate -radix hexadecimal /tb_spec/u1/cmp_fmc_adc_100ms_core/sync_fifo_din
add wave -noupdate -radix hexadecimal /tb_spec/u1/cmp_fmc_adc_100ms_core/sync_fifo_dout
add wave -noupdate -radix hexadecimal /tb_spec/u1/cmp_fmc_adc_100ms_core/sync_fifo_empty
add wave -noupdate -radix hexadecimal /tb_spec/u1/cmp_fmc_adc_100ms_core/sync_fifo_full
add wave -noupdate -radix hexadecimal /tb_spec/u1/cmp_fmc_adc_100ms_core/sync_fifo_wr
add wave -noupdate -radix hexadecimal /tb_spec/u1/cmp_fmc_adc_100ms_core/sync_fifo_rd
add wave -noupdate -radix hexadecimal /tb_spec/u1/cmp_fmc_adc_100ms_core/sync_fifo_valid
add wave -noupdate -radix hexadecimal /tb_spec/u1/cmp_fmc_adc_100ms_core/sync_fifo_dreq
add wave -noupdate -radix hexadecimal /tb_spec/u1/cmp_fmc_adc_100ms_core/gain_calibr
add wave -noupdate -radix hexadecimal /tb_spec/u1/cmp_fmc_adc_100ms_core/offset_calibr
add wave -noupdate -radix hexadecimal /tb_spec/u1/cmp_fmc_adc_100ms_core/acq_fsm_current_state
add wave -noupdate -radix hexadecimal /tb_spec/u1/cmp_fmc_adc_100ms_core/acq_fsm_state
add wave -noupdate -radix hexadecimal /tb_spec/u1/cmp_fmc_adc_100ms_core/fsm_cmd
add wave -noupdate -radix hexadecimal /tb_spec/u1/cmp_fmc_adc_100ms_core/fsm_cmd_wr
add wave -noupdate -radix hexadecimal /tb_spec/u1/cmp_fmc_adc_100ms_core/acq_start
add wave -noupdate -radix hexadecimal /tb_spec/u1/cmp_fmc_adc_100ms_core/acq_stop
add wave -noupdate -radix hexadecimal /tb_spec/u1/cmp_fmc_adc_100ms_core/acq_trig
add wave -noupdate -radix hexadecimal /tb_spec/u1/cmp_fmc_adc_100ms_core/acq_end
add wave -noupdate -radix hexadecimal /tb_spec/u1/cmp_fmc_adc_100ms_core/acq_in_pre_trig
add wave -noupdate -radix hexadecimal /tb_spec/u1/cmp_fmc_adc_100ms_core/acq_in_post_trig
add wave -noupdate -radix hexadecimal /tb_spec/u1/cmp_fmc_adc_100ms_core/samples_wr_en
add wave -noupdate -radix unsigned /tb_spec/u1/cmp_fmc_adc_100ms_core/pre_trig_value
add wave -noupdate -radix unsigned /tb_spec/u1/cmp_fmc_adc_100ms_core/pre_trig_cnt
add wave -noupdate -radix hexadecimal /tb_spec/u1/cmp_fmc_adc_100ms_core/pre_trig_done
add wave -noupdate -radix unsigned /tb_spec/u1/cmp_fmc_adc_100ms_core/post_trig_value
add wave -noupdate -radix unsigned /tb_spec/u1/cmp_fmc_adc_100ms_core/post_trig_cnt
add wave -noupdate -radix hexadecimal /tb_spec/u1/cmp_fmc_adc_100ms_core/post_trig_done
add wave -noupdate -radix unsigned /tb_spec/u1/cmp_fmc_adc_100ms_core/samples_cnt
add wave -noupdate -radix unsigned /tb_spec/u1/cmp_fmc_adc_100ms_core/shots_value
add wave -noupdate -radix unsigned /tb_spec/u1/cmp_fmc_adc_100ms_core/shots_cnt
add wave -noupdate -radix hexadecimal /tb_spec/u1/cmp_fmc_adc_100ms_core/shots_done
add wave -noupdate -radix hexadecimal /tb_spec/u1/cmp_fmc_adc_100ms_core/shots_decr
add wave -noupdate -radix hexadecimal /tb_spec/u1/cmp_fmc_adc_100ms_core/single_shot
add wave -noupdate -radix hexadecimal /tb_spec/u1/cmp_fmc_adc_100ms_core/multishot_buffer_sel
add wave -noupdate -radix unsigned /tb_spec/u1/cmp_fmc_adc_100ms_core/dpram_addra_cnt
add wave -noupdate -radix unsigned /tb_spec/u1/cmp_fmc_adc_100ms_core/dpram_addra_trig
add wave -noupdate -radix unsigned /tb_spec/u1/cmp_fmc_adc_100ms_core/dpram_addra_post_done
add wave -noupdate -radix unsigned /tb_spec/u1/cmp_fmc_adc_100ms_core/dpram_addrb_cnt
add wave -noupdate -radix unsigned /tb_spec/u1/cmp_fmc_adc_100ms_core/dpram_dout
add wave -noupdate -radix hexadecimal /tb_spec/u1/cmp_fmc_adc_100ms_core/dpram_valid
add wave -noupdate -radix hexadecimal /tb_spec/u1/cmp_fmc_adc_100ms_core/dpram_valid_t
add wave -noupdate -radix hexadecimal /tb_spec/u1/cmp_fmc_adc_100ms_core/dpram0_dina
add wave -noupdate -radix unsigned /tb_spec/u1/cmp_fmc_adc_100ms_core/dpram0_addra
add wave -noupdate -radix hexadecimal /tb_spec/u1/cmp_fmc_adc_100ms_core/dpram0_wea
add wave -noupdate -radix unsigned /tb_spec/u1/cmp_fmc_adc_100ms_core/dpram0_addrb
add wave -noupdate -radix hexadecimal /tb_spec/u1/cmp_fmc_adc_100ms_core/dpram0_doutb
add wave -noupdate -radix hexadecimal /tb_spec/u1/cmp_fmc_adc_100ms_core/dpram1_dina
add wave -noupdate -radix hexadecimal /tb_spec/u1/cmp_fmc_adc_100ms_core/dpram1_addra
add wave -noupdate -radix hexadecimal /tb_spec/u1/cmp_fmc_adc_100ms_core/dpram1_wea
add wave -noupdate -radix unsigned /tb_spec/u1/cmp_fmc_adc_100ms_core/dpram1_addrb
add wave -noupdate -radix hexadecimal /tb_spec/u1/cmp_fmc_adc_100ms_core/dpram1_doutb
add wave -noupdate -radix unsigned /tb_spec/u1/cmp_fmc_adc_100ms_core/trig_addr
add wave -noupdate -radix hexadecimal /tb_spec/u1/cmp_fmc_adc_100ms_core/wb_ddr_fifo_din
add wave -noupdate -radix hexadecimal /tb_spec/u1/cmp_fmc_adc_100ms_core/wb_ddr_fifo_dout
add wave -noupdate -radix hexadecimal /tb_spec/u1/cmp_fmc_adc_100ms_core/wb_ddr_fifo_empty
add wave -noupdate -radix hexadecimal /tb_spec/u1/cmp_fmc_adc_100ms_core/wb_ddr_fifo_full
add wave -noupdate -radix hexadecimal /tb_spec/u1/cmp_fmc_adc_100ms_core/wb_ddr_fifo_wr
add wave -noupdate -radix hexadecimal /tb_spec/u1/cmp_fmc_adc_100ms_core/wb_ddr_fifo_rd
add wave -noupdate -radix hexadecimal /tb_spec/u1/cmp_fmc_adc_100ms_core/wb_ddr_fifo_valid
add wave -noupdate -radix hexadecimal /tb_spec/u1/cmp_fmc_adc_100ms_core/wb_ddr_fifo_dreq
add wave -noupdate -radix hexadecimal /tb_spec/u1/cmp_fmc_adc_100ms_core/wb_ddr_fifo_wr_en
add wave -noupdate -radix unsigned /tb_spec/u1/cmp_fmc_adc_100ms_core/ram_addr_cnt
add wave -noupdate -radix hexadecimal /tb_spec/u1/cmp_fmc_adc_100ms_core/test_data_en
add wave -noupdate -radix hexadecimal /tb_spec/u1/cmp_fmc_adc_100ms_core/wb_ddr_stall_t
add wave -noupdate -radix hexadecimal /tb_spec/u1/cmp_fmc_adc_100ms_core/trig_led
add wave -noupdate -radix hexadecimal /tb_spec/u1/cmp_fmc_adc_100ms_core/trig_led_man
add wave -noupdate -radix hexadecimal /tb_spec/u1/cmp_fmc_adc_100ms_core/acq_led_man
add wave -noupdate -radix hexadecimal /tb_spec/U1/cmp_fmc_adc_100Ms_core/sys_clk_i
add wave -noupdate -radix hexadecimal /tb_spec/U1/cmp_fmc_adc_100Ms_core/sys_rst_n_i
add wave -noupdate -radix hexadecimal /tb_spec/U1/cmp_fmc_adc_100Ms_core/wb_csr_adr_i
add wave -noupdate -radix hexadecimal /tb_spec/U1/cmp_fmc_adc_100Ms_core/wb_csr_dat_i
add wave -noupdate -radix hexadecimal /tb_spec/U1/cmp_fmc_adc_100Ms_core/wb_csr_dat_o
add wave -noupdate -radix hexadecimal /tb_spec/U1/cmp_fmc_adc_100Ms_core/wb_csr_cyc_i
add wave -noupdate -radix hexadecimal /tb_spec/U1/cmp_fmc_adc_100Ms_core/wb_csr_sel_i
add wave -noupdate -radix hexadecimal /tb_spec/U1/cmp_fmc_adc_100Ms_core/wb_csr_stb_i
add wave -noupdate -radix hexadecimal /tb_spec/U1/cmp_fmc_adc_100Ms_core/wb_csr_we_i
add wave -noupdate -radix hexadecimal /tb_spec/U1/cmp_fmc_adc_100Ms_core/wb_csr_ack_o
add wave -noupdate -radix hexadecimal /tb_spec/U1/cmp_fmc_adc_100Ms_core/wb_ddr_clk_i
add wave -noupdate -radix hexadecimal /tb_spec/U1/cmp_fmc_adc_100Ms_core/wb_ddr_adr_o
add wave -noupdate -radix hexadecimal /tb_spec/U1/cmp_fmc_adc_100Ms_core/wb_ddr_dat_o
add wave -noupdate -radix hexadecimal /tb_spec/U1/cmp_fmc_adc_100Ms_core/wb_ddr_sel_o
add wave -noupdate -radix hexadecimal /tb_spec/U1/cmp_fmc_adc_100Ms_core/wb_ddr_stb_o
add wave -noupdate -radix hexadecimal /tb_spec/U1/cmp_fmc_adc_100Ms_core/wb_ddr_we_o
add wave -noupdate -radix hexadecimal /tb_spec/U1/cmp_fmc_adc_100Ms_core/wb_ddr_cyc_o
add wave -noupdate -radix hexadecimal /tb_spec/U1/cmp_fmc_adc_100Ms_core/wb_ddr_ack_i
add wave -noupdate -radix hexadecimal /tb_spec/U1/cmp_fmc_adc_100Ms_core/wb_ddr_stall_i
add wave -noupdate -radix hexadecimal /tb_spec/U1/cmp_fmc_adc_100Ms_core/ext_trigger_p_i
add wave -noupdate -radix hexadecimal /tb_spec/U1/cmp_fmc_adc_100Ms_core/ext_trigger_n_i
add wave -noupdate -radix hexadecimal /tb_spec/U1/cmp_fmc_adc_100Ms_core/adc_dco_p_i
add wave -noupdate -radix hexadecimal /tb_spec/U1/cmp_fmc_adc_100Ms_core/adc_dco_n_i
add wave -noupdate -radix hexadecimal /tb_spec/U1/cmp_fmc_adc_100Ms_core/adc_fr_p_i
add wave -noupdate -radix hexadecimal /tb_spec/U1/cmp_fmc_adc_100Ms_core/adc_fr_n_i
add wave -noupdate -radix hexadecimal /tb_spec/U1/cmp_fmc_adc_100Ms_core/adc_outa_p_i
add wave -noupdate -radix hexadecimal /tb_spec/U1/cmp_fmc_adc_100Ms_core/adc_outa_n_i
add wave -noupdate -radix hexadecimal /tb_spec/U1/cmp_fmc_adc_100Ms_core/adc_outb_p_i
add wave -noupdate -radix hexadecimal /tb_spec/U1/cmp_fmc_adc_100Ms_core/adc_outb_n_i
add wave -noupdate -radix hexadecimal /tb_spec/U1/cmp_fmc_adc_100Ms_core/gpio_dac_clr_n_o
add wave -noupdate -radix hexadecimal /tb_spec/U1/cmp_fmc_adc_100Ms_core/gpio_led_acq_o
add wave -noupdate -radix hexadecimal /tb_spec/U1/cmp_fmc_adc_100Ms_core/gpio_led_trig_o
add wave -noupdate -radix hexadecimal /tb_spec/U1/cmp_fmc_adc_100Ms_core/gpio_ssr_ch1_o
add wave -noupdate -radix hexadecimal /tb_spec/U1/cmp_fmc_adc_100Ms_core/gpio_ssr_ch2_o
add wave -noupdate -radix hexadecimal /tb_spec/U1/cmp_fmc_adc_100Ms_core/gpio_ssr_ch3_o
add wave -noupdate -radix hexadecimal /tb_spec/U1/cmp_fmc_adc_100Ms_core/gpio_ssr_ch4_o
add wave -noupdate -radix hexadecimal /tb_spec/U1/cmp_fmc_adc_100Ms_core/gpio_si570_oe_o
add wave -noupdate -radix hexadecimal /tb_spec/U1/cmp_fmc_adc_100Ms_core/sys_rst
add wave -noupdate -radix hexadecimal /tb_spec/U1/cmp_fmc_adc_100Ms_core/fs_rst
add wave -noupdate -radix hexadecimal /tb_spec/U1/cmp_fmc_adc_100Ms_core/fs_rst_n
add wave -noupdate -radix hexadecimal /tb_spec/U1/cmp_fmc_adc_100Ms_core/dco_clk
add wave -noupdate -radix hexadecimal /tb_spec/U1/cmp_fmc_adc_100Ms_core/clk_fb
add wave -noupdate -radix hexadecimal /tb_spec/U1/cmp_fmc_adc_100Ms_core/locked_in
add wave -noupdate -radix hexadecimal /tb_spec/U1/cmp_fmc_adc_100Ms_core/locked_out
add wave -noupdate -radix hexadecimal /tb_spec/U1/cmp_fmc_adc_100Ms_core/serdes_clk
add wave -noupdate -radix hexadecimal /tb_spec/U1/cmp_fmc_adc_100Ms_core/fs_clk
add wave -noupdate -radix hexadecimal /tb_spec/U1/cmp_fmc_adc_100Ms_core/fs_clk_buf
add wave -noupdate -radix hexadecimal /tb_spec/U1/cmp_fmc_adc_100Ms_core/serdes_in_p
add wave -noupdate -radix hexadecimal /tb_spec/U1/cmp_fmc_adc_100Ms_core/serdes_in_n
add wave -noupdate -radix hexadecimal /tb_spec/U1/cmp_fmc_adc_100Ms_core/serdes_out_raw
add wave -noupdate -radix hexadecimal /tb_spec/U1/cmp_fmc_adc_100Ms_core/serdes_out_data
add wave -noupdate -radix hexadecimal /tb_spec/U1/cmp_fmc_adc_100Ms_core/serdes_out_data_d
add wave -noupdate -radix hexadecimal /tb_spec/U1/cmp_fmc_adc_100Ms_core/data_calibr_in
add wave -noupdate -radix hexadecimal /tb_spec/U1/cmp_fmc_adc_100Ms_core/offset_calibr
add wave -noupdate -radix hexadecimal /tb_spec/U1/cmp_fmc_adc_100Ms_core/gain_calibr
add wave -noupdate -radix hexadecimal /tb_spec/U1/cmp_fmc_adc_100Ms_core/data_calibr_out
add wave -noupdate -radix hexadecimal /tb_spec/U1/cmp_fmc_adc_100Ms_core/serdes_out_fr
add wave -noupdate -radix hexadecimal /tb_spec/U1/cmp_fmc_adc_100Ms_core/serdes_auto_bitslip
add wave -noupdate -radix hexadecimal /tb_spec/U1/cmp_fmc_adc_100Ms_core/serdes_man_bitslip
add wave -noupdate -radix hexadecimal /tb_spec/U1/cmp_fmc_adc_100Ms_core/serdes_bitslip
add wave -noupdate -radix hexadecimal /tb_spec/U1/cmp_fmc_adc_100Ms_core/serdes_synced
add wave -noupdate -radix hexadecimal /tb_spec/U1/cmp_fmc_adc_100Ms_core/bitslip_sreg
add wave -noupdate -radix hexadecimal /tb_spec/U1/cmp_fmc_adc_100Ms_core/ext_trig_a
add wave -noupdate -radix hexadecimal /tb_spec/U1/cmp_fmc_adc_100Ms_core/ext_trig
add wave -noupdate -radix hexadecimal /tb_spec/U1/cmp_fmc_adc_100Ms_core/int_trig
add wave -noupdate -radix hexadecimal /tb_spec/U1/cmp_fmc_adc_100Ms_core/int_trig_sel
add wave -noupdate -radix hexadecimal /tb_spec/U1/cmp_fmc_adc_100Ms_core/int_trig_thres
add wave -noupdate -radix hexadecimal /tb_spec/U1/cmp_fmc_adc_100Ms_core/int_trig_data
add wave -noupdate /tb_spec/U1/cmp_fmc_adc_100Ms_core/int_trig_over_thres_d
add wave -noupdate /tb_spec/U1/cmp_fmc_adc_100Ms_core/int_trig_over_thres
add wave -noupdate -radix hexadecimal /tb_spec/U1/cmp_fmc_adc_100Ms_core/hw_trig
add wave -noupdate -radix hexadecimal /tb_spec/U1/cmp_fmc_adc_100Ms_core/hw_trig_t
add wave -noupdate -radix hexadecimal /tb_spec/U1/cmp_fmc_adc_100Ms_core/hw_trig_sel
add wave -noupdate -radix hexadecimal /tb_spec/U1/cmp_fmc_adc_100Ms_core/hw_trig_en
add wave -noupdate -radix hexadecimal /tb_spec/U1/cmp_fmc_adc_100Ms_core/sw_trig
add wave -noupdate -radix hexadecimal /tb_spec/U1/cmp_fmc_adc_100Ms_core/sw_trig_t
add wave -noupdate -radix hexadecimal /tb_spec/U1/cmp_fmc_adc_100Ms_core/sw_trig_en
add wave -noupdate -radix hexadecimal /tb_spec/U1/cmp_fmc_adc_100Ms_core/trig
add wave -noupdate -radix hexadecimal /tb_spec/U1/cmp_fmc_adc_100Ms_core/trig_delay
add wave -noupdate -radix hexadecimal /tb_spec/U1/cmp_fmc_adc_100Ms_core/trig_delay_cnt
add wave -noupdate -radix hexadecimal /tb_spec/U1/cmp_fmc_adc_100Ms_core/trig_d
add wave -noupdate -radix hexadecimal /tb_spec/U1/cmp_fmc_adc_100Ms_core/trig_align
add wave -noupdate -radix hexadecimal /tb_spec/U1/cmp_fmc_adc_100Ms_core/decim_factor
add wave -noupdate -radix hexadecimal /tb_spec/U1/cmp_fmc_adc_100Ms_core/decim_cnt
add wave -noupdate -radix hexadecimal /tb_spec/U1/cmp_fmc_adc_100Ms_core/decim_en
add wave -noupdate -radix hexadecimal /tb_spec/U1/cmp_fmc_adc_100Ms_core/sync_fifo_din
add wave -noupdate -radix hexadecimal /tb_spec/U1/cmp_fmc_adc_100Ms_core/sync_fifo_dout
add wave -noupdate -radix hexadecimal /tb_spec/U1/cmp_fmc_adc_100Ms_core/sync_fifo_empty
add wave -noupdate -radix hexadecimal /tb_spec/U1/cmp_fmc_adc_100Ms_core/sync_fifo_full
add wave -noupdate -radix hexadecimal /tb_spec/U1/cmp_fmc_adc_100Ms_core/sync_fifo_wr
add wave -noupdate -radix hexadecimal /tb_spec/U1/cmp_fmc_adc_100Ms_core/sync_fifo_rd
add wave -noupdate -radix hexadecimal /tb_spec/U1/cmp_fmc_adc_100Ms_core/sync_fifo_valid
add wave -noupdate -radix hexadecimal /tb_spec/U1/cmp_fmc_adc_100Ms_core/sync_fifo_dreq
add wave -noupdate -radix hexadecimal /tb_spec/U1/cmp_fmc_adc_100Ms_core/gain_calibr
add wave -noupdate -radix hexadecimal /tb_spec/U1/cmp_fmc_adc_100Ms_core/offset_calibr
add wave -noupdate -radix hexadecimal /tb_spec/U1/cmp_fmc_adc_100Ms_core/acq_fsm_current_state
add wave -noupdate -radix hexadecimal /tb_spec/U1/cmp_fmc_adc_100Ms_core/acq_fsm_state
add wave -noupdate -radix hexadecimal /tb_spec/U1/cmp_fmc_adc_100Ms_core/fsm_cmd
add wave -noupdate -radix hexadecimal /tb_spec/U1/cmp_fmc_adc_100Ms_core/fsm_cmd_wr
add wave -noupdate -radix hexadecimal /tb_spec/U1/cmp_fmc_adc_100Ms_core/acq_start
add wave -noupdate -radix hexadecimal /tb_spec/U1/cmp_fmc_adc_100Ms_core/acq_stop
add wave -noupdate -radix hexadecimal /tb_spec/U1/cmp_fmc_adc_100Ms_core/acq_trig
add wave -noupdate -radix hexadecimal /tb_spec/U1/cmp_fmc_adc_100Ms_core/acq_end
add wave -noupdate -radix hexadecimal /tb_spec/U1/cmp_fmc_adc_100Ms_core/acq_in_pre_trig
add wave -noupdate -radix hexadecimal /tb_spec/U1/cmp_fmc_adc_100Ms_core/acq_in_post_trig
add wave -noupdate -radix hexadecimal /tb_spec/U1/cmp_fmc_adc_100Ms_core/samples_wr_en
add wave -noupdate -radix unsigned /tb_spec/U1/cmp_fmc_adc_100Ms_core/pre_trig_value
add wave -noupdate -radix unsigned /tb_spec/U1/cmp_fmc_adc_100Ms_core/pre_trig_cnt
add wave -noupdate -radix hexadecimal /tb_spec/U1/cmp_fmc_adc_100Ms_core/pre_trig_done
add wave -noupdate -radix unsigned /tb_spec/U1/cmp_fmc_adc_100Ms_core/post_trig_value
add wave -noupdate -radix unsigned /tb_spec/U1/cmp_fmc_adc_100Ms_core/post_trig_cnt
add wave -noupdate -radix hexadecimal /tb_spec/U1/cmp_fmc_adc_100Ms_core/post_trig_done
add wave -noupdate -radix unsigned /tb_spec/U1/cmp_fmc_adc_100Ms_core/samples_cnt
add wave -noupdate -radix unsigned /tb_spec/U1/cmp_fmc_adc_100Ms_core/shots_value
add wave -noupdate -radix unsigned /tb_spec/U1/cmp_fmc_adc_100Ms_core/shots_cnt
add wave -noupdate -radix hexadecimal /tb_spec/U1/cmp_fmc_adc_100Ms_core/shots_done
add wave -noupdate -radix hexadecimal /tb_spec/U1/cmp_fmc_adc_100Ms_core/shots_decr
add wave -noupdate -radix hexadecimal /tb_spec/U1/cmp_fmc_adc_100Ms_core/single_shot
add wave -noupdate -divider {dpram wr}
add wave -noupdate -radix hexadecimal /tb_spec/U1/cmp_fmc_adc_100Ms_core/multishot_buffer_sel
add wave -noupdate -radix unsigned /tb_spec/U1/cmp_fmc_adc_100Ms_core/dpram_addra_cnt
add wave -noupdate -radix unsigned /tb_spec/U1/cmp_fmc_adc_100Ms_core/dpram_addra_trig
add wave -noupdate -radix unsigned /tb_spec/U1/cmp_fmc_adc_100Ms_core/dpram_addra_post_done
add wave -noupdate -divider {dpram 0}
add wave -noupdate -radix hexadecimal /tb_spec/U1/cmp_fmc_adc_100Ms_core/dpram0_dina
add wave -noupdate -radix unsigned /tb_spec/U1/cmp_fmc_adc_100Ms_core/dpram0_addra
add wave -noupdate -radix hexadecimal /tb_spec/U1/cmp_fmc_adc_100Ms_core/dpram0_wea
add wave -noupdate -radix unsigned /tb_spec/U1/cmp_fmc_adc_100Ms_core/dpram0_addrb
add wave -noupdate -radix hexadecimal /tb_spec/U1/cmp_fmc_adc_100Ms_core/dpram0_doutb
add wave -noupdate -divider {dpram 1}
add wave -noupdate -radix hexadecimal /tb_spec/U1/cmp_fmc_adc_100Ms_core/dpram1_dina
add wave -noupdate -radix hexadecimal /tb_spec/U1/cmp_fmc_adc_100Ms_core/dpram1_addra
add wave -noupdate -radix hexadecimal /tb_spec/U1/cmp_fmc_adc_100Ms_core/dpram1_wea
add wave -noupdate -radix unsigned /tb_spec/U1/cmp_fmc_adc_100Ms_core/dpram1_addrb
add wave -noupdate -radix hexadecimal /tb_spec/U1/cmp_fmc_adc_100Ms_core/dpram1_doutb
add wave -noupdate -divider {dpram rd}
add wave -noupdate -radix hexadecimal /tb_spec/U1/cmp_fmc_adc_100Ms_core/dpram_dout
add wave -noupdate -radix hexadecimal /tb_spec/U1/cmp_fmc_adc_100Ms_core/dpram_valid
add wave -noupdate -radix hexadecimal /tb_spec/U1/cmp_fmc_adc_100Ms_core/dpram_valid_t
add wave -noupdate -divider {ddr fifo}
add wave -noupdate -radix unsigned /tb_spec/U1/cmp_fmc_adc_100Ms_core/trig_addr
add wave -noupdate -radix hexadecimal /tb_spec/U1/cmp_fmc_adc_100Ms_core/wb_ddr_fifo_wr_en
add wave -noupdate -radix hexadecimal /tb_spec/U1/cmp_fmc_adc_100Ms_core/wb_ddr_fifo_wr
add wave -noupdate -radix hexadecimal /tb_spec/U1/cmp_fmc_adc_100Ms_core/wb_ddr_fifo_din
add wave -noupdate -radix hexadecimal /tb_spec/U1/cmp_fmc_adc_100Ms_core/wb_ddr_fifo_full
add wave -noupdate -radix hexadecimal /tb_spec/U1/cmp_fmc_adc_100Ms_core/wb_ddr_fifo_rd
add wave -noupdate -radix hexadecimal /tb_spec/U1/cmp_fmc_adc_100Ms_core/wb_ddr_fifo_dout
add wave -noupdate -radix hexadecimal /tb_spec/U1/cmp_fmc_adc_100Ms_core/wb_ddr_fifo_empty
add wave -noupdate -radix hexadecimal /tb_spec/U1/cmp_fmc_adc_100Ms_core/wb_ddr_fifo_valid
add wave -noupdate -radix hexadecimal /tb_spec/U1/cmp_fmc_adc_100Ms_core/wb_ddr_fifo_dreq
add wave -noupdate -radix unsigned /tb_spec/U1/cmp_fmc_adc_100Ms_core/ram_addr_cnt
add wave -noupdate -radix hexadecimal /tb_spec/U1/cmp_fmc_adc_100Ms_core/test_data_en
add wave -noupdate -divider {ddr wb}
add wave -noupdate /tb_spec/U1/cmp_fmc_adc_100Ms_core/wb_ddr_cyc_o
add wave -noupdate -radix hexadecimal /tb_spec/U1/cmp_fmc_adc_100Ms_core/wb_ddr_stall_t
add wave -noupdate /tb_spec/U1/cmp_fmc_adc_100Ms_core/wb_ddr_we_o
add wave -noupdate /tb_spec/U1/cmp_fmc_adc_100Ms_core/wb_ddr_stb_o
add wave -noupdate -radix hexadecimal /tb_spec/U1/cmp_fmc_adc_100Ms_core/wb_ddr_dat_o
add wave -noupdate -radix unsigned /tb_spec/U1/cmp_fmc_adc_100Ms_core/wb_ddr_adr_o
add wave -noupdate /tb_spec/U1/cmp_fmc_adc_100Ms_core/wb_ddr_ack_i
add wave -noupdate -radix hexadecimal /tb_spec/U1/cmp_fmc_adc_100Ms_core/trig_led
add wave -noupdate -radix hexadecimal /tb_spec/U1/cmp_fmc_adc_100Ms_core/trig_led_man
add wave -noupdate -radix hexadecimal /tb_spec/U1/cmp_fmc_adc_100Ms_core/acq_led_man
add wave -noupdate /tb_spec/RSTOUT18n
add wave -noupdate -radix hexadecimal -childformat {{/tb_spec/ADC_DATA(0) -radix hexadecimal} {/tb_spec/ADC_DATA(1) -radix hexadecimal} {/tb_spec/ADC_DATA(2) -radix hexadecimal} {/tb_spec/ADC_DATA(3) -radix hexadecimal}} -expand -subitemconfig {/tb_spec/ADC_DATA(0) {-radix hexadecimal} /tb_spec/ADC_DATA(1) {-radix hexadecimal} /tb_spec/ADC_DATA(2) {-radix hexadecimal} /tb_spec/ADC_DATA(3) {-radix hexadecimal}} /tb_spec/ADC_DATA
TreeUpdate [SetDefaultTree]
WaveRestoreCursors {{Cursor 1} {
1153292 ps} 0} {{Cursor 2} {230480
00 ps} 0}
WaveRestoreCursors {{Cursor 1} {
20587606 ps} 0} {{Cursor 2} {473761
00 ps} 0}
configure wave -namecolwidth 496
configure wave -valuecolwidth 172
configure wave -justifyvalue left
...
...
@@ -171,4 +184,4 @@ configure wave -griddelta 40
configure wave -timeline 0
configure wave -timelineunits ns
update
WaveRestoreZoom {
0 ps} {3298923
ps}
WaveRestoreZoom {
20271883 ps} {20896118
ps}
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