Update fmc_adc_100Ms_csr documentation.

git-svn-id: http://svn.ohwr.org/fmc-adc-100m14b4cha/trunk@129 ddd67a1a-c8ad-4635-afe9-0b8a11d8f8e4

Update fmc_adc_100Ms_csr documentation.
git-svn-id: http://svn.ohwr.org/fmc-adc-100m14b4cha/trunk@129 ddd67a1a-c8ad-4635-afe9-0b8a11d8f8e4
05b0eeed · mcattin · a7180ffc · 05b0eeed · 05b0eeed · 05b0eeed
Commit 05b0eeed authored Aug 30, 2012 by mcattin
4 changed files
--- a/hdl/adc/rtl/fmc_adc_100Ms_csr.vhd
+++ b/hdl/adc/rtl/fmc_adc_100Ms_csr.vhd
@@ -3,7 +3,7 @@
 ---------------------------------------------------------------------------------------
 -- File           : ../rtl/fmc_adc_100Ms_csr.vhd
 -- Author         : auto-generated by wbgen2 from fmc_adc_100Ms_csr.wb
-- Created        : Thu Aug 16 14:49:44 2012
+-- Created        : Thu Aug 30 09:41:11 2012
 -- Standard       : VHDL'87
 ---------------------------------------------------------------------------------------
 -- THIS FILE WAS GENERATED BY wbgen2 FROM SOURCE FILE fmc_adc_100Ms_csr.wb

--- a/hdl/adc/wb_gen/fmc_adc_100Ms_csr.h
+++ b/hdl/adc/wb_gen/fmc_adc_100Ms_csr.h
@@ -3,7 +3,7 @@
  * File           : fmc_adc_100Ms_csr.h
  * Author         : auto-generated by wbgen2 from fmc_adc_100Ms_csr.wb
-  * Created        : Thu Aug 16 14:49:44 2012
+  * Created        : Thu Aug 30 09:41:11 2012
  * Standard       : ANSI C
    THIS FILE WAS GENERATED BY wbgen2 FROM SOURCE FILE fmc_adc_100Ms_csr.wb

--- a/hdl/adc/wb_gen/fmc_adc_100Ms_csr.htm
+++ b/hdl/adc/wb_gen/fmc_adc_100Ms_csr.htm
@@ -3057,10 +3057,11 @@ FSM[2:0]
 <li><b>
 FSM
 </b>[<i>read-only</i>]: State machine status
-<br>States:<br>1: IDLE<br>2: PRE_TRIG<br>3: WAIT_TRIG<br>4: POST_TRIG<br>5: DECR_SHOT<br>7: Illegal
+<br>States:<br>0: illegal<br>1: IDLE<br>2: PRE_TRIG<br>3: WAIT_TRIG<br>4: POST_TRIG<br>5: DECR_SHOT<br>6: illegal<br>7: illegal
 <li><b>
 SERDES_PLL
 </b>[<i>read-only</i>]: SerDes PLL status
+<br>Sampling clock recovery PLL.<br>0: not locked<br>1: locked
 <li><b>
 SERDES_SYNCED
 </b>[<i>read-only</i>]: SerDes synchronization status

--- a/hdl/adc/wb_gen/fmc_adc_100Ms_csr.wb
+++ b/hdl/adc/wb_gen/fmc_adc_100Ms_csr.wb
@@ -86,7 +86,7 @@ peripheral {
    field {
      name = "State machine status";
-      description = "States:\n1: IDLE\n2: PRE_TRIG\n3: WAIT_TRIG\n4: POST_TRIG\n5: DECR_SHOT\n7: Illegal";
+      description = "States:\n0: illegal\n1: IDLE\n2: PRE_TRIG\n3: WAIT_TRIG\n4: POST_TRIG\n5: DECR_SHOT\n6: illegal\n7: illegal";
      prefix = "fsm";
      type = SLV;
      size = 3;
@@ -96,6 +96,7 @@ peripheral {
    field {
      name = "SerDes PLL status";
+      description = "Sampling clock recovery PLL.\n0: not locked\n1: locked";
      prefix = "serdes_pll";
      type = BIT;
      access_bus = READ_ONLY;